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TMS320C6748: Inquiries about Hardware implementation

Takayuki Miyazaki
Genius 10120 points
Part Number: TMS320C6748
Other Parts Discussed in Thread: TMDSLCDK6748

Hi team,

Our customer plans to develop their system with TMS320C6748, therefore, we received some inquiries about Hardware implementation.

  1. Customer is trying to check datasheet, TRM and Bootloader application documents, however, they were not able to find Hardware implementation guide or this checklist. If TI release some helpful documents or URL, could you share those information, please?
  2. Regarding CVDD_X pins, customer plans to supply 1.3V. For RTC_CVDD, USB_CVDD and SATA_CVDD pins, should customer supply 1.2V to those power terminals? Customer doesn’t have plan to use RTC/USB/SATA. How should customer implement those terminal?
  3. Regarding power terminals, Is there any mandatory requirement about Bypass capacitance ?
  4. Customer is looking for the reference schematic. Should I share TMDSLCDK6748’s schematics (https://www.ti.com/lit/zip/sprcaf4 )?

It is really appreciated if you share Expert’s advice/comments on them.

Best regards,

Miyazaki

  • 0
    TI__Guru 62855 points

    I do not have any device information other than what can be found on the product folder.

    The datasheet defines a nominal voltage of 1.2V for RTC_CVDD, USB_CVDD. The customer should not deviate from the Recommended Operating Conditions defined in the datasheet. There is no pin named SATA_CVDD. I assume they are asking about the pin named SATA_VDD. If so, the same answer applies to this pin. The datasheet defines unused connectivity expectations for USB, SATA, and RTC in the section titled "Unused Pin Configurations".

    The datasheet also defines recommended decoupling capacitor requirements in the datasheet sections titled "Bulk Bypass Capacitors" and "High-Speed Bypass Capacitors".

    The TMDSLCDK6748 is already publicly available on the TI web site, so no issue providing the schematic.

    Regards,
    Paul 

  • 0 in reply to peaves
    TI__Genius 10120 points

    Hi Paul,

    Thank you for your comments. I shared them with our customer. I'd like to wait their feedback for a while.

    Best regards,

    Miyazaki

  • 0 in reply to Takayuki Miyazaki
    TI__Genius 10120 points

    Hi Paul,

    I received further questions. Customer plans to use TMS320C6748 at operation frequency=456MHz. therefore, customer plans to supply CVDD to 1.3V.

    Customer would like to re-confirm the following points.

    1. According to the datasheet 6.3.1, If the RTC is not used, RTC_CVDD should be connected to CVDD. In this case, should RTC_CVDD also be connected to CVDD? Or RTC_CVDD should be supplied to 1.2V?
    2. According to the datasheet "3.8 Unused Pin Configurations", if USB is unused, TI recommends USB_CVDD is supplied to 1.2V. should customer prepare 1.2V power-rail?
    3. For PLL0_VDDA and PLL0_VDDA, according to " 5.3 Recommended Operating Conditions", TI recommends those power are supplied to 1.2V. In this case of CVDD=1.3V, should PLL0_VDDA/PLL0_VDDA be supplied to 1.2V?
    4. Customer plans to use silicon revision2.0 or later. For SATA_VDD, according to "Table 3-33. Unused SATA Signal Configuration", customer understands this supply may be left unconnected. However, customer is asking if it is possible to connect this supply to 1.2V. Is there any issue?

    I appreciate your supports.

    Best regards,

    Miyazaki

  • 0 in reply to Takayuki Miyazaki
    TI__Guru 62855 points

    1. There is a note associated with the recommended operating voltage parameter for RTC_CVDD. See note 1 associated with the Recommended Operating Conditions table in the datasheet. This note describes an option to power RTC_CVDD from a separate lower voltage power rail to save power when CTRL.SPLITPOWER=0. RTC_CVDD should be powered from the same power rail as CVDD when CTRL.SPLITPOWER=0.

    2. Yes, they are required to power USB_CVDD with a 1.2V power rail.

    3. Yes, they are required to power PLL0_VDDA and PLL1_VDDA with a 1.2V power rail.

    4. It is not necessary to power SATA_VDD when SATA is not used. Why would they want to apply power to this rail if they have no plans to use SATA?

    Regards,
    Paul