TDA2SG: BT656 Output resolution.

Hi,

Can you check the frame size register value? This will tell us if resolution is setup correctly. 

Regards,

Brijesh

Hi Brijesh

What is the address of the register?

Hi,

This will be set in the DISPC_LCD_SIZE (0x5800107C for LCD1,  0x580013CC for LCD2 and 0x58001834 for LCD3).

Regards,

Brijesh

Hi Brijesh :

This is the value read by the register.

0x4AE0C204 : 0x2B99002F
0x5800107C : 0x00000000
0x580013CC : 0x02CF077F
0x58001834 : 0x02CF077F

Brijesh :

The current output is Bt.656 without Vsync signal and Hsync signal.

Hi Pierre Hsieh,

How do you check the actual output is one line less? Is your receiving device reporting received frame size? or is it that last line does not have valid content? 

Regards,

Brijesh

Hi Brijesh :

I have a receiver that calculates the size of each frame.

Hi Pierre Hsieh,

That's very unlikely, because we have use this LPP field on many platforms and have not seen it less number of lines from DSS. Are you sure receiver is reporting it correctly? Does it properly calculate size based on the V bit in codes? Could you please check in receiver?

Regards,

Brijesh

Hi Brijesh :

I'll make sure the receiver is correct.

Thanks Pierre