Hi, all
I want to debug IPC in MCU domain. According to chapter 4.9.7.2, Loading Remote Firmware section, I don't now how to load firmware into CCS. Could you give me a Detailed description? And how to startup IPC debug use CCS?
BR
XUE
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Hi, all
I want to debug IPC in MCU domain. According to chapter 4.9.7.2, Loading Remote Firmware section, I don't now how to load firmware into CCS. Could you give me a Detailed description? And how to startup IPC debug use CCS?
BR
XUE
Hi Xue,
What OS/bootloader are you going to using on the A72 Core?
Please refer to the following chapter in RTOS documentation,
If you are using U-Boot R5 SPL, then you need to put a while loop in your MCU1_0 application firmware and let SPL load and branch to your application firmware. You can then use CCS to connect to the core (do not use any GEL files to initialize), load the symbols and use CCS to jump beyond the while loop and perform your debug.
regards
Suman
Hi, Suman
Thanks for your fast reply.
Now, I have removed the gel file path, but the CCS can't launch, CCS log as following:
Connecting to DMSC_Cortex_M3_0!
Fill R5F ATCM memory...
Memory verification failed at address 0x61000000 (D:\inter_processor_com\ti-processor-sdk-rtos-j721e-evm-08_00_00_12\pdk_jacinto_08_00_00_37\packages\ti\drv\sciclient\tools\ccsLoadDmsc\j721e\launch.js#112)
I want to run the demo below. How can I load mpu1_0 firmware?
I don't understand this step :Load the debug version of the firmware binaries on the HLOS file system, and boot device.
Could you give me a document for this demo in CCS?
regards
Xue

Hi Xue,
If you are using Linux, then you have to rely on the R5 SPL, and the Linux standard way of loading (eg:boot from SDCard).
You can either add a while loop to R5 SPL code to connect to the MCU1_0 core while in SPL, or you can add your while loop in your MCU1_0 application, and let SPL branch to the application.
Do not use any GEL scripts on any of the cores you want to Connect when using Linux. All the necessary programming is done within code.
regards
Suman
Hi Xue,
The steps in PDK 4.9.7.2 are geared towards using an all RTOS environment. You do not want to use the steps outlined as is under the Loading using CCS section here, but instead you should use the section Loading using SPL/uBoot.
The CCS Setup for J721E is documented here,
Important thing to follow here is to ensure that none of the cores are using any GEL scripts. The picture in RTOS SDK documentation 6.3.1 is showing the GEL under the DMSC core. Click on each core and ensure that the Initialization Scripts are all Blank.
You just need to use the "Load Symbols" and not "Load Program" when using Linux. Build the PDK IPC examples following the instructions in PDK 4.9.6 section using BUILD_PROFILE=debug. Use the stripped versions to copy to Linux SDCard, and use the unstripped firmwares for Load Symbols from CCS.
Add a debug while loop to your example source code to allow you to connect CCS before any further code is executed. Please try this first on a non MCU1_0 core (like MCU3_0) since MCU1_0 is running DM services. You can start out with adding the loop in the taskFxn before calling Ipc_echo_test() in <RTOS_SDK>/<PDK>/packages/ti/drv/ipc/examples/common/src/main_tirtos.c
You can see an example usage in a Vision Apps example, please see the function StartupEmulatorWaitFxn (Use a value of 1 for enableDebug when you add the similar loop) in <RTOS_SDK>/vision_apps/apps/basic_demos/app_tirtos/tirtos_linux/mcu3_0/main.c
regards
Suman