• State
  • Locked Locked
  • Replies 7 replies
  • Subscribers 98 subscribers
  • Views 381 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA4VM: Tiovx problem

tao ning
Prodigy 140 points
Part Number: TDA4VM

Hi ,

In SDK_07_03, we are using tiovx on MCU3_0. 

However, we found that we couldn't read the information of tiovx, so I have a question about

1. which tool can test tiovx on work ？

2. How to configure tiovx after enable mcu_3.0 ？

  • 0
    TI__Guru**** 476135 points

    Are you using/enabling mcu3_0 in vision apps? As explained in the documention, you need to enable mcu3_0 in vision_apps_build_flags.mk file and app_cfg.h header file. Once this is done, tiovx will be running on mcu3_0 also.

    Regards,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 140 points

    Hi 

    Thank you for your replay.

    I was modify this file.

    PSDKRA/vision_apps/vision_apps_build_flags.mak 

    PSDKRA/vision_apps/apps/basic_demos/app_tirtos/common/app_cfg.h 

    I found PSDKRA/vision_apps/apps/basic_demos/app_tirtos/common/app_cfg_mcu3_0.h config ENABLE_TIOVX  , Can I enable it  (ENABLE_TIOVX  )?

    --- a/PSDKRA/vision_apps/apps/basic_demos/app_tirtos/common/app_cfg_mcu3_0.h
    +++ b/PSDKRA/vision_apps/apps/basic_demos/app_tirtos/common/app_cfg_mcu3_0.h
    @@ -69,6 +69,11 @@

    #undef ENABLE_UDMA
    #undef ENABLE_UDMA_COPY
    #undef ENABLE_TIOVX  

    -- a/PSDKRA/vision_apps/vision_apps_build_flags.mak
    +++ b/PSDKRA/vision_apps/vision_apps_build_flags.mak
    @@ -13,7 +13,7 @@ BUILD_CPU_MPU1?=yes
    BUILD_CPU_MCU1_0?=no
    BUILD_CPU_MCU2_0?=yes
    BUILD_CPU_MCU2_1?=yes
    -BUILD_CPU_MCU3_0?=no
    +BUILD_CPU_MCU3_0?=yes
    BUILD_CPU_MCU3_1?=no
    BUILD_CPU_C6x_1?=yes
    BUILD_CPU_C6x_2?=yes

    --- a/PSDKRA/vision_apps/apps/basic_demos/app_tirtos/common/app_cfg.h
    +++ b/PSDKRA/vision_apps/apps/basic_demos/app_tirtos/common/app_cfg.h
    @@ -74,7 +74,7 @@
    //#define ENABLE_IPC_MCU1_1
    #define ENABLE_IPC_MCU2_0
    #define ENABLE_IPC_MCU2_1
    -//#define ENABLE_IPC_MCU3_0
    +#define ENABLE_IPC_MCU3_0
    //#define ENABLE_IPC_MCU3_1
    #define ENABLE_IPC_C6x_1
    #define ENABLE_IPC_C6x_2

  • 0 in reply to tao ning
    Prodigy 140 points

    system log :

    *******************************************************
Starting random service ...
Starting serial driver
Starting MMC/SD memory card driver... eMMC
Starting MMC/SD memory card driver... SD
Starting XHCI driver on USB3SS0 and USB3SS1
Path=0 - am65x
 target=0 lun=0     Direct-Access(0) - SDMMC: 032GB4 Rev: 0.4
Setting environment variables...
done..
Mounting the sd ..
Mounting the emmc ..
Looking for user script to run: /scripts/user.sh
Looking for user script to run: /scripts/user_aCore.sh
Running user script...
user.sh called...
Setting additional environment variables...
Starting tisci-mgr..
Starting shmemallocator..
Starting tiipc-mgr..
Mailbox_plugInterrupt: interrupt Number 489, arg 0x5DA09328
Mailbox_plugInterrupt: interrupt Number 490, arg 0x5DA094C8
Mailbox_plugInterrupt: interrupt Number 491, arg 0x5DA09668
Mailbox_plugInterrupt: interrupt Number 492, arg 0x5DA09808
Mailbox_plugInterrupt: interrupt Number 493, arg 0x5DA099A8
Starting TI IPC Resmgr
Starting tiudma-mgr..
Start screen..
Running user_aCore script...
user_aCore.sh called...
Start autosar..
/proc/boot/.console_ti.sh: /scripts/user_aCore.sh[13]: /ti_fs/autosar/start_ap.s                                                                                                             h: cannot execute - No such file or directory
done...
J7EVM@QNX:/# ▒c0d xt▒i_▒f▒sti_fs/vision_apps/▒
J7EVM@QNX:/ti_fs/vision_apps# .▒/▒./vision_apps_init.sh
J7EVM@QNX:/ti_fs/vision_apps# [MCU2_0]      3.705923 s: CIO: Init ... Done !!!
[MCU2_0]      3.705988 s: ### CPU Frequency <ORG = 1000000000 Hz>, <NEW = 100000                                                                                                             0000 Hz>
[MCU2_0]      3.706029 s: APP: Init ... !!!
[MCU2_0]      3.706046 s: SCICLIENT: Init ... !!!
[MCU2_0]      3.706235 s: SCICLIENT: DMSC FW version [21.1.1--v2021.01a (Terrifi                                                                                                             c Lla]
[MCU2_0]      3.706271 s: SCICLIENT: DMSC FW revision 0x15
[MCU2_0]      3.706293 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU2_0]      3.706315 s: SCICLIENT: Init ... Done !!!
[MCU2_0]      3.706334 s: UDMA: Init ... !!!
[MCU2_0]      3.707411 s: UDMA: Init ... Done !!!
[MCU2_0]      3.707462 s: MEM: Init ... !!!
[MCU2_0]      3.707495 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000                                                                                                             004) @ e1000000 of size 16777216 bytes !!!
[MCU2_0]      3.707550 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000000) @ 3                                                                                                             600000 of size 131072 bytes !!!
[MCU2_0]      3.707596 s: MEM: Created heap (DDR_NON_CACHE_ME, id=5, flags=0x000                                                                                                             00000) @ d8000000 of size 16777216 bytes !!!
[MCU2_0]      3.707640 s: MEM: Init ... Done !!!
[MCU2_0]      3.707658 s: IPC: Init ... !!!
[MCU2_0]      3.707685 s: IPC: 7 CPUs participating in IPC !!!
[MCU2_0]      3.714019 s: IPC: Init ... Done !!!
[MCU2_0]      3.714081 s: APP: Syncing with 6 CPUs ... !!!
[MCU2_0]      4.221390 s: APP: Syncing with 6 CPUs ... Done !!!
[MCU2_0]      4.221424 s: REMOTE_SERVICE: Init ... !!!
[MCU2_0]      4.223330 s: REMOTE_SERVICE: Init ... Done !!!
[MCU2_0]      4.223395 s: ETHFW: Init ... !!!
[MCU2_0]      4.260611 s: CPSW_9G Test on MAIN NAVSS
[MCU2_0]      4.297103 s: EnetPhy_open: EnetPhy_open alive OK ..
[MCU2_0]      4.297174 s: EnetPhy_setNextState: PHY 1: 0 -> 1
[MCU2_0]      4.297209 s: EnetPhy_setNextState: PHY 1: 1 -> 4
[MCU2_0]      4.297235 s: EnetPhy_open: EnetPhy_open STATE_FOUND ..
[MCU2_0]      4.297446 s: Dp89836_isPhyDevSupported supported=1
[MCU2_0]      4.297480 s: Dp89836_isMacModeSupported supported=1
[MCU2_0]      4.297518 s: EnetPhy_bindDriver: PHY 1: OUI:0d6414 Model:05 Ver:00                                                                                                              <-> 'dp89836' : OK
[MCU2_0]      4.362065 s: CpswMacPort_configSgmii: MAC 3: Configure SGMII in SGM                                                                                                             II_FORCEDLINK mode
[MCU2_0]      4.387088 s: EnetPhy_setNextState: PHY 3: 0 -> 0
[MCU2_0]      4.412086 s: EnetPhy_setNextState: PHY 15: 0 -> 0
[MCU2_0]      4.412140 s: PHY 1 is alive
[MCU2_0]      4.413861 s: ETHFW: Version   : 0.01.01
[MCU2_0]      4.413915 s: ETHFW: Build Date: Sep 22, 2021
[MCU2_0]      4.413942 s: ETHFW: Build Time: 17:18:55
[MCU2_0]      4.413964 s: ETHFW: Commit SHA: effe3409
[MCU2_0]      4.414005 s: ETHFW: Init ... DONE !!!
[MCU2_0]      4.414031 s: ETHFW: Remove server Init ... !!!
[MCU2_0]      4.415213 s: Remote demo device (core : mcu2_0) .....
[MCU2_0]      4.415272 s: ETHFW: Remove server Init ... DONE !!!
[MCU2_0]      4.420897 s: Host MAC address: 70:ff:76:1d:92:c2
[MCU2_0]      4.465006 s: FVID2: Init ... !!!
[MCU2_0]      4.465103 s: FVID2: Init ... Done !!!
[MCU2_0]      4.465149 s: DSS: Init ... !!!
[MCU2_0]      4.465176 s: DSS: Display type is eDP !!!
[MCU2_0]      4.465200 s: DSS: SoC init ... !!!
[MCU2_0]      4.465218 s: SCICLIENT: Sciclient_pmSetModuleState module=152 state                                                                                                             =2
[MCU2_0]      4.465376 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      4.465423 s: SCICLIENT: Sciclient_pmSetModuleState module=297 state                                                                                                             =2
[MCU2_0]      4.465558 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      4.465585 s: SCICLIENT: Sciclient_pmSetModuleState module=151 state                                                                                                             =2
[MCU2_0]      4.465686 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      4.465715 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 c                                                                                                             lk=9 parent=11
[MCU2_0]      4.465793 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]      4.465821 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 c                                                                                                             lk=13 parent=18
[MCU2_0]      4.465889 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]      4.465916 s: SCICLIENT: Sciclient_pmSetModuleClkParent module=152 c                                                                                                             lk=1 parent=2
[MCU2_0]      4.465977 s: SCICLIENT: Sciclient_pmSetModuleClkParent success
[MCU2_0]      4.466032 s: SCICLIENT: Sciclient_pmSetModuleClkFreq module=152 clk                                                                                                             =1 freq=148500000
[MCU2_0]      4.467005 s: SCICLIENT: Sciclient_pmSetModuleClkFreq success
[MCU2_0]      4.467034 s: SCICLIENT: Sciclient_pmModuleClkRequest module=152 clk                                                                                                             =1 state=2 flag=0
[MCU2_0]      4.467146 s: SCICLIENT: Sciclient_pmModuleClkRequest success
[MCU2_0]      4.467174 s: DSS: SoC init ... Done !!!
[MCU2_0]      4.467196 s: DSS: Board init ... !!!
[MCU2_0]      4.467216 s: DSS: Turning on DP_PWR pin for eDP adapters ... !!!
[MCU2_0]      4.467446 s: DSS: Turning on DP_PWR pin for eDP adapters ... Done!!                                                                                                             !
[MCU2_0]      4.467481 s: DSS: Board init ... Done !!!
[MCU2_0]      4.485553 s: DSS: Init ... Done !!!
[MCU2_0]      4.485610 s: VHWA: VPAC Init ... !!!
[MCU2_0]      4.485632 s: SCICLIENT: Sciclient_pmSetModuleState module=290 state                                                                                                             =2
[MCU2_0]      4.485780 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      4.485812 s: VHWA: LDC Init ... !!!
[MCU2_0]      4.488632 s: VHWA: LDC Init ... Done !!!
[MCU2_0]      4.488683 s: VHWA: MSC Init ... !!!
[MCU2_0]      4.496823 s: VHWA: MSC Init ... Done !!!
[MCU2_0]      4.496871 s: VHWA: NF Init ... !!!
[MCU2_0]      4.498339 s: VHWA: NF Init ... Done !!!
[MCU2_0]      4.498384 s: VHWA: VISS Init ... !!!
[MCU2_0]      4.504061 s: VHWA: VISS Init ... Done !!!
[MCU2_0]      4.504113 s: VHWA: VPAC Init ... Done !!!
[MCU2_0]      4.504154 s:  VX_ZONE_INIT:Enabled
[MCU2_0]      4.504180 s:  VX_ZONE_ERROR:Enabled
[MCU2_0]      4.504201 s:  VX_ZONE_WARNING:Enabled
[MCU2_0]      4.505260 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget IPU1-0
[MCU2_0]      4.505537 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget VPAC_NF
[MCU2_0]      4.505800 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget VPAC_LDC1
[MCU2_0]      4.506112 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget VPAC_MSC1
[MCU2_0]      4.506387 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget VPAC_MSC2
[MCU2_0]      4.506677 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget VPAC_VISS1
[MCU2_0]      4.506977 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget CAPTURE1
[MCU2_0]      4.507321 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget CAPTURE2
[MCU2_0]      4.507618 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget DISPLAY1
[MCU2_0]      4.507916 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget DISPLAY2
[MCU2_0]      4.508260 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget CSITX
[MCU2_0]      4.508563 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget CAPTURE3
[MCU2_0]      4.508858 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget CAPTURE4
[MCU2_0]      4.509193 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget CAPTURE5
[MCU2_0]      4.509499 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget CAPTURE6
[MCU2_0]      4.509796 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget CAPTURE7
[MCU2_0]      4.510139 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget CAPTURE8
[MCU2_0]      4.510449 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget MCAN0
[MCU2_0]      4.510746 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget MCAN3
[MCU2_0]      4.511081 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget MCAN7
[MCU2_0]      4.511385 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget MCAN9
[MCU2_0]      4.511679 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget CAMERASWITCH
[MCU2_0]      4.511988 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget SENSOR
[MCU2_0]      4.512351 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget HSMSPI
[MCU2_0]      4.512398 s:  VX_ZONE_INIT:[tivxInit:71] Initialization Done !!!
[MCU2_0]      4.512425 s: APP: OpenVX Target kernel init ... !!!
[MCU2_0]      4.523748 s: APP: tivxRegisterCameraSwitchTargetR5FKernels !!!
[MCU2_0]      4.523808 s: Start to call tivxAddTargetKernelCameraSwitch
[MCU2_0]      4.523841 s: Start to call tivxAddTargetKernelCameraSwitch 6
[MCU2_0]      4.523874 s: Start to call tivxAddTargetKernelCameraSwitch CAMERASW                                                                                                             ITCH
[MCU2_0]      4.523927 s: APP: tivxRegisterHsmspiTargetR5FKernels !!!
[MCU2_0]      4.524032 s: ---awd---[tivxAddTargetKernelHsmspiXdja]---[LINE:536]                                                                                                              self_cpu = 6
[MCU2_0]      4.524104 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_0]      4.524133 s: CSI2RX: Init ... !!!
[MCU2_0]      4.524153 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=                                                                                                             2
[MCU2_0]      4.524240 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      4.524270 s: SCICLIENT: Sciclient_pmSetModuleState module=26 state=                                                                                                             2
[MCU2_0]      4.524370 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      4.524398 s: SCICLIENT: Sciclient_pmSetModuleState module=27 state=                                                                                                             2
[MCU2_0]      4.524489 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      4.524515 s: SCICLIENT: Sciclient_pmSetModuleState module=147 state                                                                                                             =2
[MCU2_0]      4.524578 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      4.524603 s: SCICLIENT: Sciclient_pmSetModuleState module=148 state                                                                                                             =2
[MCU2_0]      4.524666 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      4.525371 s: CSI2RX: Init ... Done !!!
[MCU2_0]      4.525434 s: CSI2TX: Init ... !!!
[MCU2_0]      4.525459 s: SCICLIENT: Sciclient_pmSetModuleState module=25 state=                                                                                                             2
[MCU2_0]      4.525530 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      4.525560 s: SCICLIENT: Sciclient_pmSetModuleState module=28 state=                                                                                                             2
[MCU2_0]      4.525648 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      4.525674 s: SCICLIENT: Sciclient_pmSetModuleState module=296 state                                                                                                             =2
[MCU2_0]      4.525748 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_0]      4.526264 s: CSI2TX: Init ... Done !!!
[MCU2_0]      4.526311 s: ISS: Init ... !!!
[MCU2_0]      4.526333 s: IssSensor_Init start
[MCU2_0]      4.526357 s: Found sensor MAX9672▒▒a▒6717_OX03C10 at location 0
[MCU2_0]      4.526391 s: Found s▒ensor MAX96722_MAX96717_X1F at location 1
[MCU2_0]      4.526419 s: Found sensor MAX96722_MAX9295A_ADV7480_1080P at locati                                                                                                             on 2
[MCU2_0]      4.526448 s: IssSensor_Init end
[MCU2_0]      4.526466 s: IssSensor_Init ... Done !!!
[MCU2_0]      4.526540 s: vissRemoteServer_Init ... Done !!!
[MCU2_0]      4.526603 s: IttRemoteServer_Init ... Done !!!
[MCU2_0]      4.526633 s: UDMA Copy: Init ... !!!
[MCU2_0]      4.528071 s: UDMA Copy: Init ... Done !!!
[MCU2_0]      4.528120 s: APP: Camera GPIO Set start !!!
[MCU2_0]      4.528265 s: PHY 1: global soft-reset
[MCU2_0]      4.528310 s: EnetPhy_setNextState: PHY 1: 4 -> 2
[MCU2_0]      4.528353 s: EnetPhy_setNextState: PHY 3: 0 -> 1
[MCU2_0]      4.528388 s: EnetPhy_setNextState: PHY 15: 0 -> 1
[MCU2_0]      4.528932 s:
[MCU2_0] CPSW NIMU application, IP address I/F 1: 192.168.0.109
[MCU2_0]      4.542315 s: EthFw: TimeSync PTP enabled
[MCU2_0]      4.612056 s: EnetPhy_setNextState: PHY 1: 2 -> 3
[MCU2_0]      4.712019 s: Dp89836_config
[MCU2_0]      4.712254 s: EnetPhy_enableState: PHY 1: falling back to manual mod                                                                                                             e
[MCU2_0]      4.712299 s: EnetPhy_enableState: PHY 1: new link caps: FD100
[MCU2_0]      4.712339 s: EnetPhy_setNextState: PHY 1: 3 -> 7
[MCU2_0]      5.528047 s: APP: Init ... Done !!!
[MCU2_0]      5.528106 s: APP: Run ... !!!
[MCU2_0]      5.528145 s: IPC: Starting echo test ...
[MCU2_0]      ▒▒▒�▒▒▒ APP: Run ... Done !!!
[MCU2_0]      5.532646 s: IPC: E▒cho status: mpu1_0[x] mcu2_0[s] mcu2_1[.] mcu3_                                                                                                             0[.] C66X_1[P] C66X_2[.] C7X_1[.]
[MCU2_0]      5.532818 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[.] mcu3_0                                                                                                             [.] C66X_1[P] C66X_2[P] C7X_1[.]
[MCU2_0]      5.532946 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] mcu3_0                                                                                                             [.] C66X_1[P] C66X_2[P] C7X_1[.]
[MCU2_0]      5.533172 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] mcu3_0                                                                                                             [P] C66X_1[P] C66X_2[P] C7X_1[.]
[MCU2_0]      5.533298 s: IPC: Echo status: mpu1_0[x] mcu2_0[s] mcu2_1[P] mcu3_0                                                                                                             [P] C66X_1[P] C66X_2[P] C7X_1[P]
[MCU2_0]      6.530005 s: SDK_TEST: CFG !!!
[MCU2_0]      6.530059 s: SDK_TEST: CFG !!!
[MCU2_0]      6.530080 s: SDK_TEST: CFG !!!
[MCU2_0]      8.630005 s: SDK_TEST: CFG !!!
[MCU2_0]      8.630060 s: SDK_TEST: CFG !!!
[MCU2_0]      8.630080 s: SDK_TEST: CFG !!!
[MCU2_0]      9.812140 s: EnetPhy_setNextState: PHY 1: 7 -> 4
[MCU2_0]      9.912038 s: PHY 1: global soft-reset
[MCU2_0]      9.912084 s: EnetPhy_setNextState: PHY 1: 4 -> 2
[MCU2_0]     10.012047 s: EnetPhy_setNextState: PHY 1: 2 -> 3
[MCU2_0]     10.112022 s: Dp89836_config
[MCU2_0]     10.112241 s: EnetPhy_enableState: PHY 1: fall▒back to manual mode
[MCU2_0]     10.112281 s: EnetPhy_enableS`▒tate: PHY 1: new link caps: FD100
[MCU2_0]     10.112334 s: EnetPhy_setNextState: PHY 1: 3 -> 7
[MCU2_0]     10.730007 s: SDK_TEST: CFG !!!
[MCU2_0]     10.730060 s: SDK_TEST: CFG !!!
[MCU2_0]     10.730081 s: SDK_TEST: CFG !!!
[MCU2_0]     12.830006 s: SDK_TEST: CFG !!!
[MCU2_0]     12.830063 s: SDK_TEST: CFG !!!
[MCU2_0]     12.830085 s: SDK_TEST: CFG !!!
[MCU2_0]     14.930005 s: SDK_TEST: CFG !!!
[MCU2_0]     14.930059 s: SDK_TEST: CFG !!!
[MCU2_0]     14.930081 s: SDK_TEST: CFG !!!
[MCU2_0]     15.212130 s: EnetPhy_setNextState: PHY 1: 7 -> 4
[MCU2_0]     15.312040 s: PHY 1: global soft-reset
[MCU2_0]     15.312088 s: EnetPhy_setNextState: PHY 1: 4 -> 2
[MCU2_0]     15.412048 s: EnetPhy_setNextState: PHY 1: 2 -> 3
[MCU2_0]     15.512018 s: Dp89836_config
[MCU2_0]     15.512264 s: EnetPhy_enableState: PHY 1: falling back to manual mod                                                                                                             e
[MCU2_0]     15.512306 s: EnetPhy_enableState: PHY 1: new link caps: FD100
[MCU2_0]     15.512344 s: EnetPhy_setNextState: PHY 1: 3 -> 7
[MCU2_1]      3.806919 s: CIO: Init ... Done !!!
[MCU2_1]      3.806991 s: ### CPU Frequency <ORG = 1000000000 Hz>, <NEW = 1▒▒▒▒▒                                                                                                             ▒▒▒B▒▒
[MCU2_1]      3.807031 s: APP: Init ... !!!
[MCU2_1]      3.807049 s: SCICLIENT: Init ... !!!
[MCU2_1]      3.807238 s: SCICLIENT: DMSC FW version [21.1.1--v2021.01a (Terrifi                                                                                                             c Lla]
[MCU2_1]      3.807274 s: SCICLIENT: DMSC FW revision 0x15
[MCU2_1]      3.807298 s: SCICLIENT: DMSC FW ABI revision 3.1
Pu[MCU2_1]      3.807321 s: SCICLIENT: Init ... Done !!!
T[MCU2_1]      3.807341 s: UDMA: Init ... !!!
T[MCU2_1]      3.808440 s: UDMA: Init ... Done !!!
Y[MCU2_1]      3.808489 s: MEM: Init ... !!!
[MCU2_1]      3.808524 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000                                                                                                             004) @ e2000000 of size 16777216 bytes !!!
[MCU2_1]      3.808570 s: MEM: Created heap (L3_MEM, id=1, flags=0x00000001) @ 3                                                                                                             620000 of size 131072 bytes !!!
[MCU2_1]      3.808616 s: MEM: Created heap (DDR_NON_CACHE_ME, id=5, flags=0x000                                                                                                             00000) @ d9000000 of size 117440512 bytes !!!
[MCU2_1]      3.808659 s: MEM: Init ... Done !!!
[MCU2_1]      3.808678 s: IPC: Init ... !!!
[MCU2_1]      3.808707 s: IPC: 7 CPUs participating in IPC !!!
[MCU2_1]      3.814886 s: IPC: Init ... Done !!!
[MCU2_1]      3.814942 s: APP: Syncing with 6 CPUs ... !!!
[MCU2_1]      4.221391 s: APP: Syncing with 6 CPUs ... Done !!!
[MCU2_1]      4.221428 s: REMOTE_SERVICE: Init ... !!!
▒ Init ... Done !!!161 s: CT▒U}MIY%
[MCU2_1]      4.223227 s: FVI▒D2: Init ... !!!
[MCU2_1]      4.223292 s: FVID2: Init ... Done !!!
[MCU2_1]      4.223315 s: VHWA: DMPAC: Init ... !!!
[MCU2_1]      4.223334 s: SCICLIENT: Sciclient_pmSetModuleState module=48 state=                                                                                                             2
[MCU2_1]      4.223484 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]      4.223517 s: SCICLIENT: Sciclient_pmSetModuleState module=305 state                                                                                                             =2
[MCU2_1]      4.223972 s: SCICLIENT: Sciclient_pmSetModuleState success
[MCU2_1]      4.224029 s: VHWA: DOF Init ... !!!
[MCU2_1]      4.231227 s: VHWA: DOF Init ... Done !!!
[MCU2_1]      4.231280 s: VHWA: SDE Init ... !!!
[MCU2_1]      4.233370 s: VHWA: SDE Init ... Done !!!
[MCU2_1]      4.233419 s: VHWA: DMPAC: Init ... Done !!!
[MCU2_1]      4.233445 s: VHWA: Codec: Init ... !!!
[MCU2_1]      4.233465 s: VHWA: VDEC Init ... !!!
[MCU2_1]      4.247362 s: VHWA: VDEC Init ... Done !!!
[MCU2_1]      4.247411 s: VHWA: VENC Init ... !!!
[MCU2_1]      4.247556 s: MM_ENC_Init: No OCM RAM pool available, fallback to DD                                                                                                             R mode for above mp params
[MCU2_1]      4.288952 s: VHWA: VENC Init ... Done !!!
[MCU2_1]      4.289029 s: VHWA: Init ... Done !!!
[MCU2_1]      4.289066 s:  VX_ZONE_INIT:Enabled
[MCU2_1]      4.289088 s:  VX_ZONE_ERROR:Enabled
[MCU2_1]      4.289106 s:  VX_ZONE_WARNING:Enabled
[MCU2_1]      4.290088 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget DMPAC_SDE
[MCU2_1]      4.290321 s:  VX_ZONE_INIT:[tivxPlatformCreYUɝ▒▒%▒▒55] Added target                                                                                                              DMPAC_DOF
[MCU2_1]      4.290559 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget VDEC1
[MCU2_1]      4.290785 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget VDEC2
[MCU2_1]      4.291056 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget VENC1
[MCU2_1]      4.291300 s:  VX_ZONE_INIT:[tivxPlatformCreateTargetId:55] Added ta                                                                                                             rget VENC2
[MCU2_1]      4.291354 s:  VX_ZONE_INIT:[tivxInit:71] Initialization Done !!!
[MCU2_1]      4.291382 s: APP: OpenVX Target kernel init ... !!!
[MCU2_1]      4.291738 s: APP: OpenVX Target kernel init ... Done !!!
[MCU2_1]      4.291774 s: UDMA Copy: Init ... !!!
[MCU2_1]      4.293227 s: UDMA Copy: Init ... Done !!!
[MCU2_1]      4.293279 s: APP: Init ... Done !!!
[MCU2_1]      4.293303 s: APP: Run ... !!!
[MCU2_1]      4.293322 s: IPC: Starting echo test ...
[MCU2_1]      4.295703 s: APP: Run ... Done !!!
[MCU2_1]      4.296935 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] mcu3_0                                                                                                             [.] C66X_1[P] C66X_2[.] C7X_1[.]
[MCU2_1]      4.297050 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] mcu3_0                                                                                                             [.] C66X_1[P] C66X_2[P] C7X_1[.]
[MCU2_1]      4.297126 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] mcu3_0                                                                                                             [P] C66X_1[P] C66X_2[P] C7X_1[.]
[MCU2_1]      4.297194 s: 5▒ Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[s] mcu3_0[P                                                                                                             ] C66X_1[P] C66X_2[P] C7X_1[P]
[MCU2_1]      5.532407 s: IPC: Echo status: mpu1_0[x] mcu2_0[P] mcu2_1[s] mcu3_0                                                                                                             [P] C66X_1[P] C66X_2[P] C7X_1[P]
[MCU3_0]      3.839851 s: CIO: Init ... Done !!!
[MCU3_0]      3.839919 s: ### CPU Frequency <ORG = 1000000000 Hz>, <NEW = 100000                                                                                                             0000 Hz>
[MCU3_0]      3.839959 s: APP: Init ... !!!
[MCU3_0]      3.839976 s: SCICLIENT: Init ... !!!
[MCU3_0]      3.840165 s: SCICLIENT: DMSC FW version [21.1.1--v2021.01a (Terrifi                                                                                                             c Lla]
[MCU3_0]      3.840199 s: SCICLIENT: DMSC FW revision 0x15
[MCU3_0]      3.840220 s: SCICLIENT: DMSC FW ABI revision 3.1
[MCU3_0]      3.840242 s: SCICLIENT: Init ... Done !!!
[MCU3_0]      3.840262 s: MEM: Init ... !!!
[MCU3_0]      3.840291 s: MEM: Created heap (DDR_SHARED_MEM, id=0, flags=0x00000                                                                                                             004) @ e3000000 of size 8388608 bytes !!!
[MCU3_0]      3.840341 s: MEM: Init ... Done !!!
[MCU3_0]      3.840359 s: IPC: Init ... !!!
[MCU3_0]      3.840387 s: IPC: 7 CPUs participating in IPC !!!
[MCU3_0]      3.846542 s: IPC: Init ... Done !!!
[MCU3_0]      3.846597 s: APP: Syncing with 6 CPUs ... !!!
[MCU3_0]      4.221390 s: APP: Syncing with 6 CPUs ... Done !!!
[MCU3_0]      4.221423 s: REMOTE_SERVICE: Init ... !!!
[MCU3_0]      4.223127 s: REMOTE_SERVICE: Init ... Done !!!
[MCU3_0]      4.223204 s:  VX_ZONE_INIT:Enabled
[MCU3_0]      4.223232 s:  VX_ZONE_ERROR:Enabled
[MCU3_0]      4.223250 s:  V
▒▒9}]I9%9▒Enabled
[MCU3_0]      4.224046 s:  VX_ZONE_INIT:[tivxInit:71] Initialization Done !!!
[MCU3_0]      4.224085 s: APP: OpenVX Target kernel init ... !!!
[MCU3_0]      4.224108 s: APP: tivxRegisterSensorTargetR5FKernels !!!
[MCU3_0]      4.224135 s: APP: OpenVX Target kernel init ... Done !!!
[MCU3_0]      4.224160 s: APP: Init ... Done !!!
[MCU3_0]      4.224179 s: APP: Run ... !!!
[MCU3_0]      4.224196 s: IPC: Starting echo test ...
[MCU3_0]      4.226577 s: APP: Run ... Done !!!
[MCU3_0]      4.227228 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] mcu3_0                                                                                                             [s] C66X_1[x] C66X_2[x] C7X_1[P]
[MCU3_0]      4.228970 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] mcu3_0                                                                                                             [s] C66X_1[x] C66X_2[P] C7X_1[P]
[MCU3_0]      4.229348 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[x] mcu3_0                                                                                                             [s] C66X_1[P] C66X_2[P] C7X_1[P]
[MCU3_0]      4.296788 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] mcu3_0
  • 0 in reply to tao ning
    Prodigy 140 points

    but i found tiovx not working .I don't know how to configured tiovx.

  • 0 in reply to tao ning
    TI__Guru**** 476135 points

    Sorry did not get your question, what do you mean by tiovx not working on mcu3_0? 

    IPC test from OpenVX seems to be working

    [MCU3_0] 4.296788 s: IPC: Echo status: mpu1_0[x] mcu2_0[x] mcu2_1[P] mcu3_0

    Regards,

    Brijesh

  • 0 in reply to Brijesh Jadav
    Prodigy 140 points

    Yes,IPC test is ok. 

    Can the tiovx's API functions be used in MCU3.0 ？ 

    Which cores support tiovx ?

  • 0 in reply to tao ning
    TI__Guru**** 476135 points

    Yes, you could use tiovx APIs on mcu3_0. You could also write your own kernel/node on the mcu3_0 and invoke it from the graph running on A72. Please refer to tiovx usecase and vision apps on how different graphs are running. 

    Regards,

    Brijesh