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Original question:

AM6442: AM64x: Turn off automatical PHY search on MDIO

AM6442: Bare Metal example app for ICSSG MDIO accesses

Johannes Roith
Intellectual 570 points
Part Number: AM6442
Other Parts Discussed in Thread: SYSCONFIG

Hi TI,

I want to write a small Bare Metal application, which puts the ICSSG PHYs in Testmode for Ethernet Compliance. 

In the SDK is a driver for MDIO available. But what steps are necessary to enable all the needed IPs? I tried to use the drivers in a template for the R5, but it didn't work, maybe because the MDIO IP was not enabled.

A small minimal example for the MDIO driver would be great, but it is also ok, if you tell me what to do.

I am really looking forword to your reply.

Regards,

Johannes

P.S. I already have taken a look at the lwip example app. But here the functionality I need, is hidden behind a lot of nested libraries...

  • +1
    TI__Mastermind 26674 points

    Hi
    I would suggest that you start with empty project in MCU+ SDK, and do following:


    1. Add an instance of "PRU (ICSS)" module in SysConfig. Generated code based on this initializes the PRUICSS (power up and clock initialization). See the generated file "ti_power_clock_config.c" for more details, in case you want to look at the APIs called. Important APIs are "SOC_moduleClockEnable" and "SOC_moduleSetClockFrequency". Some other code is also added based on the selection, but that is related to PRUICSS driver usage, and hence it might not be relevant for you.

        

    2. Configure the pinmux for MDIO pins. Manual pinmux for individual PRU pins is not present right now in SysConfig. So you can either add the pinmux configuration code manually using "Pinmux_config" API with following array (this example is for ICSSG1 MDIO), or just add instance of  "EtherCAT" module in SysConfig which would generate code for these pins. If you add EtherCAT instance, it would automatically add PRUICSS and ETHPHY instances also, so you will not have to add PRUICSS and ETHPHY instances manually (as mentioned in Step 1 and Step 3).

                /* PRU_ICSSG1_MDIO0 pin config */
        /* PRG1_MDIO0_MDC -> PRG1_MDIO0_MDC (Y6) */
        {
            PIN_PRG1_MDIO0_MDC,
            ( PIN_MODE(0) | PIN_PULL_DISABLE )
        },
        /* PRG1_MDIO0_MDIO -> PRG1_MDIO0_MDIO (AA6) */
        {
            PIN_PRG1_MDIO0_MDIO,
            ( PIN_MODE(0) | PIN_INPUT_ENABLE | PIN_PULL_DISABLE )
        },

    3. Add an instance of "ETHPHY" module in SysConfig. Generated code for this module calls "ETHPHY_open" API when "Board_driversOpen" is called from the application ."ETHPHY_open"  will call "MDIO_initClock" for the appropriate MDIO module.

    If you build the example with these things, you should be able to access the MDIO and thereby PHY registers also. The steps I provided can be used to verify the MDIO access. Once you have it working, you can pull required code (important ones were highlighted in bold) for your example, in case you want to call those APIs manually.

    Please check the Using SDK with SysConfig page for more details on which files are generated by SysConfig and how can the code from each files be invoked in your application.

    Regards
    Dhaval Khandla

  • 0 in reply to Dhaval Khandla
    Intellectual 570 points

    Hi,

    thank you for your good and detailed answer.

    I could write a programm and successfully access the PHYs!

    Regards,

    Johannes