Hello,
I was wondering what is the purpose of the BUS_FET_ENABLE signal on the Craneboard design.
It disconnects DVI, HSUSB and ETH when the system is in reset (SYS_nRESWARM_OUT signal is low), but do these really need to be disconnected? (They remain connected on the LigicPD design).
It seems to me that this signal and the associated buffers are redundant. Perhaps someone could clarify this point.
Any comments welcome!