Part Number: AM3352
Hi,
We are doing custom board design with TI’s AM3352BZCZA30 processor. We have used eMMC part number MTFC2GMDEA. This part is 2GB in size and supports 8 bit bus width.
We have connected this eMMC on pins GPMC_AD8 to GPMC_AD15 and set pinmux for mmc1_dat0 to mmc1_dat7 (Mux Mode 2) as shown in the below figure and set the mentioned below pinmux.
/* board/ti/am335x/mux.c */
static struct module_pin_mux mmc1_pin_mux[] = {
{OFFSET(gpmc_ad15), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT15 */
{OFFSET(gpmc_ad14), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT14 */
{OFFSET(gpmc_ad13), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT13 */
{OFFSET(gpmc_ad12), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT12 */
{OFFSET(gpmc_ad11), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT11 */
{OFFSET(gpmc_ad10), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT10 */
{OFFSET(gpmc_ad9), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT9 */
{OFFSET(gpmc_ad8), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT8 */
{OFFSET(gpmc_csn1), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CLK */
{OFFSET(gpmc_csn2), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CMD */
/* arch/arm/dts/am335x-evm.dts */
&mmc2 {
vmmc-supply = <&vmmcsd_fixed>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_pins>;
bus-width = <8>;
status = "okay";
ti,needs-special-hs-handling;
};
When we try to detect the eMMC on U-boot we can see it is configuring only 1 bit bus width. It is showing in below figure.
If we connect this same eMMC on pin GPMC_AD0 to GPMC_AD7 and set pinmux for mmc1_dat0 to mmc1_dat7 (mux mode 1) then I can see bus width set as 8-bit in the u-boot.
Can you please let me know what I am missing here to make this eMMC 8 bit on GPMC_AD8 to GPMC_AD15 ?
Thanks,
Nirav
