PCIE identification

Chad says" How is the DSP first identified through the PCIE interface in front of the Host before boot without having EEPROM containing a configuration file loaded before the boot which enable the DSP to be identified as a PCIE device in front of the Host (Root) ? "

It is through the ROM boot modes and the IBL - Intermediate boot loader. 

"Boot Mode Dip Switch Settings" will be provided in the hardware board for various peripherals...

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The EVM ( Evaluation module of the hardware board ) supports booting image from various devices (EEPROM, NAND or NOR) via IBL (at I2C address 0x51), I2C EEPROM (at I2C address 0x50), and ROM Boot modes (such as Ethernet, SRIO, PCIe, SPI etc.) which address the boot source directly from the ROM code.

Attaching the user guide and the program evm guide of C6657( same series as that of C6655), in which you will get more info on the flow of the bootloader.

1. 2543.program_evm_userguide.pdf

2. BiosMulticoreSDK_2.1_GettingStartedGuide.pdf

Regards

Shankari

The answer you give here is not relevant to what I asked. I didn't ask how does the PCIE boot is being configured, that is already known from the datasheet as you quoted it from there yourself.

What I asked is how does the C6655 DSP device being identified as a PCIE device in front of the HOST (Root) before as a part of the boot procedure without having an external EEPROM who lets it being identified as PCIE as used to be with the C6454 DSP when first being powered up ??

Thanks, 

Ohad 

Ohad,

Agreed. 

I forwarded your question to the experts.

Let us hear from them.

Regards

Shankari

Hi Shankari, 

Thanks for your response. I would be very grateful if you could connect me directly with the DSP expert in order to make that consultation more useful and efficient without any misunderstood issues. 

Thanks and BR, 

Ohad 

Ohad,

1. Until, we get expert's reply, I identified some FAQ, which I thought might be helpful to you.

2. Access this PDF for the complete FAQ on PCIE Detection/boot/enumeration etc. 

2474.PCI Express (PCIe) Resource Wiki for Keystone Devices - Texas Instruments Wiki.pdf

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FAQ 

Q I have mounted TI Keystone I EVM onto PCIe adapter card and inserted that to HOST PC PCIe slot. But my EVM is not detected after host boot up. Any debug suggestions?

There are multiple reasons that the EVM might not get enumerated. Please ensure below items one by one to resolve the enumeration issue.

a) AMC-to-PCIe adapter: Please check your PCIe adapter card PCB version. There was some PC compatibility issue with old versions of AMC-to-PCIe adapter card. But the issues are fixed in the new version of adapter card, labeled with “PCB REV: 17-00107-03; PCA REV: 18-00107-03”. Please check the following link for the adapter info: http://www.ti.com/tool/tmdxevmpci#1

b) Power sequencing:

 1. PCIe slot on PC host provides power and reference clock to PCIe module on EVM.
 2. PCIe boot code on EVM initializes C66x PCIe module and waits for the link coming up.
 3. PCIe root complex in PC host is powered up and link up is established between PCIe root complex (RC) in host and PCIe end point (EP) in EVM.
 4. PC host enumeration (BIOS) starts to scan the PCIe bus.
 5. PCIe end point in EVM is enumerated and registered in PC host OS.

c) EVM FPGA Version: Please check this section for C6657 EVM only. Production EVMs are not detected when inserted in ATX chassis using TMDXEVMPCI adapter. For more information refer EVM manufacture’s link.

Workaround: The standard IBL (created for the C6657 workaround) contains PCIe configuration writes that are needed to enable robust operation in an ATX computer chassis. The FPGA version v02 redirects the C6657 to boot from the IBL even when the DIP switches are programmed for PCIe end-point boot. These PCIe configuration writes will be needed in the customer application to enable C6657 operation in an ATX computer.

The production EVM6657 has the V3 FPGA, so it will boot from ROM directly and programed IBL will NOT be loaded to run. Please downgrade the FPGA to V2, it will boot from IBL. The PCIE workaround in IBL should work for PCIE enumeration for ATX PC with SSC.

d) Debug PCIe link Status: The LTSSM_STATE field (bits [4:0]) in DEBUG0 register (0x21801728) shows the status of the PCIe link. It will not be 0x11 if the link is disconnected. Please see PCIE user guide Appendix A.1 for the names of the LTSSM states corresponding to the encoded values.

The AMC-to-PCIe adapter for KeyStone I EVMs does not support the PERST signal. Some hosts require control of this for enumeration. Some customers have wired the PERST to the RESETz input at the push-button switch on the EVM and had success.

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Q I had a setup which worked on a host machine. I just changed a host machine or PC, now my EVM is not enumerated in new host. What can I do to resolve?[edit]

The Keystone I (6657/6670/6678) EVM is an AMC form factor card which provides multiple connectivity options for inter-connection with various systems, primarily for telecommunications. In addition, it can be connected to a standard PCIE slot via an AMC to PCIE adaptor card. The manufacturer had tested the adaptor card with multiple platforms. However the adaptor card is not designed for 100% PCIe compatibility. The most significant compatibility issue is lack of PCIe Reset control on adaptor card. The PCIe Reset is not propagated to the SOC. This can cause enumeration issues or boot-up issues. Please try to test the same card in another different PC.

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Regards

Shankari