Hi,
I am currently working on DSP C66x core Bare metal coding on AM5728 SoC.
I am setting up EDMA on DSP(Baremetal). I want to get the messages out from McSPI module using EDMA.
I have also initialised the McSPI4_Tx_0 DMA_DREQ to DSP_EDMA_CC [19:0] through DMA_Corssbar.
But I observed that, when MCSPI4 initialization is being done properly and when I enable the McSPI4 channel by writing '1' to channel control register for channel '0', there is no McSPI4_TX0 DMA_DREQ is generated to EDMA controller. Bascially this DMA request of Mc_SPI4_Tx0 must be generated and data must be transferred from a internal data buffer to McSPI4_Tx register. But this is not happening. The same is the case for McSPI_Rx_0. Everytime I need to manually trigger the channel of DMA to make the transmission and reception to and from McSPI4 to happen. But the problem is eventhough I am manually triggering the DMA channel for McSPI4 Tx and Rx, I couldn't synchronise the data to and from SPI mocule through EDMA. The EDMA is so fast that before the SPI module recevies the proper data from outside, the EDMA reads wrong data from SPI Rx buffer.
But when i configure a GPIO external pin to generate a DMA_DREQ to EDMA, it works totally fine.
Please help me through this. I tried all the methods and read the Sitara TRM very carefully, but still I am not able to generate MCSPI_Tx0 DMA_DREQ and McSPI_Rx_0 DMA_DREQ
Quick help is appreciated.
Thanks in Advance!!