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66AK2G12: 66AK2G DCAN Example

JR Simma
Intellectual 660 points
Part Number: 66AK2G12


We have working DCAN code for many TI parts but am having an issue with the C6000 core on the 66AK2G.  I'm guessing it is because we are not doing data synchronization with the data cache on our read/writes to the DCAN controller.  Is there any example DCAN code, or data synch examples?  I see CCS has _data_synch.c which provides the two write back functions, but seems to leave the invalid function stubbed in.  Any example on reading and writing to peripheral registers would be appreciated.

  • 0
    TI__Guru 60350 points

    Hello,

    Processor SDK RTOS for K2G has a DCAN diagnostic test. Though it only builds for the ARM core, the CSL API that is used to write DCAN registers is the same for C66x. Please download the RTOS SDK from here. The DCAN diagnostic test is located at pdk_k2g_1_0_16\packages\ti\board\diag\dcan.

    JR Simma said:
    I see CCS has _data_synch.c which provides the two write back functions, but seems to leave the invalid function stubbed in.

    Can you please provide the exact location of this file?

    Thanks and regards,

    Jianzhong

  • 0
    Intellectual 660 points

    Can we access DCAN from the C6000?  Also, does cache come into play with the DCAN?  It looks like maybe cache doesn't work across the crossbar.

  • 0 in reply to JR Simma
    TI__Mastermind 29025 points

    JR

    You will see from the memory map (TRM, table 2-1) that the DCAN instances are memory mapped to the C66x using the same physical memory address. 

    If you are referring to then L2 cache, then no. The L2 cache is for the Arm and DSP processors. 

    --Paul