• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 98 subscribers
  • Views 411 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

C6474 SRIO Message Transfer(Receive)

Toshio Ushikubo
Mastermind 9620 points
Other Parts Discussed in Thread: TMS320C6474, TMS320C6457

Hello,

My Customer is using C6474 and has following question about SRIO.
Please answer following question.

Question about C6474 SRIO Message transmission(receive).

TMS320C6474 DSP Serial RapidIO (SRIO) User's Guide(SPRUG23D)
has section "5.51 Mailbox to Queue Mapping Registers (RXU_MAP_Ln and RXU_MAP_Hn)"
page 185, those are settings of Message Packet receive.

** Please advice the execution order of these registers and priority(RXU_MAP_Ln and RXU_MAP_Hn).

Customer needs to know because they have following questions for example.

Q1:
If the all fields of RXU_MAP_Ln and RXU_MAP_Hn registers have same settings except QUEU_ID, which register has high priority ?
RXU_MAP_L0/RXU_MAP_H0 are checked at first and QUEU_ID of first matched register is used, for example.

Q2:
How to set the registers when they want to to transmit the "single-segment message" and "multi-segment message"
to same QUEUE ?  There is "SEGMENT MAPPING" condition so it needs a setting to ignore this condition.
For example, "SEGMENT MAPPING" condition is ignored if SOURCE_ID is matched.

Above are examples that customer want to know so he need execution flow of RXU_MAP_Ln/RXU_MAP_Hn registers.

Thank's

  • 0
    TI__Mastermind 23525 points

    Tony said:
    Q1:
    If the all fields of RXU_MAP_Ln and RXU_MAP_Hn registers have same settings except QUEU_ID, which register has high priority ?
    RXU_MAP_L0/RXU_MAP_H0 are checked at first and QUEU_ID of first matched register is used, for example.

    Yes, you are correct.  The first matching register set is used starting with mapping register 0. 

     

    Tony said:
    Q2:
    How to set the registers when they want to to transmit the "single-segment message" and "multi-segment message"
    to same QUEUE ?  There is "SEGMENT MAPPING" condition so it needs a setting to ignore this condition.
    For example, "SEGMENT MAPPING" condition is ignored if SOURCE_ID is matched.

    In this case, you actually need to burn two mapping register entries.  For example RXU_MAP_L0/RXU_MAP_H0 with SEGMENT MAPPING=0, and RXU_MAP_L1/RXU_MAP_H1, SEGMENT MAPPING=1, all other fields can be the same.

     

    Regards,

    Travis

  • 0 in reply to tscheck
    Mastermind 9620 points

    Hello,

    Thanks for the answer for my previouce questions.

    Customer havs additional question about  C6474 SRIO and C6457 SRIO.

    Q1:C6474 SRIO
    C6474 SRIO User's Guide(SPRUG23D) page 53 explains "TX Buffer Descriptor Field Definitions", but there are
    no explanation(specification) of "letter".
    Please advice what number should I use for "letter".

    Q2:C6457 SRIO
    TMS320C6457 Serial RapidIO (SRIO) User's Guide(PRUGK4D) page 50 has "Figure 20. RX CPPI Mode Explanation".
    Is this figure explains re-transmission of "SRIO_SW <--> EndPoint", or "EndPoint <-> ... (SRIO_SW) ... <--> EndPoint"?

    Regards.

     

  • 0 in reply to Toshio Ushikubo
    TI__Mastermind 23525 points

    Tony,

     

    Tony said:
    Q1:C6474 SRIO
    C6474 SRIO User's Guide(SPRUG23D) page 53 explains "TX Buffer Descriptor Field Definitions", but there are
    no explanation(specification) of "letter".
    Please advice what number should I use for "letter".

     

    There is no letter field in the TX descriptor, it is assigned by hardware.  Hardware assigns the first available letter.  This allows for the highest throughput, but does reduce flexibility.  The letter is assignable in software for our C66x devices.

     

    Tony said:
    Q2:C6457 SRIO
    TMS320C6457 Serial RapidIO (SRIO) User's Guide(PRUGK4D) page 50 has "Figure 20. RX CPPI Mode Explanation".
    Is this figure explains re-transmission of "SRIO_SW <--> EndPoint", or "EndPoint <-> ... (SRIO_SW) ... <--> EndPoint"?

    These are logical layer message Retrys, so it would be endpoint-sw-endpoint.  The best way to guarantee order is to use the same TX queue, same priority, and same RX queue.

     

    Regards,

    Travis