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[ALMOST SOLVED!] HELP!!! dsp/bios 5.31 configuration for EVMDM642

Juan71117
Prodigy 70 points

Hi Guys,

I red many times this forum and i always found a good solutions for my problems, but this time I've to ask.

There's a matter that is driving me mad: I developed an application with EvmDM642 based on an example driver given with board software. To configure dsp/bios (v 5.31) I used .tcf and .cdb given with example and traslated by CCS 3.3 itself. With such dsp/bios configuration everything works perfectly.

BUT.... when I try to add a mine dsp/bios configuration, that is supposedly identical to the given with example but with new names for objects, nothing works.

I've tried to write a dsp/bios for other applications (led blinking, audio and others) and I've always get what I want, this time I can't manage and It's very difficult to undertand the error because there's no message by CCS, program runs but no results!

Execution graph says that my program runs always "Other threads", seems that program is blocked on that, no task or knl_swi are executed, is there a scheduling error?

Following .tcf files, the first (black) works (given by driver example), the second (red) not working (mine)

Could anyone understand which is the error in .tcf?

Any suggest will be appreciate!

THANK YOU!

environment["ti.bios.oldMemoryNames"] = true;

/* loading the generic platform */
var params = {};
params.clockRate = 720.000000;
params.deviceName = "DM642";
params.catalogName = "ti.catalog.c6000";
params.regs = {};
params.regs.l2Mode = "4-way cache (0k)";
utils.loadPlatform("ti.platforms.generic", params);


/* enabling DSP/BIOS components */
bios.GBL.ENABLEINST = true;
bios.MEM.NOMEMORYHEAPS = false;
bios.RTDX.ENABLERTDX = true;
bios.HST.HOSTLINKTYPE = "RTDX";
bios.TSK.ENABLETSK = true;
bios.GBL.ENABLEALLTRC = true;

bios.GBL.ENDIANMODE = "little";

bios.GBL.C641XCONFIGUREL2 = true;
bios.ISRAM.createHeap = true;
bios.ISRAM.heapSize = 0x8000;

bios.MEM.BIOSOBJSEG = prog.get("ISRAM");
bios.MEM.MALLOCSEG = prog.get("ISRAM");
bios.TSK.STACKSEG = prog.get("ISRAM");


/* applying user changes */
bios.SDRAM = bios.MEM.create("SDRAM");
bios.SDRAM.comment = "This object defines space for the DSP's off-chip memory";
bios.SDRAM.base = 0x80000000;
bios.SDRAM.len = 0x2000000;
bios.SDRAM.heapSize = 0x1000000;
bios.SDRAM.enableHeapLabel = 1;
bios.SDRAM.heapLabel = prog.extern("EXTERNALHEAP");
bios.SDRAM.space = "code/data";

bios.tskLoopback = bios.TSK.create("tskLoopback");
bios.trace = bios.LOG.create("trace");

bios.VP0CAPTURE = bios.UDEV.create("VP0CAPTURE");
bios.VP1CAPTURE = bios.UDEV.create("VP1CAPTURE");
bios.VP2DISPLAY = bios.UDEV.create("VP2DISPLAY");

bios.RTA_fromHost.bufSeg = prog.get("SDRAM");
bios.RTA_toHost.bufSeg = prog.get("SDRAM");
bios.TSK_idle.stackMemSeg = prog.get("SDRAM");
bios.LOG_system.bufSeg = prog.get("SDRAM");
bios.LOG_system.bufLen = 0x400;

bios.MEM.ARGSSEG = prog.get("SDRAM");
bios.MEM.BIOSSEG = prog.get("SDRAM");
bios.MEM.STACKSIZE = 0x1000;
bios.MEM.STACKSEG = prog.get("SDRAM");
bios.MEM.SYSINITSEG = prog.get("SDRAM");
bios.MEM.GBLINITSEG = prog.get("SDRAM");
bios.MEM.TRCDATASEG = prog.get("SDRAM");
bios.MEM.SYSDATASEG = prog.get("SDRAM");
bios.MEM.OBJSEG = prog.get("SDRAM");
bios.MEM.BIOSOBJSEG = prog.get("SDRAM");
bios.MEM.MALLOCSEG = prog.get("SDRAM");
bios.MEM.TEXTSEG = prog.get("SDRAM");
bios.MEM.SWITCHSEG = prog.get("SDRAM");
bios.MEM.BSSSEG = prog.get("SDRAM");
bios.MEM.FARSEG = prog.get("SDRAM");
bios.MEM.CINITSEG = prog.get("SDRAM");
bios.MEM.PINITSEG = prog.get("SDRAM");
bios.MEM.CONSTSEG = prog.get("SDRAM");
bios.MEM.DATASEG = prog.get("SDRAM");
bios.MEM.CIOSEG = prog.get("SDRAM");
bios.MEM.SYSMEMSEG = prog.get("SDRAM");
bios.MEM.HWISEG = prog.get("SDRAM");
bios.MEM.HWIVECSEG = prog.get("SDRAM");
bios.MEM.RTDXTEXTSEG = prog.get("SDRAM");

bios.GBL.CALLUSERINITFXN = 1;
bios.BUF.OBJMEMSEG = prog.get("SDRAM");
bios.PRD.OBJMEMSEG = prog.get("SDRAM");
bios.HST.OBJMEMSEG = prog.get("SDRAM");
bios.TSK.OBJMEMSEG = prog.get("SDRAM");
bios.TSK.STACKSEG = prog.get("SDRAM");
bios.tskLoopback.comment = "Loopback Task";
bios.tskLoopback.fxn = prog.extern("tskVideoLoopback");
bios.tskLoopback.stackMemSeg = prog.get("SDRAM");
bios.IDL.OBJMEMSEG = prog.get("SDRAM");
bios.LOG.OBJMEMSEG = prog.get("SDRAM");
bios.trace.bufSeg = prog.get("SDRAM");
bios.trace.bufLen = 0x400;
bios.PIP.OBJMEMSEG = prog.get("SDRAM");
bios.SEM.OBJMEMSEG = prog.get("SDRAM");
bios.MBX.OBJMEMSEG = prog.get("SDRAM");
bios.QUE.OBJMEMSEG = prog.get("SDRAM");
bios.LCK.OBJMEMSEG = prog.get("SDRAM");
bios.SIO.OBJMEMSEG = prog.get("SDRAM");
bios.STS.OBJMEMSEG = prog.get("SDRAM");
bios.SYS.TRACESEG = prog.get("SDRAM");
bios.GIO.ENABLEGIO = 1;
bios.VP0CAPTURE.fxnTable = prog.extern("VPORTCAP_Fxns");
bios.VP0CAPTURE.fxnTableType = "IOM_Fxns";
bios.VP0CAPTURE.params = prog.extern("EVMDM642_vCapParamsPort");
bios.VP1CAPTURE.fxnTable = prog.extern("VPORTCAP_Fxns");
bios.VP1CAPTURE.fxnTableType = "IOM_Fxns";
bios.VP1CAPTURE.deviceId = 1;
bios.VP1CAPTURE.params = prog.extern("EVMDM642_vCapParamsPort");
bios.VP2DISPLAY.fxnTable = prog.extern("VPORTDIS_Fxns");
bios.VP2DISPLAY.fxnTableType = "IOM_Fxns";
bios.VP2DISPLAY.deviceId = 0x2;
bios.VP2DISPLAY.params = prog.extern("EVMDM642_vDisParamsPort");
bios.DHL.OBJMEMSEG = prog.get("SDRAM");
bios.DIO.OBJMEMSEG = prog.get("SDRAM");
bios.GBL.USERINITFXN = prog.extern("EVMDM642_init");
bios.CLK.OBJMEMSEG = prog.get("SDRAM");
bios.RTDX.RTDXDATASEG = prog.get("SDRAM");
bios.SWI.OBJMEMSEG = prog.get("SDRAM");
bios.ISRAM.len = 0x20000;
bios.ISRAM.createHeap = 0;
// !GRAPHICAL_CONFIG_TOOL_SCRIPT_INSERT_POINT!
if (config.hasReportedError == false) {
    prog.gen();
}

 

 

utils.loadPlatform("ti.platforms.evmDM642");

/* The following DSP/BIOS Features are enabled.  */
bios.enableMemoryHeaps(prog);
bios.enableRealTimeAnalysis(prog);
bios.enableRtdx(prog);
bios.enableTskManager(prog);

bios.GBL.CLKOUT = 720.0000;
bios.GBL.CALLUSERINITFXN = 1;
bios.GBL.USERINITFXN = prog.extern("EVMDM642_init");

bios.MEM.instance("SDRAM").createHeap = 1;
bios.MEM.instance("SDRAM").heapSize = 0x01000000;
bios.MEM.instance("SDRAM").enableHeapLabel = 1;
bios.MEM.instance("SDRAM").heapLabel = prog.extern("EXTERNALHEAP");

bios.MEM.ARGSSEG = prog.get("SDRAM");
bios.MEM.BIOSSEG = prog.get("SDRAM");
bios.MEM.STACKSIZE = 0x1000;
bios.MEM.STACKSEG = prog.get("SDRAM");
bios.MEM.SYSINITSEG = prog.get("SDRAM");
bios.MEM.GBLINITSEG = prog.get("SDRAM");
bios.MEM.TRCDATASEG = prog.get("SDRAM");
bios.MEM.SYSDATASEG = prog.get("SDRAM");
bios.MEM.OBJSEG = prog.get("SDRAM");
bios.MEM.BIOSOBJSEG = prog.get("SDRAM");
bios.MEM.MALLOCSEG = prog.get("SDRAM");
bios.MEM.TEXTSEG = prog.get("SDRAM");
bios.MEM.SWITCHSEG = prog.get("SDRAM");
bios.MEM.BSSSEG = prog.get("SDRAM");
bios.MEM.FARSEG = prog.get("SDRAM");
bios.MEM.CINITSEG = prog.get("SDRAM");
bios.MEM.PINITSEG = prog.get("SDRAM");
bios.MEM.CONSTSEG = prog.get("SDRAM");
bios.MEM.DATASEG = prog.get("SDRAM");
bios.MEM.CIOSEG = prog.get("SDRAM");
bios.MEM.SYSMEMSEG = prog.get("SDRAM");
bios.MEM.HWISEG = prog.get("SDRAM");
bios.MEM.HWIVECSEG = prog.get("SDRAM");
bios.MEM.RTDXTEXTSEG = prog.get("SDRAM");

bios.LOG.create("trace");
bios.LOG.instance("trace").bufLen = 128;

bios.TSK.create("TSK0");
bios.TSK.instance("TSK0").order = 1;
bios.TSK.instance("TSK0").comment = "loopback";
bios.TSK.instance("TSK0").stackMemSeg = prog.get("SDRAM");
bios.TSK.instance("TSK0").fxn = prog.extern("tskVideoLoopback");

bios.VP0CAPTURE = bios.UDEV.create("VP0CAPTURE");
bios.VP1CAPTURE = bios.UDEV.create("VP1CAPTURE");
bios.VP2DISPLAY = bios.UDEV.create("VP2DISPLAY");

bios.UDEV.instance("VP0CAPTURE").fxnTableType = "IOM_Fxns";
bios.UDEV.instance("VP0CAPTURE").params = prog.extern("EVMDM642_vCapParamsPort");

bios.UDEV.instance("VP1CAPTURE").fxnTableType = "IOM_Fxns";
bios.UDEV.instance("VP1CAPTURE").deviceId = 1;
bios.UDEV.instance("VP1CAPTURE").params = prog.extern("EVMDM642_vCapParamsPort");
bios.UDEV.instance("VP1CAPTURE").fxnTable = prog.extern("VPORTCAP_Fxns");
bios.UDEV.instance("VP0CAPTURE").fxnTable = prog.extern("VPORTCAP_Fxns");

bios.UDEV.instance("VP2DISPLAY").fxnTable = prog.extern("VPORTDIS_Fxns");
bios.UDEV.instance("VP2DISPLAY").fxnTableType = "IOM_Fxns";
bios.UDEV.instance("VP2DISPLAY").params = prog.extern("EVMDM642_vDisParamsPort");

bios.MEM.instance("IRAM").len = 0x00020000;
bios.SEM.OBJMEMSEG = prog.get("SDRAM");
bios.MBX.OBJMEMSEG = prog.get("SDRAM");
bios.QUE.OBJMEMSEG = prog.get("SDRAM");
bios.LCK.OBJMEMSEG = prog.get("SDRAM");
bios.UDEV.instance("VP2DISPLAY").deviceId = 2;
bios.DIO.OBJMEMSEG = prog.get("SDRAM");
bios.DHL.OBJMEMSEG = prog.get("SDRAM");
bios.RTDX.RTDXDATASEG = prog.get("SDRAM");
bios.BUF.OBJMEMSEG = prog.get("SDRAM");
bios.SYS.TRACESEG = prog.get("SDRAM");
bios.HST.OBJMEMSEG = prog.get("SDRAM");
bios.HST.instance("RTA_fromHost").bufSeg = prog.get("SDRAM");
bios.HST.instance("RTA_toHost").bufSeg = prog.get("SDRAM");
bios.PIP.OBJMEMSEG = prog.get("SDRAM");
bios.SIO.OBJMEMSEG = prog.get("SDRAM");
bios.GIO.ENABLEGIO = 1;
bios.CLK.OBJMEMSEG = prog.get("SDRAM");
bios.SWI.OBJMEMSEG = prog.get("SDRAM");
bios.TSK.OBJMEMSEG = prog.get("SDRAM");
bios.TSK.STACKSEG = prog.get("SDRAM");
bios.IDL.OBJMEMSEG = prog.get("SDRAM");
// !GRAPHICAL_CONFIG_TOOL_SCRIPT_INSERT_POINT!

prog.gen();

  • 0
    Prodigy 70 points

    I found A solution but NOT THE SOLUTION !!!

    In main() program i changed

    ...

    CACHE_setL2Mode(CACHE_256KCACHE);

    ...

    to

    ...

    CACHE_setL2Mode(CACHE_128KCACHE);

    ...

    And everything works fine!

    BUT, i can't understand why with given dsp/bios config 256 works, and with my dsp/bios config only 128 works, CHIP are the same, memory setting are the same...

    Does anybody know the reason?

    Thanks in advice!

  • 0 in reply to Juan71117
    TI__Mastermind 20805 points

    Juan --

    Changing cache from 256K to 128K should not have any affect other than possible timing slowdown since less code/data will be in the cache.

    The cache is shared with L2 memory.   You can use the memory as cache or as L2 RAM.   If configured as cache, I think it is still possible to write this memory as if it were RAM (not positive about this, but pretty sure).   I wonder if your program is somehow accessing something in that lower 128K of L2RAM and this is conflicting with the cache since they are both sharing same underlying memory.   This might be painful, but you could try the following:

     

    (1) fill lower 128K of L2 with 0xab (or some other value) using CCS memory fill feature

    (2) save this memory to a file using memory save option

    (3) load and run your program

    (4) save the memory to file again (with different file name)

     

    Compare files from (2) and (4).  They should be identical. 

    -Karl-

     

    -Karl-

  • 0 in reply to Karl Wechsler
    Prodigy 70 points

    Hi Karl,

    First of all: thank you for your reply!

    After some trials I've understood that all problems come from cache configuration. Now I tried this in my main() and all seems working, but I think it's just a lucky break:

          CACHE_setL2Mode(CACHE_128KCACHE); doesn't work with CACHE_256KCACHE

         CACHE_clean(CACHE_L2ALL, 0, 0);

        CACHE_enableCaching(CACHE_EMIFA_CE00);
         ...
        CACHE_enableCaching(CACHE_EMIFA_CE015);

    I tried to do the operations that you suggested (fill-save-run-compare): memory are quite different but I think it's normal, my program uses cache so it would be different than I filled.

    Could you please explain in a easier way your suggest?

    I have to understand bettere how configure memory or my programs will be full of troubles!

    Thank you

    Juan

  • 0 in reply to Juan71117
    TI__Mastermind 20805 points

    For the "working" case, I think you should fill the first 128K of L2 with a known value and run your app.  Then check to make sure nothing changed in the first 128K.  Noone should be using it.  The first 128K should _not_ change after running your program.   I suspect that you have some data in that first 128K of RAM.  When you enable the cache to be 256, you have a conflict between data and cache.

  • 0 in reply to Juan71117
    Prodigy 40 points

    Hi,have you solved this problem?I met the same problem and I can't get the image/video information with changing CACHE.Could you give me any  suggestion?My Email:huohaiqiang003@aliyun.com,thank you very much.

  • 0 in reply to du hong
    TI__Mastermind 26780 points

    Did you run the test that Karl suggested to verify that the first 128K of L2 is not being modified (which would indicate a data/cache conflict)?

  • 0 in reply to ScottG
    Prodigy 40 points

    No,but I tried to find the differences between the two .tcf files in the Text Edit mode,but the two files are using differente writing style and Ididn't find the right solution.I found that the two files have a big difference in the beginning part,and the last describes the same function. 

  • 0 in reply to du hong
    TI__Mastermind 26780 points

    OK.  I think the next step is to run the test as Karl described, to determine if there is a collision for that first 128K of L2…

  • 0 in reply to ScottG
    Prodigy 40 points

    I rebuild a new BIOS carefully yesterday,and it could capture and display vedio successfully.So I think that BIOS is the key to this problem,not the cache. Here is the created code:

    utils.loadPlatform("ti.platforms.evmDM642");

    /* The following DSP/BIOS Features are enabled.  */
    bios.enableMemoryHeaps(prog);
    bios.enableRealTimeAnalysis(prog);
    bios.enableRtdx(prog);
    bios.enableTskManager(prog);

    bios.GBL.CLKIN = 50000;
    bios.GBL.CALLUSERINITFXN = 1;
    bios.GBL.USERINITFXN = prog.extern("DEC643_init");
    bios.GBL.C641XCONFIGUREL2 = 0;
    bios.MEM.instance("IRAM").len = 0x0002fc00;
    bios.MEM.instance("IRAM").createHeap = 1;
    bios.MEM.instance("IRAM").enableHeapLabel = 1;
    bios.MEM.instance("IRAM").base = 0x00000400;
    bios.MEM.instance("IRAM").heapSize = 0x00004000;
    bios.MEM.instance("IRAM").heapLabel = prog.extern("intHeap");
    bios.MEM.instance("IRAM").heapSize = 0x00002000;
    bios.MEM.instance("IRAM").heapSize = 0x00020000;
    bios.MEM.instance("SDRAM").createHeap = 1;
    bios.MEM.instance("SDRAM").heapSize = 0x00800000;
    bios.MEM.instance("SDRAM").enableHeapLabel = 1;
    bios.MEM.instance("SDRAM").heapLabel = prog.extern("extHeap");
    bios.MEM.BIOSOBJSEG = prog.get("SDRAM");
    bios.MEM.MALLOCSEG = prog.get("SDRAM");
    bios.MEM.ARGSSEG = prog.get("SDRAM");
    bios.MEM.STACKSEG = prog.get("SDRAM");
    bios.MEM.GBLINITSEG = prog.get("SDRAM");
    bios.MEM.TRCDATASEG = prog.get("SDRAM");
    bios.MEM.SYSDATASEG = prog.get("SDRAM");
    bios.MEM.OBJSEG = prog.get("SDRAM");
    bios.MEM.BIOSSEG = prog.get("SDRAM");
    bios.MEM.SYSINITSEG = prog.get("SDRAM");
    bios.MEM.HWISEG = prog.get("SDRAM");
    bios.MEM.HWIVECSEG = prog.get("SDRAM");
    bios.MEM.RTDXTEXTSEG = prog.get("SDRAM");
    bios.MEM.TEXTSEG = prog.get("SDRAM");
    bios.MEM.SWITCHSEG = prog.get("SDRAM");
    bios.MEM.BSSSEG = prog.get("SDRAM");
    bios.MEM.FARSEG = prog.get("SDRAM");
    bios.MEM.CINITSEG = prog.get("SDRAM");
    bios.MEM.PINITSEG = prog.get("SDRAM");
    bios.MEM.CONSTSEG = prog.get("SDRAM");
    bios.MEM.DATASEG = prog.get("SDRAM");
    bios.MEM.CIOSEG = prog.get("SDRAM");
    bios.MEM.STACKSIZE = 0x1000;
    bios.BUF.OBJMEMSEG = prog.get("SDRAM");
    bios.SYS.TRACESEG = prog.get("SDRAM");
    bios.LOG.OBJMEMSEG = prog.get("SDRAM");
    bios.LOG.instance("LOG_system").bufSeg = prog.get("SDRAM");
    bios.LOG.instance("LOG_system").bufLen = 1024;
    bios.LOG.create("trace");
    bios.LOG.instance("trace").bufLen = 1024;
    bios.STS.OBJMEMSEG = prog.get("SDRAM");
    bios.TSK.create("tskInput");
    bios.TSK.instance("tskInput").order = 1;
    bios.TSK.create("tskOutput");
    bios.TSK.instance("tskOutput").order = 2;
    bios.TSK.instance("tskInput").stackSize = 16384;
    bios.TSK.instance("tskInput").stackMemSeg = prog.get("SDRAM");
    bios.TSK.instance("tskInput").priority = 3;
    bios.TSK.instance("tskInput").fxn = prog.extern("tskVideoInput");
    bios.TSK.instance("tskOutput").fxn = prog.extern("tskVideoOutput");
    bios.TSK.instance("tskOutput").stackMemSeg = prog.get("SDRAM");
    bios.TSK.instance("tskOutput").priority = 3;
    bios.TSK.instance("tskOutput").stackSize = 16384;
    bios.TSK.OBJMEMSEG = prog.get("SDRAM");
    bios.TSK.STACKSEG = prog.get("SDRAM");
    bios.TSK.PRIORITY = 3;
    bios.TSK.PRIORITY = 1;
    bios.SEM.OBJMEMSEG = prog.get("SDRAM");
    bios.MBX.OBJMEMSEG = prog.get("SDRAM");
    bios.QUE.OBJMEMSEG = prog.get("SDRAM");
    bios.LCK.OBJMEMSEG = prog.get("SDRAM");
    bios.UDEV.create("VP1CAPTURE");
    bios.UDEV.instance("VP1CAPTURE").fxnTableType = "IOM_Fxns";
    bios.UDEV.instance("VP1CAPTURE").fxnTable = prog.extern("VPORTCAP_Fxns");
    bios.UDEV.instance("VP1CAPTURE").params = prog.extern("EVMDM642_vCapParamsPort");
    bios.UDEV.instance("VP1CAPTURE").deviceId = 1;
    bios.UDEV.create("VP2DISPLAY");
    bios.UDEV.instance("VP2DISPLAY").fxnTable = prog.extern("VPORTDIS_Fxns");
    bios.UDEV.instance("VP2DISPLAY").fxnTableType = "IOM_Fxns";
    bios.UDEV.instance("VP2DISPLAY").params = prog.extern("EVMDM642_vDisParamsPort");
    bios.UDEV.instance("VP2DISPLAY").deviceId = 2;
    bios.DIO.OBJMEMSEG = prog.get("SDRAM");
    bios.DHL.OBJMEMSEG = prog.get("SDRAM");
    bios.HST.HOSTLINKTYPE = "NONE";
    bios.RTDX.ENABLERTDX = 0;
    bios.RTDX.RTDXDATASEG = prog.get("SDRAM");
    bios.HST.OBJMEMSEG = prog.get("SDRAM");
    bios.HST.instance("RTA_fromHost").bufSeg = prog.get("SDRAM");
    bios.HST.instance("RTA_toHost").bufSeg = prog.get("SDRAM");
    bios.PIP.OBJMEMSEG = prog.get("SDRAM");
    bios.SIO.OBJMEMSEG = prog.get("SDRAM");
    bios.GIO.ENABLEGIO = 1;
    // !GRAPHICAL_CONFIG_TOOL_SCRIPT_INSERT_POINT!

    prog.gen();

     

  • 0 in reply to du hong
    TI__Mastermind 26780 points

    To clarify: Is your problem resolved now? 

    If your problem isn’t resolved, or re-occurs, you’ll need to run that test as Karl asked.

  • 0 in reply to ScottG
    Prodigy 40 points

    Sure.The problem hasn't occered yet. I will try to find the differences between the two BIOS.