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AM4372: GPMC interface Wait signal and connection method

Conor
Guru 14700 points

Part Number: AM4372

Hi,

Please tell me about the GPMC interface.

1. Is it possible to use the WAIT signal when using in Address / Data-Multiplexed Mode and accessing Burst Read? It is grayed out in the figure, so I would like to check if it does not work.

2. Is it possible to connect a NAND Flash device to CS0 and a NOR Flash Like device to CS1? I'm wondering if different protocols can be mixed. Also, does it work without problems even if I omit the connection at address [27:17] and assign the corresponding pin to another function?

Thanks,

KT

  • +1
    TI__Mastermind 30601 points

    Hi KT,

    1. Yes, WAIT is supported for multiplexed modes and accessing burst read.
    You can see it shown in datasheet Figure 5-37. GPMC and Multiplexed NOR Flash—Synchronous Burst Write

    Its also listed in TRM 9.1.3.3.8.3.1 WAIT Pin Monitoring Control and TRM Table 9-5. GPMC Pin Multiplexing Options

    Take note of TRM 9.1.3.3.8.3.5 Wait Monitoring During a Synchronous Write Access
    Wait monitoring is supported for all configurations except for GPMC_CONFIG1_i[19-18] WAITMONITORINGTIME = 0 for write bursts with a clock divider of 1 or 2 (GPMC_CONFIG1_i[1-0] GPMCFCLKDIVIDER field equal to 0 or 1, respectively).

    Basically, GPMC WAIT cannot react fast enough to be used with GPMC_CLK derived from GPMC_FCLK / 1. It needs more time to react to the change in WAIT state.

    2. Yes, GPMC was designed to handle different types of devices on each chip select.
    Refer to the pin mapping in Table 9-5. GPMC Pin Multiplexing Options. There are two WAIT pins that can be monitored by any of the chip selects.

    Do you require more than address bits A[15:0]? Note in this case if the AD bus is 16-bits wide, then A[0] addresses a 16-bit word (not byte address).

    TRM: https://www.ti.com/lit/ug/spruhl7i/spruhl7i.pdf

    Datasheet: https://www.ti.com/lit/gpn/am4372

    Regards,
    Mark