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AM6442: CLKOUT0 frequency

Embedded Eng.
Prodigy 130 points
Part Number: AM6442

Hi,

I'm trying to configure pad A19 (EXT_REFCLK1) as an 25MHz output clock.

I'm able to select the correct function from U-boot (CLKOUT0 - option 5):

mw 0x000F4274 0x00010005

This leads to an 50MHz clock output.

How can I change it to be a 25MHz clock?

What is the register address that controls this clock frequency?

Thanks

  • 0
    TI__Guru 68960 points

    Hi Alvaro,
    1. For selecting clock source of CPSW CLKOUT pin, refer to AM64x TRM
    Table 5-479. CTRLMMR_ENET1_CTRL Register Field Descriptions
    Table 5-481. CTRLMMR_ENET2_CTRL Register Field Descriptions
    Table 5-581. CTRLMMR_CLKOUT_CTRL Register Field Descriptions

    2. For Ethernet RGMII Boot on CLKOUT, refer to AM64x TRM
    Table 4-4. Primary Boot Mode Selection
    Table 4-18. Ethernet RGMII Boot Configuration Fields

    Best,
    -Hong

  • 0 in reply to Hong Guan64
    Prodigy 130 points

    Hi,

    I tried to write to CTRLMMR_CLKOUT_CTRL register, but the value won't change.

    CTRLMMR_ENET1_CTRL register value is the default one: 0x00000002 (RGMII).

    CTRLMMR_ENET2_CTRL register value is the default one: 0x00000002 (RGMII).

    CTRLMMR_CLKOUT_CTRL register value it the default one 0x00000000.

    I'm trying to change CTRLMMR_CLKOUT_CTRL's value to 0x11, which means:

          CLKOUT clock source: 1h - RGMII_MHZ_50_CLK_DIV2 (25 MHz)

         CLK_EN: 1h - enables CLKOUT output.

    When I write this value, it just won't change (tried from U-boot and from Linux).

    # Write the value
devmem 0x43008010 32 0x11

# Read the value
devmem 0x43008010
0x00000000


devmem 0x4300a010 32 0x11

devmem 0x43008010
0x00000000

    What am I doing wrong?

  • 0 in reply to Hong Guan64
    Prodigy 130 points

    I wasn't able to fix this yet,

    Maybe you know what I'm doing wrong?

  • +1 in reply to Embedded Eng.
    TI__Guru 68960 points

    Hi Alvaro,
    Please refer to "5.1.1.3.1.2 Kick Protection Registers" in AM64x TRM (www.ti.com/.../spruim2)
    The CTRL_MMR0 module has a protection mechanism which prevents spurious writes from changing the values of its registers.
    I'm listing a sample log @u-boot prompt for your reference:

    => md.l 0x43008010 1
43008010: 00000000  
=> md.l 0x43009008 1
43009008: 00000000                               ....
=> mw.l 0x43009008 0x68EF3490 1
=> mw.l 0x4300900C 0xD172BC5A 1
=> md.l 0x43009008 1
43009008: 68ef3491                               .4.h
=> mw.l  0x43008010 0x11 1
=> md.l  0x43008010 1
43008010: 00000011                               ....

    Best,

    -Hong