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AM5718: About EMIF tool spreadsheet

gorka mateo
Prodigy 30 points
Part Number: AM5718

Hi,

We are working on post layout activities with our custom design using AM5718 and DDR3L. We are using the EMIF_RegisterConfig.xlsm.

When we are using the spreadsheet, in the first worksheet if we select AM571x_DDR3L_666MHz_TI_AM571x_IDK, in the Register Values (U-Boot) we obtain in the dmm_lisa_map_regs, these values:

const struct dmm_lisa_map_regs AM571x_DDR3L_666MHz_TI_AM571x_IDK_dmm_regs = {
.dmm_lisa_map_0 = 0x00000000,
.dmm_lisa_map_1 = 0x00000000,
.dmm_lisa_map_2 = 0x80600100,
.dmm_lisa_map_3 = 0xFF020100,
.is_ma_present = 0x1
};

But if we read the file u-boot/board/ti/am57xx/board.c in the BSP of the IDK, we find only (dmm_lisa_map_3):

static const struct dmm_lisa_map_regs am571x_idk_lisa_regs = {
.dmm_lisa_map_3 = 0x80640100,
.is_ma_present = 0x1
};

It is the spreadsheet working correct? Using the AM5718 processor it is only available one EMIF of 32 bits, and if we input the parameters of our board we have the similar result, we obtain values in dmm_lisa_map_2 and dmm_lisa_map_3.It is correct or it should be only results for the dmm_lisa_map_3?

best regards,

Gorka

  • 0
    TI__Mastermind 38090 points

    Hi,

    The difference between 0x80600100 (from XLS tool) and 0x80640100 (in SDK) is that the tool is configuring SDRC_INTL to "No interleaving" and the SDK is configuring SDRC_INTL to 128-byte interleaving. However, since only one EMIF is active, this parameter should be a don't care and the two values should have the same functionality. 

    You can use any of the LISA_MAP registers to define the DDR section. If defining multiple sections, then priority is based on index with a higher index having higher priority. In other words, the section defined in LISA_MAP_3 has higher priority compared to LISA_MAP_2. However, if you only define one section, then you can assign to any of the registers.

    Regards,
    Kevin