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AM4376: AM4376 boundary scan test - reading inputs problem

Part Number: AM4376

I have a problem with sensing inputs during boundary scan test. I use "sprm635.bsd" (revision 1.2) BSDL. I can drive pins like AB24 (I2C0_SDA) or A15 (mii1_rx_dv) but when read them, always get logic "1".

Example - in my application AM4376BZDNA80 pin A15 is connected to Intel Cyclone 10 bidirectional pin. There is pull-up resistor on this net as well. When A15 BS cell is configured as an output and drive the net to "0" and "1", Cyclone reads net value properly. However when A15 BS input cell is used and Cyclone drives the net, AM437x read value is always "1". I confirmed with oscilloscope that net value toggles to "0" and "1" so I don't know why AM4376 can't read properly.

Could you advice why BS input cells are not reading actual value at input and always show "1"?

  • I am checking on this with the team. I'll provide an update in a day or so. 

    --Paul

  • Have you found solution for this problem? Any advice?

  • Do you have any update? Currently, we are blocked with boundary scan test development because of that.

    Wojciech Wisniewski

  • Apologies for the delay, I had incorrectly tagged this thread. 

    I've not found any documented issue that would prevent A15 from reading the state of the pin. I am having the model reviewed for issues with A19. In additional I seeking input from the design team. 

    --Paul 

  • The model review did not show any issues. 

    How many devices/boards are impacted by this? Is it all pins or just a sub-set?

    --Paul 

  • We have tested 10 units and all behave the same.

    With regards to number of pins, there is no possibility to test all in current board configuration however there is no single one working good. The following pins were tested today and they all sense '1':
    A19, B19, A18, B18, D25, A17, D11, N22, Y2, Y3, Y4, AC2, AC1, AA3, AB1, AB2, V2, V3, V4, W5, W6, W4, J4, K5, H1, K6, J3, J6, K4, E2, F3, E1, E3, G1, G2, G3, G4

    Wojciech

  • Thanks for the additional information. I am still seeking input from the design team, but I wonder if there is a more fundamental configuration issue with so many (all) pins showing the issue and not having similar reports previously.   What boundary scan s/w and h/w are you using using 

    --Paul

  • I use the following tools from JTAG Technologies
    SW: ProVision
    HW: JT3707 DataBlaster

    Just to remind that problem is with pins sensing. Infrastructure test and driving the pin outputs work well.

    Wojciech

  • Wojciech

    I had checked with our design team and they could not find issue. 

    This does appear to be a setup configuration issue.  Have you checked with you tool/software vendor to see if they know of any issues or have a debug solution? 

    --Paul

  • Paul

    I don't see any problem with JTAG software. We use it for years for many projects. For current project it works perfectly fine for Intel Cyclone chips on the same board. Infrastructure and writing AM4376 pins works too, only reading has a problem. Can be IEEE 1149.1 testing affected with some special chip configuration like for example booting setup? Currently I fulfil compliance pattern from BSDL so PWRONSTn = 1 and reserved1 = 0. AM4376 is not programmed.

    Wojciech

  • Paul

    Does AM4376 require special ICEPick configuration to perform boundary scan test (1149.1)? 
    There is nothing about it in BSDL and the documentation is not very clear however seeking for information about similar problems in internet we found some discussions about ICEPick.
    Based on "TI ICEPick TAP Router Module Type C Reference Guide", some modules in the TI target device can be added or removed from the device scan chain using special commands or EMU0 and EMU1 pins can be use to select TAP configuration at power-on. The easiest way seems to be set EMU1 = EMU0 = 0 which is ICEPick TAP and default secondary TAP(s). The key word here is "default" because it actually means TAPs that have been preset at the factory so do not necessarily the ones needed for testing. The publicly available document is for revision C and what is implemented in AM4376 is revision D which requires NDA but I need understand first if ICEPick has direct impact on boundary scan testing so need to be investigated deeper. Could you advise on that, plase?
    My the only interest is to develop boundary scan test for the board where AM4376 is used. I am not ARM Cortex Processors developer so I am not familiar with its technical details.

    Wojciech

  • Wojciech

    I will have to check internally on this.

    --Paul 

  • Wojciech

    Still working to get this answered. 

    --Paul