• State
  • Locked Locked
  • Replies 3 replies
  • Subscribers 98 subscribers
  • Views 211 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320C5515

Yaron Blecher65338
Prodigy 180 points
Other Parts Discussed in Thread: ADS1298

Hello,

1. The C55x CSL comes with an MMC driver that does not support High Density MMC
(e.g., all the initialization is done according to the pre-v4.2 MMC spec, which is correct only for <= 2GB MMC cards).
Is there any available driver for High Density MMC larger than 2GB (4.41 version)?

If not when TI is going to release such MMC driver?

2. The boot loader is performed thru SPI flash connected to CS0, how the boot loader cofigue the rest of the CS (CS1-CS3) before it

starts to read the SPI flash? (other chip selects are connected to peripherals e.g. ADS1298.

After reset what is  CS1-CS3 states?

Thanks,

Yaron

  • 0
    TI__Expert 6891 points

    Hello Yaron;

    1. You are correct, the current CSL example does not support HD-MMC. So far, we don't have a plan to release the new driver to cover HD-MMC yet. But the current SD example does support HCSD, you can use that as an example to modify the MMC driver to make it support HD-MMC. (I am sorry this may not be the direct solution you want it.)

    2. After reset, the CS1-CS3 may go to "LOW". So if they are connected to the other devices, these devices may look like being selected momentary. But the bootloader will only read the SPI flash memory connected to CS0; and ignore the rest.

     

    Thanks and regards

    Wen

  • 0 in reply to Wen Li
    Prodigy 180 points

    Hello Wen,

    My concerns is that if the CS1-CS3 may go to "LOW" that  lead to contention with the other devices.

    Please advise,

    Yaron

     

  • 0 in reply to Yaron Blecher65338
    TI__Expert 6891 points

    Hi Yaron;

    During the power-on-reset, the CS1~C3 pins will be "low" momentary. if more than one external SPI devices are connected to the DOUT (SPI bus), it could have a contention in a short period time. So, a glue logic should keep the rest SPI devices' outputs in Hi-Z during reset.

    Regards

    Wen