Part Number: DRA821U
Other Parts Discussed in Thread: DRA821
Dear expert.
DRA821 TRM mentioned that "On subsequent (warm) resets, the reset vector base address will point to run-time loaded code (the SBL), and not ROM", in chapter 4.2.1. it seems that it mean first running code after reset is SBL entry, not DMSC ROM. So SBL code seems need be kept alive in internal RAM even if it has gone to application code with RTOS.
In Chapter 5.3.6.3, in MCU_RESETz sequence, DMSC ROM code will be executed, then SBL will be loaded from external memory. I think it is conflict to above description. May I ask your great help to clarify it? Please correct my understanding if anything is wrong.
Actually, I used this demo, "CAN Response and Bootloader Demo Application SDK7.3", and tried to do reboot command in Linux, SBL always be reloaded.
thanks a lot!
yong
