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AM6442: PCIe external reference clock

Part Number: AM6442

Hello,

The SERDES registers are undocumented and the PCIe registers are a work-in-progress in the latest AM6442 TRM. Because of this, I am unsure of how best to enable the use of the external reference clock for PCIe. I see the use of serdes_refclk as ext_ref_clk in the serdes_wiz0 driver and I've set serdes_refclk's clock-frequency node to our ref clock frequency. Can TI provide steps to enable the use of the reference clock in the latest Linux SDK?

Thanks,
Matt McKee

  • Hi Matt,

    Are you looking for the information of AM6442 sourcing ext. ref clk to the PCIe slot? or AM6442 taking the ref clk externally?

  • Hi Bin,

    Our design uses an externally-generated PCIe reference clock which connects to the PCIe slot as well as to the AM6442. We need guidance on configuring SERDES and PCIe to use this externally generated reference clock.

    Thanks,
    Matt McKee

  • Hi Matt,

    I am looking into it and will get back to your early next week.

  • Hi Bin,

    Thanks for looking into it. Looking forward to a solution.

    Cheers,
    Matt

  • Hi Matt,

    Please try the following kernel patch to use the PCIe external refclk.

    diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
    index c29864b3b0e7..4014d80dfae6 100644
    --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
    +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
    @@ -752,7 +752,7 @@
                            clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, <&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>;
                            clock-names = "refclk", "phy_en_refclk";
                            assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>, <&serdes_wiz0 TI_WIZ_REFCLK_DIG>;
    -                       assigned-clock-parents = <&k3_clks 162 1>, <&k3_clks 162 1>, <&k3_clks 162 1>;
    +                       assigned-clock-parents = <&serdes_refclk>, <&serdes_refclk>, <&serdes_refclk>;
                            #address-cells = <1>;
                            #size-cells = <0>;
                            #clock-cells = <1>;

  • Hi Bin,

    Still not seeing my inserted card show up in lspci but I'm having a colleague test with another card when he gets a chance. Will get back to you with the results.

    Thanks,
    Matt McKee

  • Hi Bin, no luck with this patch. It looks like we're close but the PCIe interface repeatedly reports "link down" like the following:
    [   17.981799] j721e-pcie f102000.pcie: LINK DOWN!

    Are there any other possible configuration vectors to try?

    Thanks,
    Matt

  • Hi Matt,

    Let me look into it and get back to you next week.

  • Any luck? We've been able to implement support for external PCIe reference clocks for our other TI designs in the past and would really like to get this working on the AM64x. The incomplete documentation is a major hurdle.

    Thanks,
    Matt McKee

  • Hi Matt,

    If you don't configure PCIe to use external refclk (using the patch above), and let it to use internal refclk, can the PCIe enumerate any device?

    How is the PCIe slot PERST signal is designed on your board? The AM64x GPEVM uses a GPIO pin for the PCIe RESET. And the GPIO pin is specified in the PCIe node of the evm dts file - k3-am642-evm.dts:

    725 &pcie0_rc {                                                                     
    726         reset-gpios = <&exp1 5 GPIO_ACTIVE_HIGH>;                               
                ...
    730 };

  • Hi Bin,

    If we don't configure PCIe to use the ext refclk, PCIe does not enumerate any devices. Would you expect this to work even if the external reference clock signals are being routed to the PCIe slot?

    Regarding the PERST signal, we also use a GPIO and have specified it in the pcie0_rc node in the same fashion, along with a pinmux in the usual spot.

    Thanks,
    Matt McKee

  • Hi Matt,

    If the external ref clock has the same frequency as the internal ref clock, I would expect the device should be enumerated, even if external ref clock is routed to the PCIe slot.

    Since the ref clock signals of AM64x Serdes REFCLK, PCIe slot, and the external ref clock are all routed together in your board design, is it possible to remove/disable the external ref clock source? Then set the DTS to use internal ref clock, your system would be exactly the same as the EVM. We can check if any device can be enumerated in the scenario.

    Also do you observe the GPIO reset signal is triggered on the PCIe slot during Linux boot time?

  • Hi Bin,

    Sorry for the delayed response, was out of the office. Your solution for enabling the refclk works. We had a related issue in how the PHYs were being defined in the device tree but with that sorted out it's working. Thanks again.

  • Hi Matt,

    No worries. Glad the issue is resolved. Thanks for the update.