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DM816x: Software reset and start of IVAHD0 ARM9 processors from an application running on the Ducati M3 processor.

Is there a way to reset and start a slave processor from a master host processor via software?

Specifically; I am trying to load a code on the two ARM9 processors of the IVAHD0 video accelerator of the Ducati subsystem of the DM816x SoC. The M3 host is running the app that does this. After loading the code and bringing the ARM9 processors out of reset the two ARM9 processors just halt. I need to run them manually from the CCS. Is there a way to do this from the M3 app automatically?

  • Hello,

    Loading of the processors within the video accelerators is handled automatically by the device drivers.  If you need more details please contact your local FAE.

    Regards,
    Marc

  • Are you confusing the M3 with the DSP? Last time I checked it was the DSP that controlled the IVAHD stuff (see page 16 of the datasheet - "The Media Controller has the responsibility of managing the HDVPSS module.") The M3 is to do with the VPSS.

    Ralph

  • Ralph,

    No, the three IVAHD accelerators are all controlled by one of the ARM-M3 processors, not the C674 DSP. This M3 processor is named as CortexM3_RTOS_0 in the TI816x target configuration.

    The VPSS is controlled by another ARM-M3 processor, named CortexM3_ISS_0 in the TI816x target configuration.

    Nejat.

  • I think you must be using a newer EZSDK than me as my documentation doesn't mention anything about IVAHD (same as HDVICP I assumed) or this extra Cortex M3. To be honest it took me a while to find out that the media controller was the same as the Ducati M3 mentioned only a few times in the documentation.

    Ralph