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TPS6590379/Gpio7 connection problem

Oleg Solovev
Expert 1985 points
Other Parts Discussed in Thread: AM5749

Hello Support.

I use custom board based on AM5749(Processor SDK Linux RT for AM57x v05.02.00.10).

Scheme of my board was based on AM574x Industrial Development Kit datasheet.

The problem is:

On a sheet 5 we have a scheme connection of PMIC TPS6590379. Let's look at the pin gpio 7. It's pull up to 3.3v.

But if we open datasheet for PMIC we will see... VIH Max it is (VRTC+0.3). How we know VRTS it's internal LDO of PMIC and it's have 1.8v output.

My question is: Is it some ERROR in scheme? Or I didn't understood something?

BR,

Oleg

  • 0
    TI__Genius 13216 points

    Hi Oleg,

    With fail-safe, the maximum input voltage on GPIO7 is 5.25V. So, while 3.3V is not strictly necessary, it is acceptable to use.

    Thanks,

    Daniel W

  • 0
    Expert 1985 points

    Ok. The second question is: Like I understood this pin need for activate "First supply detection" mode. It is need for power on after applying a voltage like described here:

    But if we look at the scheme the 3_3V it is one of the output of this PMIC.  Which will start after some power sequence (after some time). While VRTS it is just LDO and turn on much more faster then all PMIC outputs. I try to understood it because on this picture we can see this phrase: tying the POWERHOLD
    signal to a permanent logic HIGH. For example after warm reset it is not be a permanent 3.3V.

  • 0 in reply to Oleg Solovev
    TI__Genius 13216 points

    Hi Oleg,

    It is an option to tie powerhold to high. With this method, powerhold does not serve much function other than having the pmic be always on with a high enough voltage source. It is not an issue to have powerhold tied to a later rail though because the pmic will wait 8s for powerhold to go high after the power sequence completes before shutting down again. Using powerhold this way, it will ensure the pmic shuts down if the rail goes low.

    Thanks,

    Daniel W