AM3352: Timing diagram for asynchronous page read on multiplexed device

Kien

Part Number: AM3352

Hi champs,

In TRM, Figure 7-12 and 7-13 show the timing diagram for asynchronous single read/2 successive reads on multiplexed device. Do we have similar diagram for page read?

In those timing diagram, does the RDCYCLETIME need to be higher than the ACCESSTIME for the device to work properly?

Regards,

Kien Nguyen

over 4 years ago

0 Mark M over 4 years ago

TI__Mastermind 30711 points

Hi Kien,

I'll look for a diagram that shows asynchronous page read on multiplexed device.

Since you are at TIer, you can access the deprecated wiki that shows the rules for GPMC.

https://processors.wiki.ti.com/index.php/Tips_for_configuring_Sitara_GPMC_registers

Rule 4. If GPMCFCLKDIVIDER is greater than 0, RDCYCLETIME must be greater or equal to RDACCESSTIME+2. If GPMCFCLKDIVIDER is 0, RDCYCLETIME must be greater or equal to RDACCESSTIME+1.

Regards,
Mark

0 Kien over 4 years ago in reply to Mark M

TI__Expert 4676 points

Hi Mark,

Any update on the diagram?

Regards,

Kien Nguyen

0 Kien over 4 years ago in reply to Mark M

TI__Expert 4676 points

Hi Mark,

We did some more tests and the results follow the rule #4 as you mentioned.

However, there is a case when we use only 1 memory device on the bus.

Could you please advise why the setting A (RDACCESSTIME = RDCYCLETIME = 3) doesn’t work for 2 device on the bus but it works for 1 device?

Regards,

Kien Nguyen

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AM3352: Timing diagram for asynchronous page read on multiplexed device