AM6548: PRU Error Log to cause kernel crash on SDK8.0.x.

Rio Chan

Genius 14625 points

Part Number: AM6548

Hi.

Customer is testing their PCB with 2 DP83867 (on the PRU) and 1 DP83822 (on the CPSW).

The kernel is stuck in the attached log or below.

please guide how to solve.

Thanks.

8_0_0_2_1.txt

BR Rio

[ 28.822606] pps pps1: new PPS source ptp3
[ 28.833017] icssg-prueth icssg2-eth: PSI-L request err -22
[ 28.834626] remoteproc remoteproc15: stopped remote processor b20a000.txpru
[ 28.834646] remoteproc remoteproc14: stopped remote processor b204000.rtu
[ 28.834655] remoteproc remoteproc13: stopped remote processor b234000.pru
[ 32.765464] icssg-prueth icssg1-eth eth2: Link is Up - 1Gbps/Full - flow control off
[ 32.765545] IPv6: ADDRCONF(NETDEV_CHANGE): eth2: link becomes ready
[ 37.979898] ------------[ cut here ]------------
[ 37.979915] NETDEV WATCHDOG: eth2 (icssg-prueth): transmit queue 0 timed out
[ 37.979987] WARNING: CPU: 0 PID: 10 at net/sched/sch_generic.c:442 dev_watchdog+0x33c/0x348
[ 37.980009] Modules linked in: xhci_plat_hcd rpmsg_char xhci_hcd usbcore ti_am335x_adc kfifo_buf omap_rng rng_core irq_pruss_intc dwc3 udc_core roles usb_common crct10dif_ce icssg_prueth pru_rproc icss_iep ti_k3_r5_remoteproc virtio_rpmsg_bus m_can_platform m_can can_dev ti_am335x_tscadc ti_cal videobuf2_dma_contig v4l2_fwnode videobuf2_memops videobuf2_v4l2 videobuf2_common pruss sa2ul sha512_generic authenc phy_omap_usb2 dwc3_keystone at24 bluetooth ecdh_generic ecc rfkill pvrsrvkm(O) sch_fq_codel cryptodev(O) ipv6
[ 37.980133] CPU: 0 PID: 10 Comm: ksoftirqd/0 Tainted: G O 5.10.41-rt39-g0701a5b58c #1
[ 37.980142] Hardware name: Texas Instruments AM654 Base Board (DT)
[ 37.980146] pstate: 40000005 (nZcv daif -PAN -UAO -TCO BTYPE=--)
[ 37.980153] pc : dev_watchdog+0x33c/0x348
[ 37.980159] lr : dev_watchdog+0x33c/0x348
[ 37.980165] sp : ffff800011263c20
[ 37.980167] x29: ffff800011263c20 x28: ffff000009c01500
[ 37.980175] x27: 0000000000000004 x26: 0000000000000180
[ 37.980182] x25: 00000000ffffffff x24: 0000000000000000
[ 37.980189] x23: ffff0000093fe3e0 x22: ffff0000093fe000
[ 37.980196] x21: ffff0000093fe4b0 x20: ffff800011029000
[ 37.980203] x19: 0000000000000000 x18: 0000000000000000
[ 37.980210] x17: 0000000000000000 x16: 0000000000000000
[ 37.980216] x15: ffff000000101400 x14: ffffffffffffffff
[ 37.980223] x13: ffff800011154f44 x12: ffff800011154f37
[ 37.980231] x11: 00000000000001c4 x10: ffff80001104c268
[ 37.980238] x9 : 00000000fffffffe x8 : 6f2064656d697420
[ 37.980245] x7 : 3020657565757120 x6 : ffff800011263a70
[ 37.980252] x5 : ffff00003fd8cb28 x4 : 0000000000000000
[ 37.980258] x3 : 0000000000000027 x2 : 0000000100000000
[ 37.980265] x1 : 8841ee2ead6fa900 x0 : 0000000000000000
[ 37.980273] Call trace:
[ 37.980276] dev_watchdog+0x33c/0x348
[ 37.980282] call_timer_fn.isra.0+0x24/0x80
[ 37.980296] run_timer_softirq+0x4cc/0x530
[ 37.980304] efi_header_end+0x110/0x214
[ 37.980312] run_ksoftirqd+0x50/0xb8
[ 37.980320] smpboot_thread_fn+0x2bc/0x2f8
[ 37.980328] kthread+0x174/0x198
[ 37.980336] ret_from_fork+0x10/0x34
[ 37.980345] ---[ end trace 0000000000000002 ]---
[ 38.980602] icssg-prueth icssg1-eth eth2: xmit timeout
[ 44.123908] icssg-prueth icssg1-eth eth2: xmit timeout
[ 48.987903] icssg-prueth icssg1-eth eth2: xmit timeout

over 3 years ago

0 Rio Chan over 3 years ago

TI__Genius 14625 points

Hi.

#1. This issue only happens on the customer's PCB, which is using 1G DDR.

#2. This issue is not reproduced on TI EVM, (Confirmed by the customer as well), TI EVM uses 4G DDR.

#3. So, I think this issue matters the setting of the PRU memory ranges in the DTSI.

please tell us how to set the PRU memory assignment if the DDR is changed from 4G to 1G.

ps. if you need, I can ask customer to post their DTSI here.

THanks.

BR Rio

0 Eric Hsieh4 over 3 years ago in reply to Rio Chan

Expert 1300 points

Hi,

Attached the dts file.

Fullscreen k3-am654-base-board_8_0_0_2.txt Download

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
 */

/dts-v1/;

#include "k3-am654.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
	compatible =  "ti,am654-evm", "ti,am654";
	model = "Texas Instruments AM654 Base Board";

	aliases {
		ethernet1 = &icssg1_emac0;
		ethernet2 = &icssg2_emac0;
	};

	chosen {
		stdout-path = "serial2:115200n8";
		bootargs = "earlycon=ns16550a,mmio32,0x02800000";
	};

	memory@80000000 {
		device_type = "memory";

		/* 1G RAM */
		reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
	};

	reserved_memory: reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		secure_ddr: secure-ddr@9e800000 {
			reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
			alignment = <0x1000>;
			no-map;
		};

		mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa0000000 0 0x100000>;
			no-map;
		};

		mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa0100000 0 0xf00000>;
			no-map;
		};

		mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa1000000 0 0x100000>;
			no-map;
		};

		mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
			compatible = "shared-dma-pool";
			reg = <0 0xa1100000 0 0xf00000>;
			no-map;
		};

		rtos_ipc_memory_region: ipc-memories@a2000000 {
			reg = <0x00 0xa2000000 0x00 0x00200000>;
			alignment = <0x1000>;
			no-map;
		};
	};

	eeprom_gpio: eeprom_gpio {
		compatible = "eeprom-gpio";
		eeprom-gpio = <&wkup_gpio0 7 GPIO_ACTIVE_HIGH>;
	};

	clk_ov5640_fixed: fixed-clock-ov5640 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24000000>;
	};


	evm_12v0: fixedregulator-evm12v0 {
		/* main supply */
		compatible = "regulator-fixed";
		regulator-name = "evm_12v0";
		regulator-min-microvolt = <12000000>;
		regulator-max-microvolt = <12000000>;
		regulator-always-on;
		regulator-boot-on;
	};

	vcc3v3_io: fixedregulator-vcc3v3io {
		/* Output of TPS54334 */
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3_io";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
		vin-supply = <&evm_12v0>;
	};

	vdd_mmc1_sd: fixedregulator-sd {
		compatible = "regulator-fixed";
		regulator-name = "vdd_mmc1_sd";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		enable-active-high;
		vin-supply = <&vcc3v3_io>;
		//gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>;
	};
	
		leds {
		pinctrl-names = "default";
		pinctrl-0 = <&ledgpio0_pins_default &ledgpio1_pins_default &ledgpio2_pins_default>;

		compatible = "gpio-leds";

		led1 {
			label = "LED-RUN";
			gpios = <&main_gpio0 27 GPIO_ACTIVE_HIGH>;
		};

		led2 {
			label = "LED-ERR";
			gpios = <&main_gpio1 70 GPIO_ACTIVE_HIGH>;
		};

		led3 {
			label = "LED-BUS";
			gpios = <&main_gpio1 48 GPIO_ACTIVE_HIGH>;
		};

		led4 {
			label = "LED-232TX";
			gpios = <&main_gpio1 21 GPIO_ACTIVE_HIGH>;
		};

		led5 {
			label = "LED-232RX";
			gpios = <&main_gpio1 45 GPIO_ACTIVE_HIGH>;
		};

		led6 {
			label = "LED-485TX";
			gpios = <&main_gpio1 87 GPIO_ACTIVE_HIGH>;
		};

		led7 {
			label = "LED-485RX";
			gpios = <&main_gpio1 46 GPIO_ACTIVE_HIGH>;
		};

		led8 {
			label = "LED-SD";
			gpios = <&main_gpio1 47 GPIO_ACTIVE_HIGH>;
		};
	};

	/* Dual Ethernet application node on PRU-ICSSG1 */
	icssg1_eth: icssg1-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		pinctrl-0 = <&ethernet0_pins_default>;
		sram = <&msmc_ram>;
		ti,prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>,
			<&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;
		mii-g-rt = <&icssg1_mii_g_rt>;
		mii-rt = <&icssg1_mii_rt>;
		iep = <&icssg1_iep0>,  <&icssg1_iep1>;

		interrupt-parent = <&icssg1_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_udmap 0xc200>, /* egress slice 0 */
		       <&main_udmap 0xc201>, /* egress slice 0 */
		       <&main_udmap 0xc202>, /* egress slice 0 */
		       <&main_udmap 0xc203>, /* egress slice 0 */
		       <&main_udmap 0xc204>, /* egress slice 1 */
		       <&main_udmap 0xc205>, /* egress slice 1 */
		       <&main_udmap 0xc206>, /* egress slice 1 */
		       <&main_udmap 0xc207>, /* egress slice 1 */

		       <&main_udmap 0x4200>, /* ingress slice 0 */
		       <&main_udmap 0x4201>, /* ingress slice 1 */
		       <&main_udmap 0x4202>, /* mgmnt rsp slice 0 */
		       <&main_udmap 0x4203>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1",
			    "rxmgm0", "rxmgm1";

		icssg1_emac0: ethernet-mii0 {
			phy-handle = <&icssg1_phy0>;
			phy-mode = "rgmii-rxid";
			syscon-rgmii-delay = <&scm_conf 0x4110>;
			/* Filled in by bootloader */
			local-mac-address = [00 00 00 00 00 00];
		};
	};

	/* Dual Ethernet application node on PRU-ICSSG2 */
	icssg2_eth: icssg2-eth {
		compatible = "ti,am654-icssg-prueth";
		pinctrl-names = "default";
		//Eric- pinctrl-0 = <&icssg2_rgmii_pins_default>;
		pinctrl-0 = <&ethernet1_pins_default>;
		sram = <&msmc_ram>;
		ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
			<&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
		firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
				"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
				"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

		ti,pruss-gp-mux-sel = <2>,      /* MII mode */
				      <2>,
				      <2>,
				      <2>,	/* MII mode */
				      <2>,
				      <2>;

		mii-g-rt = <&icssg2_mii_g_rt>;
		mii-rt = <&icssg2_mii_rt>;
		iep = <&icssg2_iep0>,  <&icssg2_iep1>;

		interrupt-parent = <&icssg2_intc>;
		interrupts = <24 0 2>, <25 1 3>;
		interrupt-names = "tx_ts0", "tx_ts1";

		dmas = <&main_udmap 0xc300>, /* egress slice 0 */
		       <&main_udmap 0xc301>, /* egress slice 0 */
		       <&main_udmap 0xc302>, /* egress slice 0 */
		       <&main_udmap 0xc303>, /* egress slice 0 */
		       <&main_udmap 0xc304>, /* egress slice 1 */
		       <&main_udmap 0xc305>, /* egress slice 1 */
		       <&main_udmap 0xc306>, /* egress slice 1 */
		       <&main_udmap 0xc307>, /* egress slice 1 */

		       <&main_udmap 0x4300>, /* ingress slice 0 */
		       <&main_udmap 0x4301>, /* ingress slice 1 */
		       <&main_udmap 0x4302>, /* mgmnt rsp slice 0 */
		       <&main_udmap 0x4303>; /* mgmnt rsp slice 1 */
		dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
			    "tx1-0", "tx1-1", "tx1-2", "tx1-3",
			    "rx0", "rx1",
			    "rxmgm0", "rxmgm1";

		icssg2_emac0: ethernet-mii0 {
			phy-handle = <&icssg2_phy0>;
			phy-mode = "rgmii-rxid";
			syscon-rgmii-delay = <&scm_conf 0x4120>;
			/* Filled in by bootloader */
			local-mac-address = [00 00 00 00 00 00];
		};
	};
};

&wkup_pmx0 {
	pinctrl-names = "default";
	pinctrl-0 = <&eepromgpio_pins_default &iovolctrl_pins_default &i2c0switch_pins_default>;
	
	phy2ax58100_pins_default: phy2ax58100_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x0058, PIN_INPUT, 1) /* (N4) MCU_RGMII1_TX_CTL.MCU_RMII1_CRS_DV */
			AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 1) /* (N5) MCU_RGMII1_RX_CTL.MCU_RMII1_RX_ER */
			AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 1) /* (M4) MCU_RGMII1_TD1.MCU_RMII1_TXD1 */
			AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 1) /* (M5) MCU_RGMII1_TD0.MCU_RMII1_TXD0 */
			AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 1) /* (M6) MCU_RGMII1_RD1.MCU_RMII1_RXD1 */
			AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 1) /* (L6) MCU_RGMII1_RD0.MCU_RMII1_RXD0 */
			AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 1) /* (N1) MCU_RGMII1_TXC.MCU_RMII1_TX_EN */
			AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 1) /* (M1) MCU_RGMII1_RXC.MCU_RMII1_REF_CLK */
		>;
	};

	mcan0_pins_default: mcan0_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00ac, PIN_INPUT, 0) /* (W2) MCU_MCAN0_RX */
			AM65X_WKUP_IOPAD(0x00a8, PIN_OUTPUT, 0) /* (W1) MCU_MCAN0_TX */
		>;
	};

	phy2ax58100_mdio2_pins_default: phy2ax58100_mdio2_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
			AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
		>;
	};

	eepromgpio_pins_default: eepromgpio_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00cc, PIN_INPUT, 7) /* (AC1) WKUP_GPIO0_7 */
		>;
	};

	iovolctrl_pins_default: iovolctrl_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00c8, PIN_OUTPUT, 7) /* (AC2) WKUP_GPIO0_6 */
		>;
	};

	i2c0switch_pins_default: i2c0switch_pins_default {
		pinctrl-single,pins = <
			AM65X_WKUP_IOPAD(0x00D8, PIN_OUTPUT, 7) /* (AB3) WKUP_GPIO0_10 */
		>;
	};
};

&main_pmx0 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio0_pins_default &gpio1_pins_default &mygpmc3_pins_default>;

	gpio1_pins_default: gpio1_pins_default {
		pinctrl-single,pins = <
			//AM65X_IOPAD(0x01d4, PIN_OUTPUT, 7) /* (AG12) SPI1_CS1.GPIO1_21 */	/* RS232-TX-LED */
			AM65X_IOPAD(0x01ec, PIN_OUTPUT, 7) /* (AG11) UART0_CTSn.GPIO1_27 */
			AM65X_IOPAD(0x01f0, PIN_INPUT, 7) /* (AD11) UART0_RTSn.GPIO1_28 */
			AM65X_IOPAD(0x01f4, PIN_INPUT, 1) /* (V24) PRG0_PRU0_GPO0.GPIO1_29 */
			AM65X_IOPAD(0x01f8, PIN_INPUT, 1) /* (W25) PRG0_PRU0_GPO1.GPIO1_30 */
			AM65X_IOPAD(0x01fc, PIN_INPUT, 1) /* (W24) PRG0_PRU0_GPO2.GPIO1_31 */
			AM65X_IOPAD(0x0200, PIN_INPUT, 1) /* (AA27) PRG0_PRU0_GPO3.GPIO1_32 */
			AM65X_IOPAD(0x0204, PIN_INPUT, 1) /* (Y24) PRG0_PRU0_GPO4.GPIO1_33 */
			AM65X_IOPAD(0x0208, PIN_INPUT, 1) /* (V28) PRG0_PRU0_GPO5.GPIO1_34 */
			AM65X_IOPAD(0x020c, PIN_INPUT, 1) /* (Y25) PRG0_PRU0_GPO6.GPIO1_35 */
			AM65X_IOPAD(0x0210, PIN_INPUT, 1) /* (U27) PRG0_PRU0_GPO7.GPIO1_36 */
			AM65X_IOPAD(0x0214, PIN_INPUT, 7) /* (V27) PRG0_PRU0_GPO8.GPIO1_37 */
			AM65X_IOPAD(0x0218, PIN_INPUT, 7) /* (V26) PRG0_PRU0_GPO9.GPIO1_38 */
			AM65X_IOPAD(0x021c, PIN_INPUT, 7) /* (U25) PRG0_PRU0_GPO10.GPIO1_39 */
			AM65X_IOPAD(0x0220, PIN_INPUT, 7) /* (AB25) PRG0_PRU0_GPO11.GPIO1_40 */
			AM65X_IOPAD(0x0224, PIN_INPUT, 7) /* (AD27) PRG0_PRU0_GPO12.GPIO1_41 */
			AM65X_IOPAD(0x0228, PIN_INPUT, 7) /* (AC26) PRG0_PRU0_GPO13.GPIO1_42 */
			AM65X_IOPAD(0x022c, PIN_INPUT, 7) /* (AD26) PRG0_PRU0_GPO14.GPIO1_43 */
			AM65X_IOPAD(0x0230, PIN_INPUT, 7) /* (AA24) PRG0_PRU0_GPO15.GPIO1_44 */
			//AM65X_IOPAD(0x0234, PIN_OUTPUT, 7) /* (AD28) PRG0_PRU0_GPO16.GPIO1_45 */ /* RS232-RX-LED */
			//AM65X_IOPAD(0x0238, PIN_OUTPUT, 7) /* (U26) PRG0_PRU0_GPO17.GPIO1_46 */	/* RS485-RX-LED */
			//AM65X_IOPAD(0x023c, PIN_OUTPUT, 7) /* (V25) PRG0_PRU0_GPO18.GPIO1_47 */	/* SD-CARD-READY-LED */
			//AM65X_IOPAD(0x0240, PIN_OUTPUT, 7) /* (U24) PRG0_PRU0_GPO19.GPIO1_48 */	/* BUSFAULT-LED */
			AM65X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (AB28) PRG0_PRU1_GPO0.GPIO1_49 */
			AM65X_IOPAD(0x0248, PIN_OUTPUT, 0) /* (AC28) PRG0_PRU1_GPO1.GPIO1_50 */
			AM65X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (AC27) PRG0_PRU1_GPO2.GPIO1_51 */
			AM65X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (AB26) PRG0_PRU1_GPO3.GPIO1_52 */
			AM65X_IOPAD(0x0284, PIN_INPUT, 7) /* (AC24) PRG0_PRU1_GPO16.GPIO1_65 */
			AM65X_IOPAD(0x028c, PIN_INPUT, 7) /* (Y26) PRG0_PRU1_GPO18.GPIO1_67 */
			AM65X_IOPAD(0x0290, PIN_INPUT, 7) /* (W26) PRG0_PRU1_GPO19.GPIO1_68 */
			AM65X_IOPAD(0x0294, PIN_INPUT, 7) /* (AE26) PRG0_MDIO0_MDIO.GPIO1_69 */
			//AM65X_IOPAD(0x0298, PIN_OUTPUT, 7) /* (AE28) PRG0_MDIO0_MDC.GPIO1_70 */	/* ERROR-LED */
                        AM65X_IOPAD(0x01d0, PIN_OUTPUT_PULLDOWN, 7) /* (AD12) SPI1_CS0.GPIO1_20 */
		>;
	};

	ledgpio1_pins_default: ledgpio1_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01d4, PIN_OUTPUT, 7) /* (AG12) GPIO1_21 */	/* RS232-TX-LED */
			AM65X_IOPAD(0x0234, PIN_OUTPUT, 7) /* (AD28) GPIO1_45 */ /* RS232-RX-LED */
			AM65X_IOPAD(0x0238, PIN_OUTPUT, 7) /* (U26) GPIO1_46 */	/* RS485-RX-LED */
			AM65X_IOPAD(0x023c, PIN_OUTPUT, 7) /* (V25) GPIO1_47 */	/* SD-CARD-READY-LED */
			AM65X_IOPAD(0x0240, PIN_OUTPUT, 7) /* (U24) GPIO1_48 */	/* BUSFAULT-LED */
			AM65X_IOPAD(0x0298, PIN_OUTPUT, 7) /* (AE28) GPIO1_70 */	/* ERROR-LED */
		>;
	};

	gpio0_pins_default: gpio0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0040, PIN_OUTPUT, 7) /* (R28) GPMC0_CLK.GPIO0_16 */ /*ETH1-PHY-RESET*/
			AM65X_IOPAD(0x0058, PIN_INPUT, 7) /* (R26) GPMC0_WAIT0.GPIO0_22 */
			AM65X_IOPAD(0x0060, PIN_OUTPUT, 7) /* (T25) GPMC0_WPn.GPIO0_24 */
			AM65X_IOPAD(0x0064, PIN_OUTPUT, 7) /* (T24) GPMC0_DIR.GPIO0_25 */
			AM65X_IOPAD(0x0068, PIN_INPUT, 7) /* (R24) GPMC0_CSn0.GPIO0_26 */
			//AM65X_IOPAD(0x006c, PIN_OUTPUT | PIN_INPUT, 7) /* (T23) GPMC0_CSn1.GPIO0_27 */ /* RUN-LED */
			AM65X_IOPAD(0x0070, PIN_INPUT, 7) /* (R25) GPMC0_CSn2.GPIO0_28 */
			AM65X_IOPAD(0x0074, PIN_INPUT, 7) /* (T27) GPMC0_CSn3.GPIO0_29 */
			AM65X_IOPAD(0x00ac, PIN_INPUT, 1) /* (AH15) PRG2_PRU1_GPO0.GPIO0_43 */
			AM65X_IOPAD(0x00b0, PIN_INPUT, 1) /* (AC16) PRG2_PRU1_GPO1.GPIO0_44 */
			AM65X_IOPAD(0x00b4, PIN_INPUT, 1) /* (AD17) PRG2_PRU1_GPO2.GPIO0_45 */
			AM65X_IOPAD(0x00b8, PIN_INPUT, 1) /* (AH14) PRG2_PRU1_GPO3.GPIO0_46 */
			AM65X_IOPAD(0x0108, PIN_OUTPUT, 7) /* (AH25) PRG1_PRU0_GPO10.GPIO0_66 */ /*ETH0-PHY-RESET*/
			AM65X_IOPAD(0x0124, PIN_OUTPUT, 7) /* (AH26) PRG1_PRU0_GPO17.GPIO0_73 */ /*ECAT2-PHY-RST*/
		>;
	};

	ledgpio0_pins_default: ledgpio0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x006c, PIN_OUTPUT | PIN_INPUT, 7) /* (T23) GPIO0_27 */ /* RUN-LED */
		>;
	};

	mygpmc3_pins_default: mygpmc3_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x00bc, PIN_OUTPUT, 3) /* (AG14) PRG2_PRU1_GPO4.GPMC0_A8 */
			AM65X_IOPAD(0x00c0, PIN_OUTPUT, 3) /* (AG15) PRG2_PRU1_GPO5.GPMC0_A7 */
			AM65X_IOPAD(0x00c4, PIN_OUTPUT, 3) /* (AC17) PRG2_PRU1_GPO6.GPMC0_A6 */
			AM65X_IOPAD(0x00cc, PIN_OUTPUT, 3) /* (AD15) PRG2_PRU1_GPO8.GPMC0_A4 */
			AM65X_IOPAD(0x00d0, PIN_OUTPUT, 3) /* (AF14) PRG2_PRU1_GPO9.GPMC0_A3 */
			AM65X_IOPAD(0x00d4, PIN_OUTPUT, 3) /* (AC15) PRG2_PRU1_GPO10.GPMC0_A2 */
			AM65X_IOPAD(0x00d8, PIN_OUTPUT, 3) /* (AD14) PRG2_PRU1_GPO11.GPMC0_A1 */
			AM65X_IOPAD(0x003c, PIN_INPUT, 0) /* (R27) GPMC0_AD15 */
			AM65X_IOPAD(0x0038, PIN_INPUT, 0) /* (P24) GPMC0_AD14 */
			AM65X_IOPAD(0x0034, PIN_INPUT, 0) /* (N25) GPMC0_AD13 */
			AM65X_IOPAD(0x0030, PIN_INPUT, 0) /* (N26) GPMC0_AD12 */
			AM65X_IOPAD(0x002c, PIN_INPUT, 0) /* (P27) GPMC0_AD11 */
			AM65X_IOPAD(0x0028, PIN_INPUT, 0) /* (P28) GPMC0_AD10 */
			AM65X_IOPAD(0x0024, PIN_INPUT, 0) /* (M26) GPMC0_AD9 */
			AM65X_IOPAD(0x0020, PIN_INPUT, 0) /* (N23) GPMC0_AD8 */
			AM65X_IOPAD(0x001c, PIN_INPUT, 0) /* (M25) GPMC0_AD7 */
			AM65X_IOPAD(0x0018, PIN_INPUT, 0) /* (N28) GPMC0_AD6 */
			AM65X_IOPAD(0x0014, PIN_INPUT, 0) /* (N27) GPMC0_AD5 */
			AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (N24) GPMC0_AD4 */
			AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (M24) GPMC0_AD3 */
			AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (M28) GPMC0_AD2 */
			AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (M23) GPMC0_AD1 */
			AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (M27) GPMC0_AD0 */
			AM65X_IOPAD(0x0054, PIN_OUTPUT, 0) /* (P23) GPMC0_BE1n */
			AM65X_IOPAD(0x0048, PIN_OUTPUT, 0) /* (P26) GPMC0_OEn_REn */
			AM65X_IOPAD(0x004c, PIN_OUTPUT, 0) /* (U28) GPMC0_WEn */
		>;
	};

	main_mmc0_pins_default: main-mmc0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
			AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
			AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
			AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
			AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
			AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
			AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
			AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
			AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
			AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
			AM65X_IOPAD(0x01b4, PIN_INPUT_PULLUP, 0) /* (A23) MMC0_SDCD */
			AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
		>;
	};

	main_mmc1_pins_default: main-mmc1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
			AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
			AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
			AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
			AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
			AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
			AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
			AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
		>;
	};

	icssg1_mdio_pins_default: icssg1_mdio_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0180, PIN_INPUT, 0) /* (AD18) PRG1_MDIO0_MDIO */
			AM65X_IOPAD(0x0184, PIN_OUTPUT, 0) /* (AH18) PRG1_MDIO0_MDC */
		>;
	};

	ethernet0_pins_default: ethernet0_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x00e0, PIN_INPUT, 2) /* (AE22) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */
			AM65X_IOPAD(0x00e4, PIN_INPUT, 2) /* (AG24) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */
			AM65X_IOPAD(0x00e8, PIN_INPUT, 2) /* (AF23) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */
			AM65X_IOPAD(0x00ec, PIN_INPUT, 2) /* (AD21) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */
			AM65X_IOPAD(0x0110, PIN_INPUT, 2) /* (AH20) PRG1_PRU0_GPO12.PRG1_RGMII1_TD0 */
			AM65X_IOPAD(0x0114, PIN_INPUT, 2) /* (AH21) PRG1_PRU0_GPO13.PRG1_RGMII1_TD1 */
			AM65X_IOPAD(0x0118, PIN_INPUT, 2) /* (AG20) PRG1_PRU0_GPO14.PRG1_RGMII1_TD2 */
			AM65X_IOPAD(0x011c, PIN_INPUT, 2) /* (AD19) PRG1_PRU0_GPO15.PRG1_RGMII1_TD3 */
			AM65X_IOPAD(0x0120, PIN_INPUT, 2) /* (AD20) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */
			AM65X_IOPAD(0x010c, PIN_INPUT, 2) /* (AF21) PRG1_PRU0_GPO11.PRG1_RGMII1_TX_CTL */
			AM65X_IOPAD(0x00f8, PIN_INPUT, 2) /* (AF22) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */
			AM65X_IOPAD(0x00f0, PIN_INPUT, 2) /* (AG23) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */

			//ethercat1_pins_default
			AM65X_IOPAD(0x0130, PIN_INPUT, 2) /* (AH24) PRG1_PRU1_GPO0.PRG1_RGMII2_RD0 */
			AM65X_IOPAD(0x0134, PIN_INPUT, 2) /* (AH23) PRG1_PRU1_GPO1.PRG1_RGMII2_RD1 */
			AM65X_IOPAD(0x0138, PIN_INPUT, 2) /* (AG21) PRG1_PRU1_GPO2.PRG1_RGMII2_RD2 */
			AM65X_IOPAD(0x013c, PIN_INPUT, 2) /* (AH22) PRG1_PRU1_GPO3.PRG1_RGMII2_RD3 */
			AM65X_IOPAD(0x0160, PIN_INPUT, 2) /* (AE20) PRG1_PRU1_GPO12.PRG1_RGMII2_TD0 */
			AM65X_IOPAD(0x0164, PIN_INPUT, 2) /* (AF19) PRG1_PRU1_GPO13.PRG1_RGMII2_TD1 */
			AM65X_IOPAD(0x0168, PIN_INPUT, 2) /* (AH19) PRG1_PRU1_GPO14.PRG1_RGMII2_TD2 */
			AM65X_IOPAD(0x016c, PIN_INPUT, 2) /* (AG19) PRG1_PRU1_GPO15.PRG1_RGMII2_TD3 */
			AM65X_IOPAD(0x0170, PIN_INPUT, 2) /* (AE19) PRG1_PRU1_GPO16.PRG1_RGMII2_TXC */
			AM65X_IOPAD(0x015c, PIN_INPUT, 2) /* (AC20) PRG1_PRU1_GPO11.PRG1_RGMII2_TX_CTL */
			AM65X_IOPAD(0x0148, PIN_INPUT, 2) /* (AG22) PRG1_PRU1_GPO6.PRG1_RGMII2_RXC */
			AM65X_IOPAD(0x0140, PIN_INPUT, 2) /* (AE21) PRG1_PRU1_GPO4.PRG1_RGMII2_RX_CTL */
		>;
	};

	ethernet1_mdio_pins_default: ethernet1_mdio_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0094, PIN_INPUT, 2) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */
			AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */
		>;
	};

	ethernet1_pins_default: ethernet1_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */
			AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */
			AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */
			AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */
			AM65X_IOPAD(0x0098, PIN_INPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */
			AM65X_IOPAD(0x009c, PIN_INPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */
			AM65X_IOPAD(0x00a0, PIN_INPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */
			AM65X_IOPAD(0x00a4, PIN_INPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */
			AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */
			AM65X_IOPAD(0x0090, PIN_INPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */
			AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */
			AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */
		>;
	};

	main_spi0_pins_default: main-spi0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
			AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
			AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
			AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
			AM65X_IOPAD(0x01c0, PIN_OUTPUT, 0) /* (AF13) SPI0_CS1 */
		>;
	};

	myspi2_pins_default: myspi2_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01d8, PIN_INPUT, 0) /* (AH12) SPI1_CLK */
			AM65X_IOPAD(0x01dc, PIN_INPUT, 0) /* (AE12) SPI1_D0 */
			AM65X_IOPAD(0x01e0, PIN_INPUT, 0) /* (AF12) SPI1_D1 */
			//AM65X_IOPAD(0x01d0, PIN_OUTPUT, 0) /* (AD12) SPI1_CS0 */
		>;
	};

	main_uart0_pins_default: main-uart0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) GPIO1_25 UART0_RXD */
			AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) GPIO1_26 UART0_TXD */
		>;
	};

	rs232_pins_default: rs232_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0288, PIN_INPUT, 6) /* (Y27) GPIO1_66 RS232-RXD */
			AM65X_IOPAD(0x0260, PIN_OUTPUT, 6) /* (W28) GPIO1_56 RS232-TXD */
		>;
	};

	rs485_pins_default: rs485_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0174, PIN_INPUT, 6) /* (AE23) GPIO0_93 RS485-RXD */
			AM65X_IOPAD(0x014c, PIN_OUTPUT, 6) /* (AD23) GPIO0_83 RS485-TXD */
			AM65X_IOPAD(0x017c, PIN_OUTPUT_PULLDOWN, 7) /* (AC21) GPIO0_95 RS485-DIR */
		>;
	};

	usb0_pins_default: usb0_pins_default {
        pinctrl-single,pins = <
             AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
         >;
     };

	usb20_host_pins_default: usb20_host_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
		>;
	};
};

&main_pmx1 {
	pinctrl-names = "default";
	pinctrl-0 = <&gpio2_pins_default>;

	main_i2c0_pins_default: main-i2c0-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
			AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
		>;
	};

	main_i2c1_pins_default: main-i2c1-pins-default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
			AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
		>;
	};

	gpio2_pins_default: gpio2_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0010, PIN_INPUT, 7) /* (D21) ECAP0_IN_APWM_OUT.GPIO1_86 */
			//AM65X_IOPAD(0x0014, PIN_OUTPUT, 7) /* (A22) EXT_REFCLK1.GPIO1_87 */	/* RS485-TX-LED */
			AM65X_IOPAD(0x0018, PIN_INPUT, 7) /* (B22) TIMER_IO0.GPIO1_88 */
			AM65X_IOPAD(0x001c, PIN_INPUT, 7) /* (C23) TIMER_IO1.GPIO1_89 */
		>;
	};

	ledgpio2_pins_default: ledgpio2_pins_default {
		pinctrl-single,pins = <
			AM65X_IOPAD(0x0014, PIN_OUTPUT, 7) /* (A22) GPIO1_87 */	/* RS485-TX-LED */
		>;
	};
};

&wkup_uart0 {
	/* Wakeup UART is used by System firmware */
	status = "reserved";
};

&main_uart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_uart0_pins_default>;
	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};

//Eric+{
&main_uart2 {
	pinctrl-names = "default";
	power-domains = <&k3_pds 148 TI_SCI_PD_SHARED>;
	pinctrl-0 = <&rs232_pins_default>;
	status = "okay";
};

&main_uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&rs485_pins_default>;
	power-domains = <&k3_pds 147 TI_SCI_PD_SHARED>;
	rts-gpios = <&main_gpio0 95 GPIO_ACTIVE_HIGH>;
	rs485-rts-active-high;
	rs485-rts-delay = <0 0>;
	linux,rs485-enabled-at-boot-time;
	status = "okay";
};
//Eric+}

&main_i2c0 {
	
	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c0_pins_default>;
	clock-frequency = <400000>;


	eeprom: eeprom@50 {
        compatible = "atmel,24c16";
        reg = <0x50>;
        pagesize = <16>;
	};
};

&main_i2c1 {

	pinctrl-names = "default";
	pinctrl-0 = <&main_i2c1_pins_default>;
	clock-frequency = <400000>;

	s35390a:rtc@30{
		compatible = "sii,s35390a";
		reg = <0x30>;
	};
};

&main_spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_spi0_pins_default>;
	#address-cells = <1>;
	#size-cells= <0>;
	ti,pindir-d0-out-d1-in = <1>;

	flash@0{
		compatible = "jedec,spi-nor";
		reg = <0x0>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <1>;
		spi-max-frequency = <48000000>;
		#address-cells = <1>;
		#size-cells= <1>;
	};
};

&main_spi1 {
    status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&myspi2_pins_default>;
	#address-cells = <1>;
	#size-cells= <0>;
	ti,pindir-d0-out-d1-in = <1>;

    spidev@0 {
        status = "okay";
        //compatible = "fairchild,74hc595";
        compatible = "linux,spidev";
        gpio-controller;
        #gpio-cells = <2>;
        reg = <0>;
        registers-number = <2>;
        registers-default = /bits/ 8 <0xb7>;
        spi-max-frequency = <100000>;
    };
};

&sdhci0 {
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc0_pins_default>;
	bus-width = <8>;
	non-removable;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

/*
 * Because of erratas i2025 and i2026 for silicon revision 1.0, the
 * SD card interface might fail. Boards with sr1.0 are recommended to
 * disable sdhci1
 */
&sdhci1 {
	vmmc-supply = <&vdd_mmc1_sd>;
	pinctrl-names = "default";
	pinctrl-0 = <&main_mmc1_pins_default>;
	ti,driver-strength-ohm = <50>;
	disable-wp;
};

&dwc3_1 {
	status = "okay";
};

&usb1_phy {
	status = "okay";
};
&usb1 {
	pinctrl-names = "default";
	//Eric- pinctrl-0 = <&usb1_pins_default>;
	pinctrl-0 = <&usb20_host_pins_default>;
	dr_mode = "host";
};

&dwc3_0 {
	status = "okay";
};

&usb0_phy {
	status = "okay";
};

//Eric+{

&m_can0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mcan0_pins_default>;
	//stb-gpios = <&main_gpio1 47 GPIO_ACTIVE_HIGH>;
	can-transceiver {
		max-bitrate = <5000000>;
	};
};

&usb0 {
	pinctrl-names = "default";
	//pinctrl-0 = <&usb0_pins_default>;
	dr_mode = "peripheral";
};
//Eric+}

&tscadc0 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&tscadc1 {
	adc {
		ti,adc-channels = <0 1 2 3 4 5 6 7>;
	};
};

&serdes0 {
	status = "disabled";
};

&serdes1 {
	status = "disabled";
};

&pcie0_rc {
	status = "disabled";
};

&pcie0_ep {
	status = "disabled";
};

&pcie1_rc {
	status = "disabled";
};

&pcie1_ep {
	status = "disabled";
};

&mailbox0_cluster0 {
	interrupts = <436>;

	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
		ti,mbox-tx = <1 0 0>;
		ti,mbox-rx = <0 0 0>;
	};
};

&mailbox0_cluster1 {
	interrupts = <432>;

	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
		ti,mbox-tx = <1 0 0>;
		ti,mbox-rx = <0 0 0>;
	};
};

&mailbox0_cluster2 {
	status = "disabled";
};

&mailbox0_cluster3 {
	status = "disabled";
};

&mailbox0_cluster4 {
	status = "disabled";
};

&mailbox0_cluster5 {
	status = "disabled";
};

&mailbox0_cluster6 {
	status = "disabled";
};

&mailbox0_cluster7 {
	status = "disabled";
};

&mailbox0_cluster8 {
	status = "disabled";
};

&mailbox0_cluster9 {
	status = "disabled";
};

&mailbox0_cluster10 {
	status = "disabled";
};

&mailbox0_cluster11 {
	status = "disabled";
};

&mcu_r5fss0_core0 {
	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
			<&mcu_r5fss0_core0_memory_region>;
	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
};

&mcu_r5fss0_core1 {
	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
			<&mcu_r5fss0_core1_memory_region>;
	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
};

&mcu_cpsw {
	pinctrl-names = "default";
	//pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
	pinctrl-0 = <&phy2ax58100_pins_default &phy2ax58100_mdio2_pins_default>;
};

&davinci_mdio {
	reset = <&main_gpio0 25 GPIO_ACTIVE_LOW>;
	reset-delay-us = <2>;   /* PHY datasheet states 1us min */

	phy0: ethernet-phy@0 {
		reg = <3>;
	};
};

&cpsw_port1 {
	phy-mode = "rmii";
	phy-handle = <&phy0>;
};

&icssg1_mdio {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&icssg1_mdio_pins_default>;

	reset = <&main_gpio0 66 GPIO_ACTIVE_LOW>; /*83867*/
	
	reset-delay-us = <2>;

	icssg1_phy0: ethernet-phy@1 {
		reg = <1>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};

};

&icssg2_mdio {
	status = "okay";
	pinctrl-names = "default";
	//Eric- pinctrl-0 = <&icssg2_mdio_pins_default>;
	pinctrl-0 = <&ethernet1_mdio_pins_default>;

	reset = <&main_gpio0 16 GPIO_ACTIVE_LOW>;
	reset-delay-us = <2>;

	icssg2_phy0: ethernet-phy@2 {
		reg = <2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
	};
};

Thanks.

Eric

0 Eric Hsieh4 over 3 years ago in reply to Eric Hsieh4

Expert 1300 points

Hi,

Btw, K3-am65-main.dtsi has no modification.

Please let us know if any modification need for 1GB ddr.

Eric

0 Keerthy J over 3 years ago in reply to Eric Hsieh4

TI__Guru**** 162410 points

Hi Eric,

For the 1GB DDR change can you look at the changes that you need to do in U-Boot: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/984296/faq-am6548-how-to-configure-512mb-2-ddr-ram-in-uboot

Have you already done that? Please share the boot logs from the start so that we can see the U-Boot logs as well & the memory that U-Boot recognizes in the system.

Best Regards,
Keerthy

0 Eric Hsieh4 over 3 years ago in reply to Keerthy J

Expert 1300 points

Hi Keerthy J

Yes, I have modified it in uboot.

Please check the attached log.

8002_withoutPSI_config_exception.txt

Eric

0 Keerthy J over 3 years ago in reply to Eric Hsieh4

TI__Guru**** 162410 points

Hi Eric,

Can you try disabling the Pru nodes from dts and check if this crash happens then we can focus on the pru?

- Keerthy

0 Eric Hsieh4 over 3 years ago in reply to Keerthy J

Expert 1300 points

Hi Keerthy J,

I met this log for once. And I need to see if it happened again.

But I met below log many times. It happened randomly.

Rio told me this might be related to memory size setting, because there is a word "Tainted" inside.

Attached the full log.

[ 131.676100] process 'docker/tmp/qemu-check490992163/check' started with executable stack
[ 897.213185] ------------[ cut here ]------------
[ 897.213204] WARNING: CPU: 0 PID: 155 at drivers/net/phy/phy.c:931 phy_error+0x14/0x60
[ 897.213228] Modules linked in: xt_conntrack xt_MASQUERADE xt_addrtype iptable_filter iptable_nat nf_nat nf_conntrack nf_defrag_ipv6 nf_defrag_ipv4 libcrc32c ip_tables x_tables bridge stp llc overlay xfrm_user xfrm_algo md5 ecb aes_neon_bs aes_neon_blk des_generic libdes cbc xhci_plat_hcd xhci_hcd rpmsg_char usbcore ti_am335x_adc kfifo_buf omap_rng irq_pruss_intc rng_core dwc3 udc_core roles usb_common crct10dif_ce icssg_prueth pru_rproc icss_iep ti_k3_r5_remoteproc virtio_rpmsg_bus m_can_platform m_can can_dev ti_am335x_tscadc pruss ti_cal videobuf2_dma_contig v4l2_fwnode videobuf2_memops videobuf2_v4l2 videobuf2_common sa2ul sha512_generic authenc phy_omap_usb2 dwc3_keystone at24 bluetooth ecdh_generic ecc rfkill pvrsrvkm(O) sch_fq_codel cryptodev(O) ipv6
[ 897.213417] CPU: 0 PID: 155 Comm: kworker/u8:2 Tainted: G O 5.10.41-rt39-g0701a5b58c #1
[ 897.213426] Hardware name: Texas Instruments AM654 Base Board (DT)
[ 897.213433] Workqueue: events_power_efficient phy_state_machine
[ 897.213444] pstate: 60000005 (nZCv daif -PAN -UAO -TCO BTYPE=--)
[ 897.213452] pc : phy_error+0x14/0x60
[ 897.213458] lr : phy_state_machine+0x88/0x218
[ 897.213465] sp : ffff8000115b3d30
[ 897.213467] x29: ffff8000115b3d30 x28: ffff800011029000
[ 897.213475] x27: ffff000000008070 x26: ffff000000008020
[ 897.213483] x25: 0000000000000000 x24: 00000000fffffffb
[ 897.213490] x23: ffff0000069bbd28 x22: ffff00000173ac40
[ 897.213497] x21: ffff0000069bb800 x20: 0000000000000004
[ 897.213504] x19: ffff0000069bb800 x18: 000000000000000e
[ 897.213510] x17: 0000000000000001 x16: 0000000000000019
[ 897.213517] x15: 00000338f5b61d64 x14: 000000000000035f
[ 897.213524] x13: 00000000000001c0 x12: 0000000000000000
[ 897.213531] x11: 0000000000000002 x10: 0000000000000a50
[ 897.213538] x9 : ffff8000115b3a80 x8 : ffff00000173b6f0
[ 897.213545] x7 : ffff00003fd925c0 x6 : 0000002a0c248c64
[ 897.213552] x5 : ffff0000069bbd40 x4 : 0000000000000000
[ 897.213558] x3 : ffff0000069bbd28 x2 : 0000000000000000
[ 897.213565] x1 : 58b4644531df9000 x0 : ffff0000069bb800
[ 897.213573] Call trace:
[ 897.213576] phy_error+0x14/0x60
[ 897.213583] phy_state_machine+0x88/0x218
[ 897.213591] process_one_work+0x1a0/0x328
[ 897.213603] worker_thread+0x4c/0x420
[ 897.213611] kthread+0x174/0x198
[ 897.213619] ret_from_fork+0x10/0x34
[ 897.213629] ---[ end trace 0000000000000002 ]---
[ 898.236538] icssg-prueth icssg1-eth eth1: Link is Down

8002_woDP8322_woPSI.txt

Eric

0 Rio Chan over 3 years ago in reply to Eric Hsieh4

TI__Genius 14625 points

Hi Keerthy:

Any update?

BR Rio

0 Karthik Ramanan over 3 years ago in reply to Rio Chan

TI__Guru** 113810 points

Rio,

We are not sure how to help proceed with this one.

Issue not reproducible on EVM and issue is random.

What is the usecase running when this occurs?

How do we ensure that this is a TI driver related issue - such information or description may be useful to trigger thoughts?

Regards

Karthik

0 Rio Chan over 3 years ago in reply to Karthik Ramanan

TI__Genius 14625 points

Hi Karthik:

Okay, please let me debug with the customer for deeper analysis.

BR Rio

0 Eric Hsieh4 over 3 years ago in reply to Rio Chan

Expert 1300 points

Hi Karthik Ramanan

Our test step is very easy.

On our EVM board, we use 2 DP83867 for iccg1 & icssg2 as the dts setting.

After boot into OS, we set ip for both emac.

ex.

ifconfig eth1 192.168.1.5 up

ifconfig eth2 192.168.2.5 up

And then, we use both PC to ping the emacs.

Randomly, eth1 will happened phy_error log and cannot work anymore.

BTW, we use AM6548 X6580AACD.

Eric

0 Rio Chan over 3 years ago in reply to Rio Chan

TI__Genius 14625 points

Hi Keerthy:

Can you check his DDR setting correct-ness first?

This is the 4G ram on TI EVM.

memory@80000000 {
device_type = "memory";
/* 4G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
<0x00000008 0x80000000 0x00000000 0x80000000>;
};

This is his 1G ram on their PCB.

memory@80000000 {
device_type = "memory";

/* 1G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
};

Is his 1G ram configured right?

BR Rio

0 Karthik Ramanan over 3 years ago in reply to Rio Chan

TI__Guru** 113810 points

Rio,

As per internal discussion, you are looking further into this.

Please post back updates when you are ready and/or if you have any questions.

Regards

Karthik

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AM6548: PRU Error Log to cause kernel crash on SDK8.0.x.