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c64x EMAC TX Interrupt Delay

Alphan Karacaer56
Intellectual 835 points

Hello,

I am using a custom designed board with 6424. I setup EMAC for 100Mbps and enable TX Interrupt. When I send an Ethernet packet with length 78 Byte, and measured the time between the send packet command and EMAC TX interrupt routine. Result is about 60 usec, that is a lot more than the time needed for transfer of a packet with that length at 100 Mbps. Is it normal to get the interrupt after such delay or am I doing something wrong?

What is the delay for an interrupt to be asserted by CPU after the event occurs?

Thanks

Alphan

  • 0
    TI__Genius 14545 points

    Alphan,

     

    Sorry for the delay. There are many different causes of latencies in the C64x device. Obviously the Interrupt vectoring is one, but you might want to also look into the priority encoding of the system interconnect as this can be another cause of the delay. These are defined by the Master Priority Registers. Refer to section 3 of the C6424 Datasheet for Register Details.

     

    Let me know if this helps improve the latency, or if you've already configured the interconnect per the Master Priority Registers.