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AM5746: MMCSD SDR50 Tuning

Mari Tsunoda
Expert 3705 points
Part Number: AM5746

Hi,

My customer has a question regarding the two following bit fields within registers with regards to the SDR50 DLL tuning procedure.

1) MMCHS_DLL[20] SWT

2) MMCHS_AC12[22] ET

They are asking which one they should set to 1 to start the tuning procedure. 

When they set MMCHS_AC12[22] ET to 1, they could not receive CMD19 and are asking if they can use this to the start tuning procedure.

Could you explain how the two are different, and how they change when tuning is enabled?

Also, when they executed DLL tuning, the bit field MMCHS_AC12[23] SCLK_SEL does not get set to 1. So, they also want to confirm their understanding of a few things.

  • It says on the TRM (https://www.ti.com/lit/pdf/spruih8 pg. 7208) that when MMCHS_AC12[22] ET gets cleared from 1 to 0, then MMCHS_AC12[23] SCLK_SEL is changed by the tuning procedure and is valid after tuning completion. However, the tuning procedure does not use MMCHS_AC12[22] ET. Is it correct that when MMCHS_AC12[22] ET is 0 after tuning execution, the tuning procedure is complete and that MMCHS_AC12[23] SCLK_SEL gets set to 1?
  • If they execute DLL tuning on a SDR50 where tuning is unnecessary (MMCHS_CAPA2[13] TSDR50 is set to 0), then the tuning procedure will fail?

For additional information, they are using the following:

  • SD Card UHS speed class 1
  • CCS v8
  • GCC GNU v6.3.1 (Linaro)
  • HW AM57 Custom Board
  • SW: pdk_am57xx_1_0_11, bios_6_76_00_08
  • XDCTools 3.50.3.33
  • ICE Lauterbach

Best regards,

Mari Tsunoda

  • 0
    TI__Expert 3705 points

    Hi,

    Would we be able to get an update soon?

    Best regards,

    Mari

  • 0 in reply to Mari Tsunoda
    TI__Genius 10180 points

    Mari,

    You should be using MMCHS_DLL[20] SWT for the tuning sequence.  This enables SW tuning that has higher resolution over the the MMCHS_AC12[22] ET HW tuning method.  I do recommend using tuning for SDR50; the tuning sequence used for SDR104 will work on SDR50 as well.

    Regarding MMCHS_AC12[23] SCLK_SEL, was the customer able to execute 32 CMD19 successfully and still see this bit at 0x0?  Have they tried read/write at SDR50/SDR104 to confirm if functionality succeeded irrespective of SCLK_SEL bit value?  Would also be beneficial for them to check MMCHS_DLL register value and make sure it was updated successfully.  

    We have a SW offering here:  https://www.ti.com/tool/PROCESSOR-SDK-AM57X with MMC driver codes customers can reference.

    Best Regards,

    Shiou Mei

  • 0 in reply to Shiou Mei Huang
    TI__Expert 3705 points

    Hi Shiou, 

    Thanks for your response and your support on this thread. You've helped clarify that they should be using SW tuning instead of HW tuning for higher resolution. In response to your question of whether or not they were able to execute CMD19 successfully, when they tried the HW tuning method (setting MMCHS_AC12[22] ET to 1), CMD19 was not executed. I just want to clarify,

    • Does CMD19 get sent when they use HW tuning?

    Also, I see that the TRM (pg. 7208) states that MMCHS_AC12[23] SCLK_SEL is set when MMCHS_AC12[22] ET is cleared. However, from what I see in the DLL Tuning flow chart Figure 26-51 in the TRM (pg. 7156), there is no step in which MMCHS_AC12[22] ET is set or cleared, but MMCHS_AC12[23] SCLK_SEL is set. 

    • Is it assumed that at some point in the flow chart, MMCHS_AC12[22] ET is set/cleared and thus MMCHS_AC12[23] SCLK_SEL is set to 1? OR
    • Is MMCHS_AC12[23] SCLK_SEL not solely dependent on MMCHS_AC12[22] ET, and can be set independently?

    I would also appreciate if you could give some insight on the last question from the original post as below:

    • If they execute DLL tuning on a SDR50 where tuning is unnecessary (MMCHS_CAPA2[13] TSDR50 is set to 0), then the tuning procedure will fail?

    I will definitely let them know about checking the MMCHS_DLL register value and confirming functionality successfulness via read/write at SDR50, but I would love to give them concrete answers to their questions if possible.

    Best regards,

    Mari

  • 0 in reply to Mari Tsunoda
    TI__Expert 3705 points

    Hi Shiou,

    Our customer gave us additional information saying that they were actually not using SD cards that would require tuning for SDR50 and therefore failed. I've written below their responses to some of your questions taking into account this new information.

    In response to your previous question as below:

    • Regarding MMCHS_AC12[23] SCLK_SEL, was the customer able to execute 32 CMD19 successfully and still see this bit at 0x0? 
      • We received a response from our customer saying that after they were successfully able to execute 32 CMD19, MMCHS_AC12[23] SCLK_SEL was still 0.
    • Have they tried read/write at SDR50/SDR104 to confirm if functionality succeeded irrespective of SCLK_SEL bit value?
      • They have not tried read/write.

    Thanks for your support on this thread. I look forward to hearing back from you and your input regarding my previous reply.

    Best regards,

    Mari

  • +1 in reply to Mari Tsunoda
    TI__Genius 10180 points

    Mari,


    CMD19 does not get sent automatically; users have to write code in SW to send it in either HW tuning or SW tuning modes. Note, we only support SW tuning now.

    I do expect SCLK_SEL status to change in either tuning modes, as long as a valid ratio is found. What does the customer's tuning sequence and results look like? Please have customer confirm they have enabled the SW tuning bit (MMCHS_DLL[20] SWT), set [12] FORCE_VALUE, and then run through all DLL ratios by writing the values into [19:13] FORCE_SR_C; for each ratio, they have to toggle [1] DLL_CALIB bit and send CMD19.

    Best Regards,

    Shiou Mei

  • 0 in reply to Shiou Mei Huang
    TI__Expert 3705 points

    Hi Shiou,

    Thanks for your response and your continued support. I've noted that only SW tuning is supported now and will ask the customer to confirm everything and run through the DLL ratios. 

    Best regards,

    Mari

  • 0 in reply to Mari Tsunoda
    TI__Expert 3705 points

    Hi Shiou,

    I have a follow-up question regarding the HW tuning. I checked the errata, but it doesn't say that HW tuning is no longer supported. Does it say this elsewhere?

    Best regards,
    Mari

  • 0 in reply to Mari Tsunoda
    TI__Guru* 88295 points

    Hi Mari,

    Is this issue still open for you?

    regards

    Suman

  • 0 in reply to Suman Anna
    TI__Genius 10180 points

    Mari,

    It is related to Errata i929.  HW tuning does not provide the fine resolution needed, so SW tuning should be used. 

    Best Regards,

    Shiou Mei

  • 0 in reply to Shiou Mei Huang
    TI__Expert 3705 points

    Hi Shiou,

    Thank you always for your support! Noted.

    Best regards,

    Mari Tsunoda