I am using mcbsp as SPI master (with SD CARD) now.
I'd like to know how I can change CLKX in the middle of code.
(1) I initialize mcbsp as follows
mcbsp_init()
{
....
// Set SPCR to defaults, Hold Sample-Rate Generator,Transmit/Receive in reset
spcr = 0x00000000u;
mcr = 0x00000000u;
xcr = 0x00000000u;
rcr = 0x00000000u;
srgr = 0x00000000u;
pcr = 0x00000000u;
//----------------------------------------------------------------------
// Set McBSP in SPI Master mode, normally FSX0 would be used
// as chip-select but to support SPI devices with 24BIT address
// width - FSX1 although generated, will be ignored. The SPI, CS, will
// be connected to TIN0L, configured as GPIO pin.
//----------------------------------------------------------------------
pcr = pcr | ( CSL_MCBSP_PCR_FSXM_MASK |
CSL_MCBSP_PCR_CLKXM_MASK |
CSL_MCBSP_PCR_FSXP_MASK |
CSL_MCBSP_PCR_FSRP_MASK );
//------------------------------------------------------------------------
// For SPI mode a XMIT and RCV delya of 1 is required. The XMIT and RCV
// frames have been set to send/receive 8 bits.
//------------------------------------------------------------------------
rcr = rcr | (1u << CSL_MCBSP_RCR_RDATDLY_SHIFT)
| (0u << CSL_MCBSP_RCR_RWDLEN1_SHIFT)
| (0u << CSL_MCBSP_RCR_RFRLEN1_SHIFT)
| (0u << CSL_MCBSP_RCR_RWDLEN2_SHIFT);
xcr = xcr | (1u << CSL_MCBSP_XCR_XDATDLY_SHIFT)
| (0u << CSL_MCBSP_XCR_XWDLEN1_SHIFT)
| (0u << CSL_MCBSP_XCR_XFRLEN1_SHIFT)
| (0u << CSL_MCBSP_XCR_XWDLEN2_SHIFT);
srgr = srgr | CSL_MCBSP_SRGR_CLKSM_MASK
| (0x40u << CSL_MCBSP_SRGR_FPER_SHIFT)
| (0x1u << CSL_MCBSP_SRGR_FWID_SHIFT)
| (0xFF << CSL_MCBSP_SRGR_CLKGDV_SHIFT); // about 400 KHz
// Set polarity and phase of CLK using CLKSTP and CLKXP
spcr = (spcr &( ~CSL_MCBSP_SPCR_CLKSTP_MASK));
mcbsp1ModuleRegs->MCR = mcr;
mcbsp1ModuleRegs->PCR = pcr;
mcbsp1ModuleRegs->XCR = xcr;
mcbsp1ModuleRegs->RCR = rcr;
mcbsp1ModuleRegs->SRGR = srgr;
mcbsp1ModuleRegs->SPCR = spcr;
//Wait two CLKSRG clocks. This is to ensure proper synchronization internally.
asm("\tnop 5");
mcbsp1ModuleRegs->SPCR = (mcbsp1ModuleRegs->SPCR & (~CSL_MCBSP_SPCR_CLKSTP_MASK))
|(0x3u << CSL_MCBSP_SPCR_CLKSTP_SHIFT);
// Initialization of transmit values and array of received values
// SPI-EEPROM data packet represented in 32 bit format
// first byte is write enable opcode
// second, third bytes represnt 16 bit address,
// fourth byte is the actual data to be written
// Start Sample Rate Generator Clock Generation
mcbsp1ModuleRegs->SPCR |= CSL_MCBSP_SPCR_FREE_MASK;
waitloop(20);
mcbsp1ModuleRegs->SPCR |= CSL_MCBSP_SPCR_GRST_MASK;// grstControl (enable);
waitloop(20);
// Start Sample Rate Generator Frame Generation
mcbsp1ModuleRegs->SPCR |= CSL_MCBSP_SPCR_FRST_MASK; //MCBSP_frstControl (enable);
waitloop(20);
// Enable Receiver
mcbsp1ModuleRegs->SPCR |= CSL_MCBSP_SPCR_RRST_MASK; //rrstControl (enable);
waitloop(20);
// Enable Transmitter
mcbsp1ModuleRegs->SPCR |= CSL_MCBSP_SPCR_XRST_MASK; //xrstControl (enable);
waitloop(20);
//Wait two CLKSRG clocks. This is to ensure proper synchronization internally.
asm("\tnop 5");
}
(2) After initialization. I exchanged data to SD card (in 400KHz) and succeeded to identify it.
(3) After identification, I want to change CLKX frequency to 10MHz and read/write data..
But, mcbsp stopped after running following code. How can I change CLKX frequency?
void SPI24_Configure(int clkdiv)
{
Uint32 spcr, mcr, xcr, rcr, srgr, pcr;
mcbsp1ModuleRegs->SPCR &= (~CSL_MCBSP_SPCR_RRST_MASK); //rrstControl (disable);
waitloop(20);
// Enable Transmitter
mcbsp1ModuleRegs->SPCR &= (~CSL_MCBSP_SPCR_XRST_MASK); //xrstControl (disable);
waitloop(20);
mcbsp1ModuleRegs->SPCR &= (~CSL_MCBSP_SPCR_GRST_MASK);// grstControl (disable);
waitloop(20);
// Change CLKX frequency
mcbsp1ModuleRegs->SRGR &= (~0xFF);
mcbsp1ModuleRegs->SRGR |= clkdiv; // clkdev = 10, 10 MHz
mcbsp1ModuleRegs->SPCR |= (CSL_MCBSP_SPCR_GRST_MASK);// grstControl (disable);
waitloop(20);
// Enable Receiver
mcbsp1ModuleRegs->SPCR |= (CSL_MCBSP_SPCR_RRST_MASK); //rrstControl (disable);
waitloop(20);
// Enable Transmitter
mcbsp1ModuleRegs->SPCR |= (CSL_MCBSP_SPCR_XRST_MASK); //xrstControl (disable);
waitloop(20);
// Start Sample Rate Generator Frame Generation
mcbsp1ModuleRegs->SPCR |= (CSL_MCBSP_SPCR_FRST_MASK); //MCBSP_frstControl (disable);
waitloop(20);
}
