AM6442: QSPI kernel device tree

Hi,

we are seeing some instability with QSPI on a customer board and want to check whether our device tree is configured correctly. The instability manifests itself in corrupted data being written or read.

I also have some fundamental questions about the device tree.

The device being used is a Winbond W25Q01JV (a device with 2x stacked die, 2x 512Mb)

Currently the device tree for this QSPI flash is modified from the TI AM64xx SK device tree in k3-am642-sk, by reducing the width to 4, and reducing the speed to 20MHz.

&ospi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&ospi0_pins_default>;

	flash@0{
		compatible = "jedec,spi-nor";
		reg = <0x0>;
		spi-tx-bus-width = <4>;
		spi-rx-bus-width = <4>;
		spi-max-frequency = <20000000>;
		cdns,tshsl-ns = <60>;
		cdns,tsd2d-ns = <60>;
		cdns,tchsh-ns = <60>;
		cdns,tslch-ns = <60>;
		cdns,read-delay = <4>;
		cdns,phy-mode;
		#address-cells = <1>;
		#size-cells = <1>;
	};
};

The original AM64-SK dts is using this for ospi0

&ospi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&ospi0_pins_default>;

	flash@0{
		compatible = "jedec,spi-nor";
		reg = <0x0>;
		spi-tx-bus-width = <8>;
		spi-rx-bus-width = <8>;
		spi-max-frequency = <25000000>;
		cdns,tshsl-ns = <60>;
		cdns,tsd2d-ns = <60>;
		cdns,tchsh-ns = <60>;
		cdns,tslch-ns = <60>;
		cdns,read-delay = <4>;
		cdns,phy-mode;
		#address-cells = <1>;
		#size-cells = <1>;
	};
};

My questions:

[] Do we have a reference for a QSPI dts opsi0 node configuration?

[] The compatible says "jedec,spi-nor" but looking at ./Documentation/devicetree/bindings/mtd, I don't see the timing parameters listed in the node for jedec,spi-nor.txt. These are coming out of cadence-quadspi.txt and compatible "cdns,qspi-nor". Can somone clarify how this works, does the jedec,spi-nor fall back onto cdns,qspi-nor somehow?

[] How do we determine the specific timing parameters listed in the ospi0 node?

Thanks!

--Gunter