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Power-on and Warm reset on OMAP-L138

Boris Ruvinsky
Expert 1410 points
Other Parts Discussed in Thread: OMAP-L138

Dear forum:

Reading Omap-L138 data sheet (SLVSAQ9 of 1/2011 SMOMAP-L138B) I found in JTAG section (page274) - TRST# input has a pull-down resistor and is always asserted during Power-up.

That means that RESET# signal applied to Omap-L138 RESET input (pin-K14) will always cause POWER-ON reset (because TRST- pin-L17 is already=low due to internal pull-down). Is this true?

To implement "warm RESET" - TRST must be in HIGH state. (DS - RESET section page84).

I can make some simple logic (if I want to implement "Warm reset") to bring TRST (L17) to the HIGH state during RESET (K14) input is low.

Will this be sufficient? Or TRST must be = HIGH up to the end of RESETOUT (to have "warm reset")?

There is a diagram for the "warm reset" in DS page86 (Figure 5-5).

But on this diagram TRST stays HIGH all the time and there is no timing shown when TRST must be brought HIGH and then released back to LOW to implement "Warm RESET".

Can somebody provide this information?

Thank you,

Boris Ruvinsky

802-877-4978

 

  • 0
    TI__Genius 14545 points

    Boris,

     

    Boris Ruvinsky said:

    I can make some simple logic (if I want to implement "Warm reset") to bring TRST (L17) to the HIGH state during RESET (K14) input is low.

    Will this be sufficient? Or TRST must be = HIGH up to the end of RESETOUT (to have "warm reset")?

     

    For a warm reset, as long as /TRST is high (and stable) before the high -> low transition of the /RESET pin, the device will implement a warm reset. After the warm reset is complete (device is operating normally)  the value of the /TRST can be either high or low, depending on if you want the keep the emulation logic in active or not.

    The value of /TRST should get latched when /RESET is transitions from a high-> low, but It's best to keep /TRST high until the end of RESETOUT to be safe, after which you can return it to whatever logic state you wish

     

    Does this answer your question?

  • 0 in reply to dabuan
    Expert 1410 points

    Hello Drew.

    Thank you for your answer to my question.

    There are some extra little details which I would like to  know.

    Is there the requirement for TRSThigh setup to WARM_RESETlow?

    If TRST is latched by RESEThigh-to-low edge - there should be some requirement for setup.

    The TRST hold is probably does not matter if TRST is high until RESETOUT end.

    But the timing for the TRST setup to RESET transition high-to-low should be in the data sheet.

    Do you have this information?

    Thank you for your help,

    Boris Ruvinsky

  • 0 in reply to Boris Ruvinsky
    TI__Genius 14545 points

    Boris,

       Completely Agree. I'll  need to check with design on this of course. I'll try and see if I can't get a diagram drawn out as well and appended to the datasheet. Likewise I'll repost right here once I have the answer.

  • 0 in reply to dabuan
    Expert 1410 points

    Dear Drew,

    Do you have the answer regarding Warm reset?

    My last question which you were agree with was:

    ---

    Hello Drew.

    Thank you for your answer to my question.

    There are some extra little details which I would like to  know.

    Is there the requirement for TRSThigh setup to WARM_RESETlow?

    If TRST is latched by RESEThigh-to-low edge - there should be some requirement for setup.

    The TRST hold is probably does not matter if TRST is high until RESETOUT end.

    But the timing for the TRST setup to RESET transition high-to-low should be in the data sheet.

    Do you have this information?

    Thank you for your help,

    Boris Ruvinsky

    ---

    Thank you for your help again,

    Boris Ruvinsky  802-877-4978