TMS320C6678: TSIP Module

Art Mecina

Part Number: TMS320C6678

Hello Guys,

Good day.

Our customer has the following example on TSIP Module.

TSIP module requires a clock to drive the interface. In the absence of an external clock, is there a way to use an internal clock to allow the TSIP module to run in loopback mode?

Best regards,

Art

over 3 years ago

0 Art Mecina over 3 years ago

TI__Genius 16655 points

Hello Guys,

Just like to update on this.

Best regards,

Art

0 Denis Beaudoin over 3 years ago

TI__Expert 3075 points

There is an internal clock source that can be used in the loopback modes.

The 'Emulation and Test Register' has the tstclk and suitst bits that allows the internal loopback without an external clock.

0 Denis Beaudoin over 3 years ago in reply to Denis Beaudoin

TI__Expert 3075 points

There is a 'tstdiv' clock divider from the internal bus clock that needs the appropriate value to closely match the expected serial clock.

0 Denis Beaudoin over 3 years ago in reply to Denis Beaudoin

TI__Expert 3075 points

The clock is internally mapped when ((siutst==1) && (iolb==0) && (lbs==0) && (tstclk==1)) in true!

If ((siutst==1) && (iolb==1) && (tstclk==1)) We will attempt to drive the external clock and data for an external loopback, but it is necessary to not have external components driving those pins.

0 Rajarajan Uthayakumar over 3 years ago in reply to Art Mecina

TI__Expert 4314 points

Hi,

We can use Internal clock in normal mode, since receive clock (RCVCLKM) and transmit clock (XMTCLKM) will only sync the data only if both are in same data rate and data rate depends on clock.

But, In Loopback mode mode, sync is not possible and since there is no connection between Transmit and receive side, which prompts us to use external clock.

Also attached the TSIP guide, PFA.

https://www.ti.com/lit/ug/sprugy4/sprugy4.pdf

Thanks,

Rajarajan U

0 Denis Beaudoin over 3 years ago in reply to Rajarajan Uthayakumar

TI__Expert 3075 points

In serial loopback an internal frame sync is passed to both the transmitter and receiver.

The internal clock can only be use in loopback modes. There is no support for using the internal clock in functional modes.

0 Rajarajan Uthayakumar over 3 years ago in reply to Denis Beaudoin

TI__Expert 4314 points

Hi Denis,

I was refering to Data loop back(DLB) and Line Loopback(LLB) as mentioned in "5.1.3.1" in above mentioned TSIP guide.

Denis Beaudoin said:
In serial loopback an internal frame sync is passed to both the transmitter and receiver.

Are you refering to the same loopback modes ?

Thanks,

Rajarajan U

0 Denis Beaudoin over 3 years ago in reply to Rajarajan Uthayakumar

TI__Expert 3075 points

The serial loopback is the same as the DLB we loopback the serial Tx to Rx pins.

The DLB generates the clock and frame sync internally and loops that Tx data to the Rx data just before the pins.

The LLB loops back anything seen on the Rx interface to the Tx interface, and allows the remote device to perform any diagnostics.

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TMS320C6678: TSIP Module