AM5728: Adding v4l2_subdev_init and v4l2_async_register_subdev kernel panic happening

Dear ti team,

I am waiting for your response.

If you need any further information about the problem, I can provide to you.

Please look into this

Regards

Ramachandra

Hi Ramachandra,

Apologies for delay in response

Ramachandra Parlapalli said:

without adding v4l2_subdev_init,v4l2_async_register_subdev but not showing the video1

This could be because GS2971 is not able to map the endpoint. As I can see in the DTS entries you shared 

Ramachandra Parlapalli said:

remote-endpoint = <&vin3a>;

remote-endpoint for GS2971 is not matching any valid endpoint name, as the actual endpoint name is vin3a_ep. Can you change remote-endpoint for GS2971 from vin3a to vin3a_ep and try (without adding v4l2_async_register_subdev and v4l2_subdev_init) if you can see video1

Regards,
Parth

Hi sir,

Present dtb changed and removed v4l2_subdev_init & v4l2_async_register_subdev but not showing any video on the command prompt.

Before loading gs2971 module i am loading v4l2_int_device.ko errors not getting but video not appearing the device list below dts file and gs2971 files added

/* SEMTECH SD SDI reciever
 *
 * Copyright (C) 2014 RidgeRun
 * Author: Edison Fernández <edison.fernández@ridgerun.com>
 *
 * Currently working with 1080p30 and 720p60 with no audio support.
 * In order to support more standars the VD_STD value should be
 * used in order to identify the incomming resolution and framerate.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

/*!
 * @file gs2971.c
 *
 * @brief SEMTECH SD SDI reciever
 *
 * @ingroup Camera
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/i2c.h>
#include <linux/of_gpio.h>
#include <linux/videodev2.h>
#include <linux/regulator/consumer.h>
#include <linux/fsl_devices.h>
#include <media/v4l2-chip-ident.h>
//#include <media/v4l2-int-device.h>
#include "v4l2-int-device.h"
#include "mxc_v4l2_capture.h"
#include <linux/proc_fs.h>

#include <media/v4l2-async.h>
#include <media/v4l2-device.h>
#include <media/v4l2-common.h>
#include <media/v4l2-mediabus.h>
//#include <media/v4l2-of.h>
#include <media/v4l2-ctrls.h>
#include <media/media-entity.h>
#include <linux/videodev2.h>

#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-event.h>
#include <media/v4l2-image-sizes.h>
#include <media/v4l2-subdev.h>
#include <media/v4l2-mediabus.h>
#include <media/v4l2-common.h>
//#include <media/v4l2-of.h>
#include <media/v4l2-dv-timings.h>
#include <media/v4l2-ioctl.h>

#include "gs2971.h"

#define DEBUG 1
#define DRIVER_NAME     "gs2971"

/* Debug functions */
static int debug = 1;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Debug level (0-2)");

static struct gs2971_spidata *spidata;

#define YUV_FORMAT(gs) ((gs->cea861) ? V4L2_PIX_FMT_UYVY : V4L2_PIX_FMT_YUYV)

/*! @brief This mutex is used to provide mutual exclusion.
 *
 *  Create a mutex that can be used to provide mutually exclusive
 *  read/write access to the globally accessible data structures
 *  and variables that were defined above.
 */
static DEFINE_MUTEX(mutex);

int gs2971_read_buffer(struct spi_device *spi, u16 offset, u16 * values,
		       int length)
{
	struct spi_message msg;
	struct spi_transfer spi_xfer;
	int status;
	struct gs2971_spidata *sp = spidata;

	if (!spi)
		return -ENODEV;

	if (length > GS2971_SPI_TRANSFER_MAX)
		return -EINVAL;

	sp->txbuf[0] = 0x8000 | (offset & 0xfff);	/* read */
	if (length > 1)
		sp->txbuf[0] |= 0x1000;	/* autoinc */

	memset(&spi_xfer, '\0', sizeof(spi_xfer));
	spi_xfer.tx_buf = sp->txbuf;
	spi_xfer.rx_buf = sp->rxbuf;
	spi_xfer.bits_per_word = 16;
	spi_xfer.delay_usecs = 0;
	spi_xfer.speed_hz = 1000000;
	spi_xfer.len = sizeof(*values) * (length + 1);	// length in bytes

	spi_message_init(&msg);
	spi_message_add_tail(&spi_xfer, &msg);

	status = spi_sync(spi, &msg);
	
	memcpy(values, &sp->rxbuf[1], sizeof(*values) * length);
	if (status)
		pr_err(">> Read buffer(%d) (%x): %x %x, %x %x\n", status,
		       offset, sp->txbuf[0], sp->txbuf[1], sp->rxbuf[0],
		       sp->rxbuf[1]);

	return status;
}

int gs2971_read_register(struct spi_device *spi, u16 offset, u16 * value)
{
	struct spi_message msg;
	struct spi_transfer spi_xfer;
	int status;
	u32 txbuf[1];
	u32 rxbuf[1];

	if (!spi)
		return -ENODEV;

	txbuf[0] = 0x80000000 | ((offset & 0xfff) << 16);	/* read */


	memset(&spi_xfer, '\0', sizeof(spi_xfer));
	spi_xfer.tx_buf = txbuf;
	spi_xfer.rx_buf = rxbuf;
	spi_xfer.bits_per_word = 32;	
	spi_xfer.delay_usecs = 0;	
	spi_xfer.speed_hz = 1000000;
	spi_xfer.len = 4;	// length in bytes

	spi_message_init(&msg);
	spi_message_add_tail(&spi_xfer, &msg);

	status = spi_sync(spi, &msg);

	//dev_err(&spi->dev, "read_register status=%x\n", status);	//cispl
	if (status) {
		dev_dbg(&spi->dev, "read_reg failed\n");
		*value = 0xffff;
	} else {
		*value = (u16) rxbuf[0];
	}

	if (status)
		pr_err(">> Read register(%d) (%x): %x, %x\n", status, offset,
		       txbuf[0], rxbuf[0]);

	pr_debug("--> Read register (%x) with value: %x", offset, *value);
	return status;
}

int gs2971_write_buffer(struct spi_device *spi, u16 offset, u16 * values,
			int length)
{
	struct spi_message msg;
	struct spi_transfer spi_xfer;
	int status;
	struct gs2971_spidata *sp = spidata;

	if (!spi)
		return -ENODEV;

	if (length > GS2971_SPI_TRANSFER_MAX - 1)
		return -EINVAL;

	sp->txbuf[0] = (offset & 0xfff);	/* write  */
	if (length > 1)
		sp->txbuf[0] |= 0x1000;	/* autoinc */
	memcpy(&sp->txbuf[1], values, sizeof(*values) * length);

	memset(&spi_xfer, '\0', sizeof(spi_xfer));
	spi_xfer.tx_buf = sp->txbuf;
	spi_xfer.rx_buf = sp->rxbuf;
	spi_xfer.bits_per_word = 16;
	spi_xfer.delay_usecs = 0;
	spi_xfer.speed_hz = 1000000;
	spi_xfer.len = sizeof(*values) * (length + 1);	// length in bytes

	spi_message_init(&msg);
	spi_message_add_tail(&spi_xfer, &msg);

	status = spi_sync(spi, &msg);
	if (status)
		pr_err(">> Write register(%d) (%x): %x %x, %x %x\n", status,
		       offset, sp->txbuf[0], sp->txbuf[1], sp->rxbuf[0],
		       sp->rxbuf[1]);
	return status;
}

int gs2971_write_register(struct spi_device *spi, u16 offset, u16 value)
{
	pr_debug("--> Writing to address (%x) : %x\n", offset, value);
	return gs2971_write_buffer(spi, offset, &value, 1);
}
const char *gpio_names[] = {
[GPIO_STANDBY] = "standby-gpios",
[GPIO_RESET] = "rst-gpios",
[GPIO_TIM_861] = "tim_861-gpios",
[GPIO_IOPROC_EN] = "ioproc_en-gpios",
[GPIO_SW_EN] = "sw_en-gpios",
[GPIO_RC_BYPASS] = "rc_bypass-gpios",
[GPIO_AUDIO_EN] = "audio_en-gpios",
[GPIO_DVB_ASI] = "dvb_asi-gpios",
[GPIO_SMPTE_BYPASS] = "smpte_bypass-gpios",
[GPIO_DVI_LOCK] = "dvi_lock-gpios",
[GPIO_DATA_ERR] = "data_err-gpios",
[GPIO_LB_CONT] = "lb_cont-gpios",
[GPIO_Y_1ANC] = "y_1anc-gpios",
};

void gs2971_gpio_state(struct gs2971_priv *gs, int index, int active)
{
	if (gpio_is_valid(gs->gpios[index])) {
		int state = (gs->gpio_flags[index] & OF_GPIO_ACTIVE_LOW) ? 1 : 0;

		state ^= active;
		gpio_set_value(gs->gpios[index], state);
		pr_info("%s: active=%d, %s(%d)=0x%x\n", __func__, active, gpio_names[index], gs->gpios[index], state);
	}
}

static void gs2971_change_gpio_state(struct gs2971_priv *gs, int on)
{
	gs2971_gpio_state(gs, GPIO_STANDBY, on ? 0 : 1);
	if (on) {
		pr_debug("%s: power up delay\n", __func__);
		msleep(1000);
	}
}

static int gs2971_get_gpios(struct gs2971_priv *gs, struct device *dev)
{
	int i;
	int ret;
	enum of_gpio_flags flags;

	for (i = 0; i < GPIO_CNT; i++) {
		gs->gpios[i] = of_get_named_gpio_flags(dev->of_node, gpio_names[i], 0, &flags);
		if (!gpio_is_valid(gs->gpios[i])) {
			pr_info("%s: gpio %s not available\n", __func__, gpio_names[i]);
		} else {
			int gflags = (flags & OF_GPIO_ACTIVE_LOW) ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;

			if ((i == GPIO_STANDBY) || (i == GPIO_RESET))
				gflags ^= GPIOF_INIT_HIGH;
			if (flags == 2)
				gflags = GPIOF_IN;

			gs->gpio_flags[i] = flags;
			pr_info("%s: %s flags(%d -> %d)\n", __func__, gpio_names[i], flags, gflags);
			ret = devm_gpio_request_one(dev, gs->gpios[i], gflags, gpio_names[i]);
			if (ret < 0) {
				pr_info("%s: request of %s failed(%d)\n", __func__, gpio_names[i], ret);
				return ret;
			}
		}
	}
	gs2971_gpio_state(gs, GPIO_IOPROC_EN, 1);	//active ioproc_en
	msleep(2);
	gs2971_gpio_state(gs, GPIO_RESET, 0);	//remove reset
	msleep(400);
	return 0;
}

static s32 power_control(struct gs2971_priv *gs, int on)
{
	struct sensor_data *sensor = &gs->sensor;
	int i;
	int ret = 0;

	pr_debug("%s: %d\n", __func__, on);
	if (sensor->on != on) {
		if (on) {
			for (i = 0; i < REGULATOR_CNT; i++) {
				if (gs->regulator[i]) {
					ret = regulator_enable(gs->regulator[i]);
					if (ret) {
						pr_err("%s:regulator_enable failed(%d)\n",
							__func__, ret);
						on = 0;	/* power all off */
						break;
					}
				}
			}
		}
		gs2971_change_gpio_state(gs, on);
		sensor->on = on;
		if (!on) {
			for (i = REGULATOR_CNT - 1; i >= 0; i--) {
				if (gs->regulator[i])
					regulator_disable(gs->regulator[i]);
			}
		}
	}
	return ret;
}

static struct spi_device *gs2971_get_spi(struct gs2971_spidata *spidata)
{
	if (!spidata)
		return NULL;
	return spidata->spi;
}

static int get_std(struct v4l2_int_device *s, v4l2_std_id * id)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;
	struct spi_device *spi = NULL;
	u16 std_lock_value;
	u16 sync_lock_value;
	u16 words_per_actline_value;
	u16 words_per_line_value;
	u16 lines_per_frame_value;
	u16 actlines_per_frame_value;
	u16 interlaced_flag;
	int status;
	u16 sd_audio_status_value;
	u16 hd_audio_status_value;
	u16 sd_audio_config_value;
	u16 hd_audio_config_value;
	u16 readback_value;
	u16 ds1, ds2;

	pr_debug("-> In function %s\n", __func__);

	gs->mode = gs2971_mode_not_supported;
	gs->framerate = gs2971_default_fps;

	spi = gs2971_get_spi(spidata);
	if (!spi)
		return -ENODEV;

	*id = V4L2_STD_UNKNOWN;

	status =
	    gs2971_read_register(spi, GS2971_RASTER_STRUCT4, &std_lock_value);
	actlines_per_frame_value = std_lock_value & GS_RS4_ACTLINES_PER_FIELD;
	interlaced_flag = std_lock_value & GS_RS4_INT_nPROG;

	status =
	    gs2971_read_register(spi, GS2971_FLYWHEEL_STATUS, &sync_lock_value);
	if (status)
		return status;
	pr_debug("--> lock_value %x\n", sync_lock_value);
	if (!sync_lock_value) {
		pr_err("%s: no lock, gs2971\n", __func__);
		return -EBUSY;
	}

	status = gs2971_read_register(spi, GS2971_DATA_FORMAT_DS1, &ds1);
	if (status)
		return status;
	status = gs2971_read_register(spi, GS2971_DATA_FORMAT_DS2, &ds2);
	if (status)
		return status;
	pr_debug("--> ds1=%x\n--> ds2=%x\n", ds1, ds2);

	status =
	    gs2971_read_register(spi, GS2971_RASTER_STRUCT1,
				 &words_per_actline_value);
	if (status)
		return status;
	words_per_actline_value &= GS_RS1_WORDS_PER_ACTLINE;

	status =
	    gs2971_read_register(spi, GS2971_RASTER_STRUCT2,
				 &words_per_line_value);
	if (status)
		return status;
	words_per_line_value &= GS_RS2_WORDS_PER_LINE;

	status =
	    gs2971_read_register(spi, GS2971_RASTER_STRUCT3,
				 &lines_per_frame_value);
	if (status)
		return status;
	lines_per_frame_value &= GS_RS3_LINES_PER_FRAME;

	pr_debug("--> Words per line %u/%u Lines per frame %u/%u\n",
		 (unsigned int)words_per_actline_value,
		 (unsigned int)words_per_line_value,
		 (unsigned int)actlines_per_frame_value,
		 (unsigned int)lines_per_frame_value);
	pr_debug("--> SyncLock: %s %s StdLock: 0x%04x\n",
		 (sync_lock_value & GS_FLY_V_LOCK_DS1) ? "Vsync" : "NoVsync",
		 (sync_lock_value & GS_FLY_H_LOCK_DS1) ? "Hsync" : "NoHsync",
		 (unsigned int)(std_lock_value));

	status =
	    gs2971_read_register(spi, GS2971_CH_VALID, &sd_audio_status_value);
	if (status)
		return status;

	status =
	    gs2971_read_register(spi, GS2971_HD_CH_VALID,
				 &hd_audio_status_value);
	if (status)
		return status;

	if (!lines_per_frame_value) {
		pr_err("%s: 0 frame size\n", __func__);
		return -EBUSY;
	}

	if (gs->cea861) {
		sensor->spix.swidth = words_per_line_value - 1;
		sensor->spix.sheight = lines_per_frame_value;
	}
	if (interlaced_flag && lines_per_frame_value == 525) {
		pr_debug("--> V4L2_STD_525_60\n");
		*id = V4L2_STD_525_60;
	} else if (interlaced_flag && lines_per_frame_value == 625) {
		pr_debug("--> V4L2_STD_625_50\n");
		*id = V4L2_STD_625_50;
	} else if (interlaced_flag && lines_per_frame_value == 525) {
		pr_debug("--> V4L2_STD_525P_60\n");
		*id = YUV_FORMAT(gs);
	} else if (interlaced_flag && lines_per_frame_value == 625) {
		pr_debug("--> V4L2_STD_625P_50\n");
		*id = YUV_FORMAT(gs);
	} else if (!interlaced_flag && 749 <= lines_per_frame_value
		   && lines_per_frame_value <= 750) {
		if (gs->cea861) {
			sensor->spix.left = 220;
			sensor->spix.top = 25;
		}
		sensor->pix.width = 1280;
		sensor->pix.height = 720;
		if (words_per_line_value > 1650) {
			pr_debug("--> V4L2_STD_720P_50\n");
			*id = YUV_FORMAT(gs);
		} else {
			pr_debug("--> V4L2_STD_720P_60\n");
			gs->mode = gs2971_mode_720p;
			gs->framerate = gs2971_60_fps;
			*id = YUV_FORMAT(gs);
		}
	} else if (!interlaced_flag && 1124 <= lines_per_frame_value
		   && lines_per_frame_value <= 1125) {
		sensor->pix.width = 1920;
		sensor->pix.height = 1080;
		gs->mode = gs2971_mode_1080p;
		gs->framerate = gs2971_30_fps;	// Currently only 1080p30 is supported

		if (words_per_line_value >= 2200 + 550) {
			pr_debug("--> V4L2_STD_1080P_24\n");
			*id = YUV_FORMAT(gs);
		} else if (words_per_line_value >= 2200 + 440) {
			pr_debug("--> V4L2_STD_1080P_25\n");
			*id = YUV_FORMAT(gs);
		} else {
			pr_debug("--> V4L2_STD_1080P_60\n");
			*id = YUV_FORMAT(gs);
		}
	} else if (interlaced_flag && 1124 <= lines_per_frame_value
		   && lines_per_frame_value <= 1125) {

		sensor->pix.width = 1920;
		sensor->pix.height = 1080;
		if (words_per_line_value >= 2200 + 440) {
			pr_debug("--> V4L2_STD_1080I_50\n");
			*id = YUV_FORMAT(gs);
		} else {
			pr_debug("--> V4L2_STD_1080I_60\n");
			*id = YUV_FORMAT(gs);
		}
	} else {
		dev_err(&spi->dev,
			"Std detection failed: interlaced_flag: %u words per line %u/%u Lines per frame %u/%u SyncLock: %s %s StdLock: 0x%04x\n",
			(unsigned int)interlaced_flag,
			(unsigned int)words_per_actline_value,
			(unsigned int)words_per_line_value,
			(unsigned int)actlines_per_frame_value,
			(unsigned int)lines_per_frame_value,
			(sync_lock_value & GS_FLY_V_LOCK_DS1) ? "Vsync" :
			"NoVsync",
			(sync_lock_value & GS_FLY_H_LOCK_DS1) ? "Hsync" :
			"NoHsync", (unsigned int)(std_lock_value));
		return -1;
	}

	sd_audio_config_value = 0xaaaa;	// 16-bit, right-justified

	status =
	    gs2971_write_register(spi, GS2971_CFG_AUD, sd_audio_config_value);
	if (!status) {
		status =
		    gs2971_read_register(spi, GS2971_CFG_AUD, &readback_value);
		if (!status) {
			if (sd_audio_config_value != readback_value) {
				dev_dbg(&spi->dev,
					"SD audio readback failed, wanted x%04x, got x%04x\n",
					(unsigned int)sd_audio_config_value,
					(unsigned int)readback_value);
			}
		}
	}

	hd_audio_config_value = 0x0aa4;	// 16-bit, right-justified
	status =
	    gs2971_write_register(spi, GS2971_HD_CFG_AUD,
				  hd_audio_config_value);
	if (!status) {
		status =
		    gs2971_read_register(spi, GS2971_HD_CFG_AUD,
					 &readback_value);
		if (!status) {
			if (hd_audio_config_value != readback_value) {
				dev_dbg(&spi->dev,
					"HD audio readback failed, wanted x%04x, got x%04x\n",
					(unsigned int)hd_audio_config_value,
					(unsigned int)readback_value);
			}
		}
	}

	status =
	    gs2971_write_register(spi, GS2971_ANC_CONTROL, ANCCTL_ANC_DATA_DEL);
	if (status)
		return status;
	pr_debug("--> remove anc data\n");

#if 0
	status = gs2971_write_register(spi, GS2971_ACGEN_CTRL,
				       (GS2971_ACGEN_CTRL_SCLK_INV_MASK |
					GS2971_ACGEN_CTRL_MCLK_SEL_128FS));
#endif
	return 0;
}

static void gs2971_workqueue_handler(struct work_struct *data);

DECLARE_WORK(gs2971_worker, gs2971_workqueue_handler);

static void gs2971_workqueue_handler(struct work_struct *ignored)
{
	struct spi_device *spi;
	u16 bank_reg_base, anc_reg;
	static u16 anc_buf[257];
	int anc_length;
	int adf_found = 1;
	int ch_id;
	int status;
	u16 did, sdid;

	pr_debug("-> In function %s\n", __func__);

	for (ch_id = 0; ch_id < GS2971_NUM_CHANNELS; ch_id++) {

		spi = gs2971_get_spi(spidata);
		if (!spi)
			continue;

		/* Step 2: start writing to other bank */
		gs2971_write_register(spi, GS2971_ANC_CONTROL,
				      ANCCTL_ANC_DATA_DEL |
				      ANCCTL_ANC_DATA_SWITCH);

#if 1
		/* Step 1: read ancillary data */
		bank_reg_base = GS2971_ANC_BANK_REG;
		status = 0;
		for (anc_reg = bank_reg_base, adf_found = 1; (0 == status) &&
		     ((anc_reg + 6) < bank_reg_base + GS2971_ANC_BANK_SIZE);) {
			status = gs2971_read_buffer(spi, anc_reg, anc_buf, 6);
			anc_reg += 6;

			if (anc_reg >= bank_reg_base + GS2971_ANC_BANK_SIZE)
				break;

			if (!status) {
				if (anc_buf[0] == 0 ||
				    anc_buf[1] == 0xff || anc_buf[2] == 0xff) {
					did = anc_buf[3];
					sdid = anc_buf[4];
					anc_length = (anc_buf[5] & 0xff) + 1;
					anc_reg += anc_length;

					if (!(did == 0 && sdid == 0)
					    && (did < 0xf8)) {
						dev_dbg(&spi->dev,
							"anc[%x] %02x %02x %02x\n",
							anc_reg, did, sdid,
							anc_length);
					}
				} else {
					break;
				}
			}
		}
		dev_dbg(&spi->dev, "anc_end[%x] %02x %02x %02x\n",
			anc_reg, anc_buf[0], anc_buf[1], anc_buf[2]);
#endif

		/* Step 3: switch reads to other bank */
		gs2971_write_register(spi, GS2971_ANC_CONTROL,
				      ANCCTL_ANC_DATA_DEL);
	}
}

#if defined(GS2971_ENABLE_ANCILLARY_DATA)
static int gs2971_init_ancillary(struct spi_device *spi)
{
	pr_debug("-> In function %s\n", __func__);

	u16 value;
	int offset;

	int status = 0;

	/* Set up ancillary data filtering */
	if (!status)
		status =
		    gs2971_write_register(spi, GS2971_REG_ANC_TYPE1, 0x4100);
	/*  SMPTE-352M Payload ID (0x4101) */
	if (!status)
		status = gs2971_write_register(spi, GS2971_REG_ANC_TYPE2, 0x5f00);	/* Placeholder */

	if (!status)
		status = gs2971_write_register(spi, GS2971_REG_ANC_TYPE3, 0x6000);	/* Placeholder */

	if (!status)
		status =
		    gs2971_write_register(spi, GS2971_REG_ANC_TYPE4, 0x6100);
	/* SMPTE 334 - SDID 01=EIA-708, 02=EIA-608 */

	if (!status)
		status =
		    gs2971_write_register(spi, GS2971_REG_ANC_TYPE5, 0x6200);
	/* SMPTE 334 - SDID 01=Program description, 02=Data broadcast, 03=VBI data */

	if (0 == gs2971_read_register(spi, GS2971_REG_ANC_TYPE1, &value)) {
		dev_dbg(&spi->dev, "REG_ANC_TYPE1 value x%04x\n",
			(unsigned int)value);
	}
	if (0 == gs2971_read_register(spi, GS2971_REG_ANC_TYPE2, &value)) {
		dev_dbg(&spi->dev, "REG_ANC_TYPE2 value x%04x\n",
			(unsigned int)value);
	}

	/* Clear old ancillary data */
	if (!status)
		status = gs2971_write_register(spi, GS2971_ANC_CONTROL,
					       ANCCTL_ANC_DATA_DEL |
					       ANCCTL_ANC_DATA_SWITCH);

	/* Step 2: start writing to other bank */
	if (!status)
		status =
		    gs2971_write_register(spi, GS2971_ANC_CONTROL,
					  ANCCTL_ANC_DATA_DEL);
	return status;
}
#endif

/* gs2971_initialize :
 * This function will set the video format standard
 */
static int gs2971_initialize(struct gs2971_priv *gs, struct spi_device *spi)
{
	int status = 0;
	int retry = 0;
	u16 value,i;
	static u16 anc_buf[257];

	static void __iomem *base;

	//base = ioremap(0x4A009800, SZ_4K);	cispl
	//__raw_writel(0x02,base);    		cispl

//	u16 cfg = GS_VCFG1_861_PIN_DISABLE_MASK;
	u16 cfg = 0xC0;
	if (gs->cea861)		
		cfg |= GS_VCFG1_TIMING_861_MASK;

	pr_debug("-> In function %s\n", __func__);
	for (;;) {
		status = gs2971_write_register(spi, GS2971_VCFG1, cfg);

		if (status)
			return status;
		status = gs2971_read_register(spi, GS2971_VCFG1, &value);

		if (status)
			return status;
		dev_err(&spi->dev, "status=%x, read value of 0x%08x, expected 0x%08x\n", status,
			(unsigned int)value, cfg);

		if (value == cfg)
			break;
		if (retry++ >= 20)
			return -ENODEV;
		msleep(50);
	}
	
//      status = gs2971_write_register(spi, GS2971_VCFG2, GS_VCFG2_DS_SWAP_3G);
	status = gs2971_write_register(spi, GS2971_VCFG2, 0);
	if (status)
		return status;

	status = gs2971_write_register(spi, GS2971_IO_CONFIG,
				       (GS_IOCFG_HSYNC << 0) | (GS_IOCFG_VSYNC
								<< 5) |
				       (GS_IOCFG_DE << 10));
	if (status)
		return status;

	status = gs2971_write_register(spi, GS2971_IO_CONFIG2,
				       (GS_IOCFG_LOCKED << 0) | (GS_IOCFG_Y_ANC
								 << 5) |
				       (GS_IOCFG_DATA_ERROR << 10));
	if (status)
		return status;

	status =
	    gs2971_write_register(spi, GS2971_TIM_861_CFG, GS_TIMCFG_TRS_861);		
	if (status)
		return status;
//	status =gs2971_write_register(spi, GS2971_RATE_SEL, 0x00);		//cispl
	for(i=0;i<38;i++)
	{
		gs2971_read_register(spi, i, &value);
		dev_err(&spi->dev, "register %02x = %08x\n",i,(unsigned int)value);
	}
#if defined(GS2971_ENABLE_ANCILLARY_DATA)
	gs2971_init_ancillary(spi);
#endif

#if 0
	if (gs2971_timer.function == NULL) {
		init_timer(&gs2971_timer);
		gs2971_timer.function = gs2971_timer_function;
	}
	mod_timer(&gs2971_timer, jiffies + msecs_to_jiffies(gs2971_timeout_ms));
#endif
	return status;
}

#if 0
/*!
 * Return attributes of current video standard.
 * Since this device autodetects the current standard, this function also
 * sets the values that need to be changed if the standard changes.
 * There is no set std equivalent function.
 *
 *  @return		None.
 */
static void gs2971_get_std(struct v4l2_int_device *s, v4l2_std_id * std)
{
	pr_debug("-> In function %s\n", __func__);
}
#endif

/***********************************************************************
 * IOCTL Functions from v4l2_int_ioctl_desc.
 ***********************************************************************/

/*!
 * ioctl_g_ifparm - V4L2 sensor interface handler for vidioc_int_g_ifparm_num
 * s: pointer to standard V4L2 device structure
 * p: pointer to standard V4L2 vidioc_int_g_ifparm_num ioctl structure
 *
 * Gets slave interface parameters.
 * Calculates the required xclk value to support the requested
 * clock parameters in p.  This value is returned in the p
 * parameter.
 *
 * vidioc_int_g_ifparm returns platform-specific information about the
 * interface settings used by the sensor.
 *
 * Called on open.
 */
static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;

	pr_debug("-> In function %s\n", __func__);

	/* Initialize structure to 0s then set any non-0 values. */
	memset(p, 0, sizeof(*p));
	p->u.bt656.clock_curr = sensor->mclk;
	if (gs->cea861) {
		p->if_type = V4L2_IF_TYPE_BT656;	/* This is the only possibility. */
		p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_NOBT_10BIT;
		p->u.bt656.bt_sync_correct = 1;
//      	p->u.bt656.nobt_vs_inv = 1;
		p->u.bt656.nobt_hs_inv = 1;
	} else {
		/*
		 * p->if_type = V4L2_IF_TYPE_BT656_PROGRESSIVE;
		 * BT.656 - 20/10bit pin low doesn't work because then EAV of
		 * DS1/2 are also interleaved and imx only recognizes 4 word
		 * EAV/SAV codes, not 8
		 */
		p->if_type = V4L2_IF_TYPE_BT1120_PROGRESSIVE_SDR;
		p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_BT_10BIT;
		p->u.bt656.bt_sync_correct = 0;	// Use embedded sync
		p->u.bt656.nobt_vs_inv = 1;
//		p->u.bt656.nobt_hs_inv = 1;
	}
	p->u.bt656.latch_clk_inv = 0;	/* pixel clk polarity */
	p->u.bt656.clock_min = 6000000;
	p->u.bt656.clock_max = 180000000;
	return 0;
}

static int ioctl_s_power(struct v4l2_int_device *s, int on)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;

	pr_debug("-> In function %s\n", __func__);

	if (on && !sensor->on) {
		power_control(gs, 1);
	} else if (!on && sensor->on) {
		power_control(gs, 0);
	}
	return 0;
}

/*!
 * ioctl_g_parm - V4L2 sensor interface handler for VIDIOC_G_PARM ioctl
 * @s: pointer to standard V4L2 device structure
 * @a: pointer to standard V4L2 VIDIOC_G_PARM ioctl structure
 *
 * Returns the sensor's video CAPTURE parameters.
 */
static int ioctl_g_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;
	struct v4l2_captureparm *cparm = &a->parm.capture;

	pr_debug("-> In function %s\n", __func__);

	switch (a->type) {
		/* These are all the possible cases. */
	case V4L2_BUF_TYPE_VIDEO_CAPTURE:
		pr_debug("   type is V4L2_BUF_TYPE_VIDEO_CAPTURE\n");
		memset(a, 0, sizeof(*a));
		a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
		cparm->capability = sensor->streamcap.capability;
		cparm->timeperframe = sensor->streamcap.timeperframe;
		cparm->capturemode = sensor->streamcap.capturemode;
		break;

	case V4L2_BUF_TYPE_VIDEO_OUTPUT:
	case V4L2_BUF_TYPE_VIDEO_OVERLAY:
	case V4L2_BUF_TYPE_VBI_CAPTURE:
	case V4L2_BUF_TYPE_VBI_OUTPUT:
	case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
	case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
		break;

	default:
		pr_debug("ioctl_g_parm:type is unknown %d\n", a->type);
		break;
	}
	return 0;
}

/*!
 * ioctl_s_parm - V4L2 sensor interface handler for VIDIOC_S_PARM ioctl
 * @s: pointer to standard V4L2 device structure
 * @a: pointer to standard V4L2 VIDIOC_S_PARM ioctl structure
 *
 * Configures the sensor to use the input parameters, if possible.  If
 * not possible, reverts to the old parameters and returns the
 * appropriate error code.
 *
 * This driver cannot change these settings.
 */
static int ioctl_s_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;
	struct v4l2_fract *timeperframe = &a->parm.capture.timeperframe;
	int ret = 0;

	pr_debug("-> In function %s\n", __func__);

	/* Make sure power on */
	power_control(gs, 1);

	switch (a->type) {
		/* This is the only case currently handled. */
	case V4L2_BUF_TYPE_VIDEO_CAPTURE:
		/* Check that the new frame rate is allowed. */
		if ((timeperframe->numerator == 0) ||
		    (timeperframe->denominator == 0)) {
			timeperframe->denominator =
			    gs2971_framerates[gs2971_default_fps];
			timeperframe->numerator = 1;
			pr_warning("   Setting framerate to default (%dfps)!\n",
				   gs2971_framerates[gs2971_default_fps]);
		} else if (timeperframe->denominator !=
			   gs2971_framerates[gs->framerate]) {
			pr_warning
			    ("   Input framerate is %dfps and you are trying to set %dfps!\n",
			     gs2971_framerates[gs->framerate],
			     timeperframe->denominator);
		}
		sensor->streamcap.timeperframe = *timeperframe;
		sensor->streamcap.capturemode =
		    (u32) a->parm.capture.capturemode;
		break;

		/* These are all the possible cases. */
	case V4L2_BUF_TYPE_VIDEO_OUTPUT:
	case V4L2_BUF_TYPE_VIDEO_OVERLAY:
	case V4L2_BUF_TYPE_VBI_CAPTURE:
	case V4L2_BUF_TYPE_VBI_OUTPUT:
	case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
	case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
		pr_debug("   type is not V4L2_BUF_TYPE_VIDEO_CAPTURE but %d\n",
			 a->type);
		ret = -EINVAL;
		break;

	default:
		pr_debug("   type is unknown - %d\n", a->type);
		ret = -EINVAL;
		break;
	}
	return ret;
}

/*!
 * ioctl_g_fmt_cap - V4L2 sensor interface handler for ioctl_g_fmt_cap
 * @s: pointer to standard V4L2 device structure
 * @f: pointer to standard V4L2 v4l2_format structure
 *
 * Returns the sensor's current pixel format in the v4l2_format
 * parameter.
 */
static int ioctl_g_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;
	v4l2_std_id std = V4L2_STD_UNKNOWN;

	pr_debug("-> In function %s\n", __func__);

	power_control(gs, 1);
	switch (f->type) {
	case V4L2_BUF_TYPE_VIDEO_CAPTURE:
		get_std(s, &std);
		f->fmt.pix = sensor->pix;
		break;

	case V4L2_BUF_TYPE_SENSOR:
		pr_debug("%s: left=%d, top=%d, %dx%d\n", __func__,
			sensor->spix.left, sensor->spix.top,
			sensor->spix.swidth, sensor->spix.sheight);
		f->fmt.spix = sensor->spix;
		break;

	case V4L2_BUF_TYPE_PRIVATE:
		get_std(s, &std);
//              f->fmt.pix.pixelformat = (u32)std;
		break;

	default:
		f->fmt.pix = sensor->pix;
		break;
	}
	return 0;
}

/*!
 * ioctl_queryctrl - V4L2 sensor interface handler for VIDIOC_QUERYCTRL ioctl
 * @s: pointer to standard V4L2 device structure
 * @qc: standard V4L2 VIDIOC_QUERYCTRL ioctl structure
 *
 * If the requested control is supported, returns the control information
 * from the video_control[] array.  Otherwise, returns -EINVAL if the
 * control is not supported.
 */
static int ioctl_queryctrl(struct v4l2_int_device *s, struct v4l2_queryctrl *qc)
{
	pr_debug("-> In function %s\n", __func__);
	return -EINVAL;
}

/*!
 * ioctl_g_ctrl - V4L2 sensor interface handler for VIDIOC_G_CTRL ioctl
 * @s: pointer to standard V4L2 device structure
 * @vc: standard V4L2 VIDIOC_G_CTRL ioctl structure
 *
 * If the requested control is supported, returns the control's current
 * value from the video_control[] array.  Otherwise, returns -EINVAL
 * if the control is not supported.
 */
static int ioctl_g_ctrl(struct v4l2_int_device *s, struct v4l2_control *vc)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;
	int ret = 0;

	pr_debug("-> In function %s\n", __func__);

	switch (vc->id) {
	case V4L2_CID_BRIGHTNESS:
		vc->value = sensor->brightness;
		break;
	case V4L2_CID_HUE:
		vc->value = sensor->hue;
		break;
	case V4L2_CID_CONTRAST:
		vc->value = sensor->contrast;
		break;
	case V4L2_CID_SATURATION:
		vc->value = sensor->saturation;
		break;
	case V4L2_CID_RED_BALANCE:
		vc->value = sensor->red;
		break;
	case V4L2_CID_BLUE_BALANCE:
		vc->value = sensor->blue;
		break;
	case V4L2_CID_EXPOSURE:
		vc->value = sensor->ae_mode;
		break;
	default:
		ret = -EINVAL;
	}
	return ret;
}

/*!
 * ioctl_s_ctrl - V4L2 sensor interface handler for VIDIOC_S_CTRL ioctl
 * @s: pointer to standard V4L2 device structure
 * @vc: standard V4L2 VIDIOC_S_CTRL ioctl structure
 *
 * If the requested control is supported, sets the control's current
 * value in HW (and updates the video_control[] array).  Otherwise,
 * returns -EINVAL if the control is not supported.
 */
static int ioctl_s_ctrl(struct v4l2_int_device *s, struct v4l2_control *vc)
{
	struct gs2971_priv *gs = s->priv;
//	struct sensor_data *sensor = &gs->sensor;
	int retval = 0;

	pr_debug("-> In function %s\n", __func__);

	///* Make sure power on */
	power_control(gs, 1);

	switch (vc->id) {
	case V4L2_CID_BRIGHTNESS:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_BRIGHTNESS\n");
		break;
	case V4L2_CID_CONTRAST:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_CONTRAST\n");
		break;
	case V4L2_CID_SATURATION:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_SATURATION\n");
		break;
	case V4L2_CID_HUE:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_HUE\n");
		break;
	case V4L2_CID_AUTO_WHITE_BALANCE:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_AUTO_WHITE_BALANCE\n");
		break;
	case V4L2_CID_DO_WHITE_BALANCE:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_DO_WHITE_BALANCE\n");
		break;
	case V4L2_CID_RED_BALANCE:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_RED_BALANCE\n");
		break;
	case V4L2_CID_BLUE_BALANCE:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_BLUE_BALANCE\n");
		break;
	case V4L2_CID_GAMMA:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_GAMMA\n");
		break;
	case V4L2_CID_EXPOSURE:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_EXPOSURE\n");
		break;
	case V4L2_CID_AUTOGAIN:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_AUTOGAIN\n");
		break;
	case V4L2_CID_GAIN:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_GAIN\n");
		break;
	case V4L2_CID_HFLIP:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_HFLIP\n");
		break;
	case V4L2_CID_VFLIP:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_VFLIP\n");
		break;
	default:
		dev_dbg(&spidata->spi->dev, "   Default case\n");
		retval = -EPERM;
		break;
	}
	return retval;
}

/*!
 * ioctl_enum_framesizes - V4L2 sensor interface handler for
 *			   VIDIOC_ENUM_FRAMESIZES ioctl
 * @s: pointer to standard V4L2 device structure
 * @fsize: standard V4L2 VIDIOC_ENUM_FRAMESIZES ioctl structure
 *
 * Return 0 if successful, otherwise -EINVAL.
 */
static int ioctl_enum_framesizes(struct v4l2_int_device *s,
				 struct v4l2_frmsizeenum *fsize)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;

	pr_debug("-> In function %s\n", __func__);

	if (fsize->index > gs2971_mode_MAX || gs->mode > gs2971_mode_MAX)
		return -EINVAL;

	fsize->pixel_format = sensor->pix.pixelformat;
	fsize->discrete.width = gs2971_res[gs->mode].width;
	fsize->discrete.height = gs2971_res[gs->mode].height;
	return 0;
}

/*!
 * ioctl_g_chip_ident - V4L2 sensor interface handler for
 *			VIDIOC_DBG_G_CHIP_IDENT ioctl
 * @s: pointer to standard V4L2 device structure
 * @id: pointer to int
 *
 * Return 0.
 */
static int ioctl_g_chip_ident(struct v4l2_int_device *s, int *id)
{
	pr_debug("-> In function %s\n", __func__);

	((struct v4l2_dbg_chip_ident *)id)->match.type =
	    V4L2_CHIP_MATCH_I2C_DRIVER;
	strcpy(((struct v4l2_dbg_chip_ident *)id)->match.name, "gs2971_video");

	return 0;
}

/*!
 * ioctl_enum_fmt_cap - V4L2 sensor interface handler for VIDIOC_ENUM_FMT
 * @s: pointer to standard V4L2 device structure
 * @fmt: pointer to standard V4L2 fmt description structure
 *
 * Return 0.
 */
static int ioctl_enum_fmt_cap(struct v4l2_int_device *s,
			      struct v4l2_fmtdesc *fmt)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;

	pr_debug("-> In function %s\n", __func__);

	if (fmt->index > 0)
		return -EINVAL;
	fmt->pixelformat = sensor->pix.pixelformat;	//gs->pix.pixelformat;
	return 0;
}

/*!
 * ioctl_init - V4L2 sensor interface handler for VIDIOC_INT_INIT
 * @s: pointer to standard V4L2 device structure
 */
static int ioctl_init(struct v4l2_int_device *s)
{
	pr_debug("-> In function %s\n", __func__);
	return 0;
}

/*!
 * ioctl_dev_init - V4L2 sensor interface handler for vidioc_int_dev_init_num
 * @s: pointer to standard V4L2 device structure
 *
 * Initialise the device when slave attaches to the master.
 */
static int ioctl_dev_init(struct v4l2_int_device *s)
{
	pr_debug("-> In function %s\n", __func__);
	return 0;
}

/*!
 * This structure defines all the ioctls for this module.
 */
static struct v4l2_int_ioctl_desc gs2971_ioctl_desc[] = {

	{vidioc_int_dev_init_num, (v4l2_int_ioctl_func *) ioctl_dev_init},
	{vidioc_int_s_power_num, (v4l2_int_ioctl_func *) ioctl_s_power},
	{vidioc_int_g_ifparm_num, (v4l2_int_ioctl_func *) ioctl_g_ifparm},
	{vidioc_int_init_num, (v4l2_int_ioctl_func *) ioctl_init},

	/*!
	 * VIDIOC_ENUM_FMT ioctl for the CAPTURE buffer type.
	 */
	{vidioc_int_enum_fmt_cap_num,
	 (v4l2_int_ioctl_func *) ioctl_enum_fmt_cap},
	{vidioc_int_g_fmt_cap_num, (v4l2_int_ioctl_func *) ioctl_g_fmt_cap},
	{vidioc_int_g_parm_num, (v4l2_int_ioctl_func *) ioctl_g_parm},
	{vidioc_int_s_parm_num, (v4l2_int_ioctl_func *) ioctl_s_parm},
	{vidioc_int_queryctrl_num, (v4l2_int_ioctl_func *) ioctl_queryctrl},
	{vidioc_int_g_ctrl_num, (v4l2_int_ioctl_func *) ioctl_g_ctrl},
	{vidioc_int_s_ctrl_num, (v4l2_int_ioctl_func *) ioctl_s_ctrl},
	{vidioc_int_enum_framesizes_num,
	 (v4l2_int_ioctl_func *) ioctl_enum_framesizes},
	{vidioc_int_g_chip_ident_num,
	 (v4l2_int_ioctl_func *) ioctl_g_chip_ident},
};

static struct v4l2_int_slave gs2971_slave = {
	.ioctls = gs2971_ioctl_desc,
	.num_ioctls = ARRAY_SIZE(gs2971_ioctl_desc),
};

static struct v4l2_int_device gs2971_int_device = {
	.module = THIS_MODULE,
	.name = "gs2971",
	.type = v4l2_int_type_slave,
	.u = {
	      .slave = &gs2971_slave,
	      },
};
static int gs_g_register(struct v4l2_subdev *sd,
		  struct v4l2_dbg_register *reg)
{
	struct spi_device *spi = v4l2_get_subdevdata(sd);
	u16 val;
	int ret;

	ret = gs2971_read_register(spi, reg->reg & 0xFFFF, &val);
	reg->val = val;
	reg->size = 2;
	return ret;
}
static int gs_s_register(struct v4l2_subdev *sd,
		  const struct v4l2_dbg_register *reg)
{
	struct spi_device *spi = v4l2_get_subdevdata(sd);

	return gs2971_write_register(spi, reg->reg & 0xFFFF, reg->val & 0xFFFF);

}
/*static inline struct gs2971_spidata *to_gs(struct v4l2_subdev *sd)
{
	return container_of(sd, struct gs2971_spidata, sd);
}
static int gs_s_dv_timings(struct v4l2_subdev *sd,
		    struct v4l2_dv_timings *timings)
{
	struct gs2971_spidata *gs = to_gs(sd);
	int reg_value;

	reg_value = get_register_timings(timings);
	if (reg_value == 0x0)
		return -EINVAL;

	gs->current_timings = *timings;
	return 0;
}
static int gs_g_dv_timings(struct v4l2_subdev *sd,
		    struct v4l2_dv_timings *timings)
{
	struct gs *gs = to_gs(sd);

	*timings = gs->current_timings;
	return 0;
}
static int gs_g_input_status(struct v4l2_subdev *sd, u32 *status)
{
	struct gs2971_spidata *gs = to_gs(sd);
	u16 reg_value, i;
	int ret;
*/
	/*
	 * Check if the component detect a line, a frame or something else
	 * which looks like a video signal activity.
	 */
/*	for (i = 0; i < 4; i++) {
		ret = gs2971_read_register(gs->pdev,
				       REG_LINES_PER_FRAME + i, &reg_value);
		if (reg_value)
			break;
		if (ret) {
			*status = V4L2_IN_ST_NO_POWER;
			return ret;
		}
	}
*/
	/* If no register reports a video signal */
/*	if (i >= 4)
		*status |= V4L2_IN_ST_NO_SIGNAL;

	ret = gs_read_register(gs->pdev, REG_STATUS, &reg_value);
	if (!(reg_value & MASK_H_LOCK))
		*status |=  V4L2_IN_ST_NO_H_LOCK;
	if (!(reg_value & MASK_V_LOCK))
		*status |=  V4L2_IN_ST_NO_V_LOCK;
	if (!(reg_value & MASK_STD_LOCK))
		*status |=  V4L2_IN_ST_NO_STD_LOCK;

	return ret;
}
static int gs_query_dv_timings(struct v4l2_subdev *sd,
			struct v4l2_dv_timings *timings)
{
	struct gs *gs = to_gs(sd);
	struct v4l2_dv_timings fmt;
	u16 reg_value, i;
	int ret;

	if (gs->enabled)
		return -EBUSY;
*/
	/*
	 * Check if the component detect a line, a frame or something else
	 * which looks like a video signal activity.
	 */
/*	for (i = 0; i < 4; i++) {
		gs_read_register(gs->pdev, REG_LINES_PER_FRAME + i, &reg_value);
		if (reg_value)
			break;
	}
*/
	/* If no register reports a video signal */
/*	if (i >= 4)
		return -ENOLINK;

	gs_read_register(gs->pdev, REG_STATUS, &reg_value);
	if (!(reg_value & MASK_H_LOCK) || !(reg_value & MASK_V_LOCK))
		return -ENOLCK;
	if (!(reg_value & MASK_STD_LOCK))
		return -ERANGE;

	ret = gs_status_format(reg_value, &fmt);

	if (ret < 0)
		return ret;

	*timings = fmt;
	return 0;
}
static int gs_s_stream(struct v4l2_subdev *sd, int enable)
{
	struct gs *gs = to_gs(sd);
	int reg_value;

	if (gs->enabled == enable)
		return 0;

	gs->enabled = enable;

	if (enable) {
*/		/* To force the specific format */
//		reg_value = get_register_timings(&gs->current_timings);
//		return gs_write_register(gs->pdev, REG_FORCE_FMT, reg_value);
//	}

	/* To renable auto-detection mode */
//	return gs_write_register(gs->pdev, REG_FORCE_FMT, 0x0);
//}

static const struct v4l2_subdev_core_ops gs2971_core_ops = {
#ifdef CONFIG_VIDEO_ADV_DEBUG
	.g_register = gs_g_register,
	.s_register = gs_s_register,
#endif
};

static const struct v4l2_subdev_video_ops gs2971_video_ops = {
//	.g_std = get_std,
//	.g_fmt_cap = ioctl_g_fmt_cap,
//	.g_parm = ioctl_g_parm,
//	.s_parm = ioctl_s_parm,
//	.queryctrl = ioctl_queryctrl,
//	.enum_framesizes = ioctl_enum_framesizes,
};

static const struct v4l2_subdev_pad_ops gs2971_pad_ops = {
//	.enum_dv_timings = ioctl_dev_init,
//	.dv_timings_cap = ioctl_init,
};
static const struct v4l2_subdev_ops gs2971_ops = {
	.core = &gs2971_core_ops,
	.video = &gs2971_video_ops,
	.pad = &gs2971_pad_ops,
};

/*!
 * GS2971 SPI probe function.
 * Function set in spi_driver struct.
 * Called by insmod.
 *
 *  @param *spi	SPI device descriptor.
 *
 *  @return		Error code indicating success or failure.
 */
static int gs2971_probe(struct spi_device *spi)
{
	struct v4l2_subdev *sd;
	struct device *dev = &spi->dev;
	struct gs2971_priv *gs;
	struct sensor_data *sensor;
	struct pinctrl_state *pins;

	int ret = 0;

	pr_debug("-> In function %s\n", __func__);

	gs = kzalloc(sizeof(*gs), GFP_KERNEL);
	if (!gs)
			return -ENOMEM;

	/* Allocate driver data */
	spidata = kzalloc(sizeof(*spidata), GFP_KERNEL);
	if (!spidata) {
		ret = -ENOMEM;
		goto exit;
	}
	/* Initialize the driver data */
	spidata->spi = spi;
	mutex_init(&spidata->buf_lock);
	sensor = &gs->sensor;

	/* Set initial values for the sensor struct. */
	memset(gs, 0, sizeof(*gs));
	ret = of_property_read_u32(dev->of_node, "mclk", &sensor->mclk);
	dev_err(dev, "mclk=%x\n",sensor->mclk);
	if (ret) {
		dev_err(dev, "mclk missing or invalid\n");
		goto exit;
	}

	ret = of_property_read_u32(dev->of_node, "ipu", &sensor->ipu_id);
	dev_err(dev, "ipu=%x\n",sensor->ipu_id);
	if (ret) {
		dev_err(dev, "ipu missing or invalid\n");
		goto exit;
	}

	ret = of_property_read_u32(dev->of_node, "csi", &sensor->csi);
	if (ret) {
		dev_err(dev, "csi missing or invalid\n");
		goto exit;
	}

	ret = of_property_read_u32(dev->of_node, "cea861", &gs->cea861);
	if (ret) {
		dev_err(dev, "cea861 missing or invalid\n");
		goto exit;
	}
	pr_info("%s:cea861=%d\n", __func__, gs->cea861);

	/*gs->pinctrl = devm_pinctrl_get(dev);
	if (IS_ERR(gs->pinctrl)) {
		ret = PTR_ERR(gs->pinctrl);
		dev_err(dev, "pinctrl missing or invalid\n");
		goto exit;
	}


	pins = pinctrl_lookup_state(gs->pinctrl, gs->cea861 ? "cea861" : "no_cea861");
	if (IS_ERR(pins)) {
		ret = PTR_ERR(pins);
		dev_err(dev, "pinctrl lookup state missing or invalid\n");
		goto exit;
	}

	ret = pinctrl_select_state(gs->pinctrl, pins);
	if (ret)
	{
		dev_err(dev, "pinctrl select state missing or invalid\n");
		goto exit;
	}*/
	sensor->pix.pixelformat = YUV_FORMAT(gs);
	sensor->pix.width = gs2971_res[gs2971_mode_default].width;
	sensor->pix.height = gs2971_res[gs2971_mode_default].height;
	sensor->streamcap.capability = V4L2_MODE_HIGHQUALITY |
	    V4L2_CAP_TIMEPERFRAME;
	sensor->streamcap.capturemode = 0;
	sensor->streamcap.timeperframe.denominator = DEFAULT_FPS;
	sensor->streamcap.timeperframe.numerator = 1;

	//sensor->pix.priv = 1;  /* 1 is used to indicate TV in */
	/*ret = gs2971_get_gpios(gs, dev);
	if (ret)
	{
		dev_err(dev, "get gpio missing or invalid\n");	
		goto exit;
	}*/
	power_control(gs, 1);
	gs2971_int_device.priv = gs;

	ret = gs2971_initialize(gs, spi);
	if (ret)
	{	
		dev_err(dev, "gs2971 init missing or invalid\n");	
		goto exit;
	}
	power_control(gs, 0);

	spidata->spi = spi;
	sd = &spidata->sd;
	ret = v4l2_int_device_register(&gs2971_int_device);
	//v4l2_device_register(&spi->dev, &spi->sd);
	//v4l2_spi_subdev_init(sd, spi, &gs2971_ops);		
	//v4l2_subdev_init(sd, &gs2971_ops);
	//ret = v4l2_async_register_subdev(sd);
 exit:
	if (ret) {
		kfree(spidata);
		kfree(gs);
		pr_err("gs2971_probe returns %d\n", ret);
	}
	return ret;

}

static int gs2971_remove(struct spi_device *spi)
{
	struct v4l2_subdev *sd;
	pr_debug("-> In function %s\n", __func__);
	kfree(gs2971_int_device.priv);
	kfree(spidata);
	v4l2_int_device_unregister(&gs2971_int_device);
	//v4l2_device_unregister_subdev(sd);
	//v4l2_async_unregister_subdev(sd);
	return 0;
}

static const struct of_device_id gs2971_dt_ids[] = {
	{
		.compatible = "gn,gs2971",
	}, {
		/* sentinel */
	}
};
MODULE_DEVICE_TABLE(of, gs2971_dt_ids);

static struct spi_driver gs2971_spi = {
	.driver = {
		   .name = DRIVER_NAME,
		   .bus = &spi_bus_type,
		   .owner = THIS_MODULE,
		   .of_match_table = gs2971_dt_ids,
		   },
	.probe = gs2971_probe,
	.remove = gs2971_remove,
};

/*!
 * gs2971 init function.
 * Called on insmod.
 *
 * @return    Error code indicating success or failure.
 */
static int __init gs2971_init(void)
{
	int ret;

	pr_debug("-> In function %s\n", __func__);

	ret = spi_register_driver(&gs2971_spi);

	return ret;
}

/*!
 * gs2971 cleanup function.
 * Called on rmmod.
 *
 * @return   Error code indicating success or failure.
 */
static void __exit gs2971_exit(void)
{
	pr_debug("-> In function %s\n", __func__);

	spi_unregister_driver(&gs2971_spi);
}

module_init(gs2971_init);
module_exit(gs2971_exit);
MODULE_DESCRIPTION("gs2971 video input Driver");
MODULE_LICENSE("GPL");
MODULE_VERSION("1.0");
MODULE_ALIAS("CSI");

/* DTS FILE*/

&vip2{
    status="okay";
};

&vin3a {
    status="okay";
    vin3a_ep: endpoint {
        remote-endpoint = <&gs2971_cam0>;
        slave-mode;
    };
};

&mcspi3{
    status="okay";
    pinctrl-names = "default";
//    pinctrl-0 = <&spi3_pins_default>;
    ti,pindir-d0-out-d1-in;
    bus-num=<3>;   
    
    gs2971: gs2971@2 {
        compatible = "gn,gs2971";
        reg = <2>;
        bits_per_word=<16>;
        mclk = <27000000>;
        csi = <1>;
        cea861 = <0>;
        ipu = <1>;
        spi-max-frequency = <6000000>;
        //port {
        //#address-cells = <1>;
        //#size-cells = <0>;
        port {        
            gs2971_cam0: endpoint {
            remote-endpoint = <&vin3a_ep>;
            hsync-active = <1>;
            vsync-active = <1>;
            pixel-clock-freq = <74250000>;    //750khZ
                    //input-clock-freq = <74250000>;
            pclk-sample = <0>;
                data-shift = <0>;
            bus-width = <16>;    
            };
        };
    };
};

But it's not showing any video i am attaching the prompt

am57xx-evm login: root
root@am57xx-evm:~# cd ..
root@am57xx-evm:/home# cd ..
root@am57xx-evm:/# insmod /lib/modules/4.19.59-g5f8c1c6121/kernel/drivers/media/
common/ i2c/ platform/ usb/ v4l2-core/
root@am57xx-evm:/# insmod /lib/modules/4.19.59-g5f8c1c6121/kernel/drivers/media/v4l2-core/v4l2-fwnode.ko
root@am57xx-evm:/# insmod /lib/modules/4.19.59-g5f8c1c6121/kernel/drivers/media/platform/mxc/capture/v4l2-int-device.ko
root@am57xx-evm:/# insmod /lib/modules/4.19.59-g5f8c1c6121/kernel/drivers/media/platform/mxc/capture/gs2971_video.ko
[ 48.252890] gs2971 spi3.2: mclk=19bfcc0
[ 48.256979] gs2971 spi3.2: ipu=1
[ 48.260477] gs2971_probe:cea861=0
[ 48.265692] gs2971_gpio_state: active=0, standby-gpios(0)=0x0
[ 49.352544] gs2971 spi3.2: status=0, read value of 0x000000c0, expected 0x000000c0
[ 49.360619] gs2971 spi3.2: register 00 = 000000c0
[ 49.372472] gs2971 spi3.2: register 01 = 00000000
[ 49.381927] gs2971 spi3.2: register 02 = 00000000
[ 49.388128] gs2971 spi3.2: register 03 = 00000000
[ 49.394330] gs2971 spi3.2: register 04 = 00000000
[ 49.399125] gs2971 spi3.2: register 05 = 00004210
[ 49.406695] gs2971 spi3.2: register 06 = 00000b66
[ 49.411477] gs2971 spi3.2: register 07 = 00001dff
[ 49.416513] gs2971 spi3.2: register 08 = 00000820
[ 49.421368] gs2971 spi3.2: register 09 = 00001883
[ 49.426253] gs2971 spi3.2: register 0a = 00000000
[ 49.431108] gs2971 spi3.2: register 0b = 00000000
[ 49.435989] gs2971 spi3.2: register 0c = 00000000
[ 49.440805] gs2971 spi3.2: register 0d = 00000000
[ 49.445689] gs2971 spi3.2: register 0e = 00000000
[ 49.450556] gs2971 spi3.2: register 0f = 00000000
[ 49.455431] gs2971 spi3.2: register 10 = 00000000
[ 49.460283] gs2971 spi3.2: register 11 = 00000000
[ 49.465207] gs2971 spi3.2: register 12 = 00000000
[ 49.470028] gs2971 spi3.2: register 13 = 00000000
[ 49.474827] gs2971 spi3.2: register 14 = 00000000
[ 49.479694] gs2971 spi3.2: register 15 = 00000000
[ 49.484498] gs2971 spi3.2: register 16 = 00000000
[ 49.489282] gs2971 spi3.2: register 17 = 00000000
[ 49.494110] gs2971 spi3.2: register 18 = 00000000
[ 49.498898] gs2971 spi3.2: register 19 = 00000000
[ 49.503704] gs2971 spi3.2: register 1a = 00000000
[ 49.508490] gs2971 spi3.2: register 1b = 00000000
[ 49.514315] gs2971 spi3.2: register 1c = 00000000
[ 49.519101] gs2971 spi3.2: register 1d = 00000000
[ 49.523905] gs2971 spi3.2: register 1e = 00000000
[ 49.528690] gs2971 spi3.2: register 1f = 00000780
[ 49.533493] gs2971 spi3.2: register 20 = 00000898
[ 49.538276] gs2971 spi3.2: register 21 = 00000465
[ 49.543078] gs2971 spi3.2: register 22 = 00001438
[ 49.547863] gs2971 spi3.2: register 23 = 00000003
[ 49.552681] gs2971 spi3.2: register 24 = 00000004
[ 49.557464] gs2971 spi3.2: register 25 = 00000022
[ 49.562187] gs2971_gpio_state: active=1, standby-gpios(0)=0x1
root@am57xx-evm:/# ls /dev/video
video0 video10 video11
root@am57xx-evm:/# lsmod
Module Size Used by
gs2971_video 20480 0
v4l2_int_device 16384 1 gs2971_video
v4l2_fwnode 20480 0
pru_rproc 20480 0
irq_pruss_intc 16384 1 pru_rproc
pruss 16384 1 pru_rproc
dwc3 73728 0
udc_core 28672 1 dwc3
ahci_platform 16384 0
libahci_platform 20480 1 ahci_platform
snd_soc_simple_card 16384 0
snd_soc_simple_card_utils 16384 1 snd_soc_simple_card
libahci 36864 2 ahci_platform,libahci_platform
ti_vip 49152 0
pvrsrvkm 401408 4
libata 208896 3 ahci_platform,libahci_platform,libahci
pruss_soc_bus 16384 0
omap_aes_driver 24576 0
omap_sham 28672 0
omap_wdt 16384 0
phy_omap_usb2 16384 2
ti_vpe 32768 0
ti_sc 36864 2 ti_vpe,ti_vip
ti_csc 16384 2 ti_vpe,ti_vip
ti_vpdma 24576 2 ti_vpe,ti_vip
omap_des 20480 0
des_generic 28672 1 omap_des
omap_hdq 16384 0
crypto_engine 16384 2 omap_des,omap_aes_driver
snd_soc_tlv320aic3x 57344 1
wire 32768 1 omap_hdq
rtc_omap 20480 1
dwc3_omap 16384 0
at24 20480 0
omap_crypto 16384 2 omap_des,omap_aes_driver
pixcir_i2c_ts 16384 0
omap_remoteproc 20480 0
virtio_rpmsg_bus 20480 0
remoteproc 49152 2 pru_rproc,omap_remoteproc
sch_fq_codel 20480 3
uio_module_drv 16384 0
uio 20480 1 uio_module_drv
ftdi_sio 40960 0
usbserial 36864 1 ftdi_sio
usbcore 217088 2 ftdi_sio,usbserial
usb_common 16384 3 udc_core,usbcore,dwc3
jailhouse 32768 0
gdbserverproxy 16384 0
cryptodev 49152 0
root@am57xx-evm:/#

I am able to read spi data and camera detected GS2971 HD detected.all formats 1920x1080 30p all are detecting when camera connecting time.

but for am5728 not able to detect vin3a data. any other v4l2_spi_subdev_init we want to add.

Thanking you,

regards,

Ram

Hi sir,

I am added v4l2_spi_subdev_init function but it hangs

root@am57xx-evm:/# insmod /lib/modules/4.19.59-g5f8c1c6121/kernel/drivers/media/platform/mxc/capture/gs2971_video.ko
[ 85.822628] gs2971 spi3.2: mclk=19bfcc0
[ 85.826496] gs2971 spi3.2: ipu=1
[ 85.829746] gs2971_probe:cea861=0
[ 85.834440] gs2971_gpio_state: active=0, standby-gpios(0)=0x0
[ 86.872535] gs2971 spi3.2: status=0, read value of 0x000000c0, expected 0x000000c0
[ 86.880626] gs2971 spi3.2: register 00 = 000000c0
[ 86.895976] gs2971 spi3.2: register 01 = 00000000
[ 86.900768] gs2971 spi3.2: register 02 = 00000000
[ 86.907895] gs2971 spi3.2: register 03 = 00000000
[ 86.912758] gs2971 spi3.2: register 04 = 00000000
[ 86.917555] gs2971 spi3.2: register 05 = 00004210
[ 86.922534] gs2971 spi3.2: register 06 = 00001dff
[ 86.927331] gs2971 spi3.2: register 07 = 00001dff
[ 86.932127] gs2971 spi3.2: register 08 = 00000820
[ 86.936965] gs2971 spi3.2: register 09 = 00001883
[ 86.941764] gs2971 spi3.2: register 0a = 00000000
[ 86.946774] gs2971 spi3.2: register 0b = 00000000
[ 86.951564] gs2971 spi3.2: register 0c = 00000000
[ 86.956401] gs2971 spi3.2: register 0d = 00000000
[ 86.961198] gs2971 spi3.2: register 0e = 00000000
[ 86.966053] gs2971 spi3.2: register 0f = 00000000
[ 86.970849] gs2971 spi3.2: register 10 = 00000000
[ 86.975668] gs2971 spi3.2: register 11 = 00000000
[ 86.980462] gs2971 spi3.2: register 12 = 00000000
[ 86.985293] gs2971 spi3.2: register 13 = 00000000
[ 86.990090] gs2971 spi3.2: register 14 = 00000000
[ 86.994905] gs2971 spi3.2: register 15 = 00000000
[ 86.999768] gs2971 spi3.2: register 16 = 00000000
[ 87.004604] gs2971 spi3.2: register 17 = 00000000
[ 87.009401] gs2971 spi3.2: register 18 = 00000000
[ 87.014389] gs2971 spi3.2: register 19 = 00000000
[ 87.019179] gs2971 spi3.2: register 1a = 00000000
[ 87.024018] gs2971 spi3.2: register 1b = 00000000
[ 87.028814] gs2971 spi3.2: register 1c = 00000000
[ 87.033665] gs2971 spi3.2: register 1d = 00000000
[ 87.038462] gs2971 spi3.2: register 1e = 00000000
[ 87.043278] gs2971 spi3.2: register 1f = 00000000
[ 87.048072] gs2971 spi3.2: register 20 = 00000000
[ 87.052901] gs2971 spi3.2: register 21 = 00000000
[ 87.057695] gs2971 spi3.2: register 22 = 00008000
[ 87.062548] gs2971 spi3.2: register 23 = 00000000
[ 87.062621] gs2971 spi3.2: register 24 = 00000004
[ 87.062696] gs2971 spi3.2: register 25 = 00000040
[ 87.062702] gs2971_gpio_state: active=1, standby-gpios(0)=0x1
[ 87.062709] (NULL device *): v4l2_async_register_subdev Entered
[ 87.088622] (NULL device *): v4l2_async_notifier_find_v4l2_dev1
[ 87.094583] (NULL device *): v4l2_async_notifier_find_v4l2_dev2
[ 87.100525] (NULL device *): v4l2_async_notifier_find_v4l2_dev After loop
[ 87.107352] (NULL device *): v4l2_async_find_match
[ 87.112161] (NULL device *): v4l2_async_find_match match_fwnode
[ 87.118150] (NULL device *): v4l2_async_find_match match_fwnode1
[ 87.124200] (NULL device *): v4l2_async_match_notify
[ 87.129182] (NULL device *): v4l2_async_match_notify v4l2_async_notifier_call_bound start
[ 87.137410] (NULL device *): v4l2_async_notifier_call_bound start
[ 87.143555] (NULL device *): v4l2_async_notifier_call_bound end
[ 87.149497] vin3a: Port A: Using subdev gs2971 for capture

Hi Ramachandra,

Which SDK release are you using?
Can you please cross check if pinmux configuration for VIN data lines and clock lines are proper?

Also, you can go through the https://software-dl.ti.com/processor-sdk-linux/esd/docs/06_03_00_106/linux/Foundational_Components/Kernel/Kernel_Drivers/Camera/VIP.html for debugging tips. 

Regards,
Parth

Hi sir,

i am using ti-processor-sdk-linux-am57xx-evm-06.01.00.08

U-BOOT version: u-boot-2019.01+gitAUTOINC+029e4c009a-g029e4c009a

Linux Version : linux-4.19.59+gitAUTOINC+5f8c1c6121-5f8c1c6121

and i am attaching mux_data.h and all values of vin & clk properly getting(Through oscilloscope i probed).

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
 *
 * Author: Felipe Balbi <balbi@ti.com>
 *
 * Based on board/ti/dra7xx/evm.c
 */
#ifndef _MUX_DATA_BEAGLE_X15_H_
#define _MUX_DATA_BEAGLE_X15_H_

#include <asm/arch/mux_dra7xx.h>

const struct pad_conf_entry core_padconf_array_essential_x15[] = {
//QSPI
	{GPMC_A13, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a13.qspi1_rtclk */
	{GPMC_A14, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a14.qspi1_d3 */
	{GPMC_A15, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a15.qspi1_d2 */
	{GPMC_A16, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a16.qspi1_d0 */
	{GPMC_A17, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a17.qspi1_d1 */
	{GPMC_A18, (M1 | PIN_OUTPUT | MANUAL_MODE)},	/* gpmc_a18.qspi1_sclk */
	{GPMC_CS2, (M1 | PIN_OUTPUT | MANUAL_MODE)},	/* gpmc_cs2.qspi1_cs0 */

	{MDIO_MCLK, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* mdio_mclk.mdio_mclk */
	{MDIO_D, (M0 | PIN_INPUT | SLEWCONTROL)},	/* mdio_d.mdio_d */

	{RMII_MHZ_50_CLK, (M14 | PIN_INPUT_PULLUP)},	/* RMII_MHZ_50_CLK.gpio5_17 */
//Ethernet
	{RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
	{RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
	{RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
	{RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
	{RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
	{RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
	{RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
	{RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
	{RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
	{RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
	{RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
	{RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */

	{XREF_CLK3, (M9 | PIN_OUTPUT_PULLDOWN)},	/* xref_clk3.clkout3 */
//spi3
	{MCASP1_AXR8, (M3 | PIN_INPUT )},	/* mcasp1_axr8.spi3_sclk */
	{MCASP1_AXR9, (M3 | PIN_INPUT )},	/* mcasp1_axr9.spi3_d1 */
	{MCASP1_AXR10, (M3 | PIN_OUTPUT )},	/* mcasp1_axr10.spi3_d0 */
	{MCASP1_AXR11, (M3 | PIN_OUTPUT )},	/* mcasp1_axr11.spi3_cs	 */
//SD-Card
	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_cmd.mmc1_cmd */
	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat0.mmc1_dat0 */
	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat1.mmc1_dat1 */
	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat2.mmc1_dat2 */
	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat3.mmc1_dat3 */
	{MMC1_SDCD, (M14 | PIN_INPUT | SLEWCONTROL)},	/* mmc1_sdcd.gpio6_27 */

	{SPI1_D1, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_d1.gpio7_8 */
//UART
	{UART2_TXD, (M14 | PIN_INPUT_PULLDOWN)},	/* uart2_txd.gpio7_27 */	
	{UART2_CTSN, (M2 | PIN_INPUT_PULLUP)},	/* uart2_ctsn.uart3_rxd */
	{UART2_RTSN, (M1 | PIN_OUTPUT)},	/* uart2_rtsn.uart3_txd */
//I2C
	{I2C1_SDA, (M0 | PIN_INPUT_PULLUP)},	/* i2c1_sda.i2c1_sda */
	{I2C1_SCL, (M0 | PIN_INPUT_PULLUP)},	/* i2c1_scl.i2c1_scl */
//General Wakeup
	{WAKEUP0, (M0 | PIN_INPUT)},	/* Wakeup0.Wakeup0 */
	{WAKEUP1, (M0 | PIN_INPUT)},	/* Wakeup1.Wakeup1 */
	{WAKEUP2, (M0 | PIN_INPUT)},	/* Wakeup2.Wakeup2 */
	{WAKEUP3, (M0 | PIN_INPUT)},	/* Wakeup3.Wakeup3 */
	{ON_OFF, (M0 | PIN_OUTPUT)},	/* on_off.on_off */
	{RTC_PORZ, (M0 | PIN_INPUT)},	/* rtc_porz.rtc_porz */
	{TMS, (M0 | PIN_INPUT_PULLUP)},	/* tms.tms */
	{TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* tdi.tdi */
	{TDO, (M0 | PIN_OUTPUT)},	/* tdo.tdo */
	{TCLK, (M0 | PIN_INPUT_PULLDOWN)},	/* tclk.tclk */
	{TRSTN, (M0 | PIN_INPUT)},	/* trstn.trstn */
	{RTCK, (M0 | PIN_OUTPUT)},	/* rtck.rtck */
	{EMU0, (M0 | PIN_INPUT)},	/* emu0.emu0 */
	{EMU1, (M0 | PIN_INPUT)},	/* emu1.emu1 */
	{NMIN_DSP, (M0 | PIN_INPUT)},	/* nmin_dsp.nmin_dsp */
	{RSTOUTN, (M0 | PIN_OUTPUT)},	/* rstoutn.rstoutn */
};

const struct pad_conf_entry core_padconf_array_delta_x15_sr1_1[] = {
	{VOUT1_DE, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_de.vin3a_de */
	{VOUT1_HSYNC, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_hsync.vin3a_hsync */
	{VOUT1_VSYNC, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_vsync.vin3a_vsync */
	{VOUT1_D8,  (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d8.vin3a_d8 */
	{VOUT1_D9,  (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d9.vin3a_d9 */
	{VOUT1_D10, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d10.vin3a_d10 */
	{VOUT1_D11, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d11.vin3a_d11 */
	{VOUT1_D12, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d12.vin3a_d12 */
	{VOUT1_D13, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d13.vin3a_d13 */
	{VOUT1_D14, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d14.vin3a_d14 */
	{VOUT1_D15, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d15.vin3a_d15 */
	{VOUT1_D16, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d16.vin3a_d0 */
	{VOUT1_D17, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d17.vin3a_d1 */
	{VOUT1_D18, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d18.vin3a_d2 */
	{VOUT1_D19, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d19.vin3a_d3 */
	{VOUT1_D20, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d20.vin3a_d4 */
	{VOUT1_D21, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d21.vin3a_d5 */
	{VOUT1_D22, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d22.vin3a_d6 */
	{VOUT1_D23, (M4 | PIN_INPUT | MANUAL_MODE)},	/* vout1_d23.vin3a_d7 */
	{VOUT1_FLD, (M4 | PIN_INPUT | MANUAL_MODE )},	/* vout1_fld.vin3a_clk */
};

const struct pad_conf_entry core_padconf_array_delta_x15_sr2_0[] = {
	{VOUT1_DE, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_de.vin3a_clk */
	{VOUT1_HSYNC, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_hsync.vin3a_hsync */
	{VOUT1_VSYNC, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_vsync.vin3a_vsync */
	{VOUT1_D8, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d8.vin3a_d8 */
	{VOUT1_D9, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d9.vin3a_d9 */
	{VOUT1_D10, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d10.vin3a_d10 */
	{VOUT1_D11, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d11.vin3a_d11 */
	{VOUT1_D12, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d12.vin3a_d12 */
	{VOUT1_D13, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d13.vin3a_d13 */
	{VOUT1_D14, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d14.vin3a_d14 */
	{VOUT1_D15, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d15.vin3a_d15 */
	{VOUT1_D16, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d16.vin3a_d0 */
	{VOUT1_D17, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d17.vin3a_d1 */
	{VOUT1_D18, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d18.vin3a_d2 */
	{VOUT1_D19, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d19.vin3a_d3 */
	{VOUT1_D20, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d20.vin3a_d4 */
	{VOUT1_D21, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d21.vin3a_d5 */
	{VOUT1_D22, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d22.vin3a_d6 */
	{VOUT1_D23, (M4 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vout1_d23.vin3a_d7 */
};

const struct pad_conf_entry core_padconf_array_essential_am574x_idk[] = {
	{GPMC_A0, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a0.vin4b_d0 */
	{GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a1.vin4b_d1 */
	{GPMC_A2, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a2.vin4b_d2 */
	{GPMC_A3, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a3.vin4b_d3 */
	{GPMC_A4, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a4.vin4b_d4 */
	{GPMC_A5, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a5.vin4b_d5 */
	{GPMC_A6, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a6.vin4b_d6 */
	{GPMC_A7, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a7.vin4b_d7 */
	{GPMC_A8, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a8.vin4b_hsync1 */
	{GPMC_A9, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a9.vin4b_vsync1 */
	{GPMC_A10, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a10.vin4b_clk1 */
	{GPMC_A11, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a11.vin4b_de1 */
	{GPMC_A12, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a12.vin4b_fld1 */
	{GPMC_A13, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a13.qspi1_rtclk */
	{GPMC_A14, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a14.qspi1_d3 */
	{GPMC_A15, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a15.qspi1_d2 */
	{GPMC_A16, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a16.qspi1_d0 */
	{GPMC_A17, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a17.qspi1_d1 */
	{GPMC_A18, (M1 | PIN_OUTPUT | MANUAL_MODE)},	/* gpmc_a18.qspi1_sclk */
	{GPMC_A19, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a19.mmc2_dat4 */
	{GPMC_A20, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a20.mmc2_dat5 */
	{GPMC_A21, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a21.mmc2_dat6 */
	{GPMC_A22, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a22.mmc2_dat7 */
	{GPMC_A23, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a23.mmc2_clk */
	{GPMC_A24, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a24.mmc2_dat0 */
	{GPMC_A25, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a25.mmc2_dat1 */
	{GPMC_A26, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a26.mmc2_dat2 */
	{GPMC_A27, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a27.mmc2_dat3 */
	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_cs1.mmc2_cmd */
	{GPMC_CS2, (M1 | PIN_OUTPUT | MANUAL_MODE)},	/* gpmc_cs2.qspi1_cs0 */
	{VIN1A_D5, (M14 | PIN_OUTPUT)},	/* vin1a_d5.gpio3_9 */
	{VIN1A_D6, (M14 | PIN_OUTPUT)},	/* vin1a_d6.gpio3_10 */
	{VIN1A_D7, (M14 | PIN_OUTPUT)},	/* vin1a_d7.gpio3_11 */
	{VIN1A_D8, (M14 | PIN_OUTPUT)},	/* vin1a_d8.gpio3_12 */
	{VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d10.gpio3_14 */
	{VIN1A_D12, (M14 | PIN_INPUT)},	/* vin1a_d12.gpio3_16 */
	{VIN1A_D13, (M14 | PIN_OUTPUT)},	/* vin1a_d13.gpio3_17 */
	{VIN1A_D14, (M14 | PIN_OUTPUT)},	/* vin1a_d14.gpio3_18 */
	{VIN1A_D15, (M14 | PIN_OUTPUT)},	/* vin1a_d15.gpio3_19 */
	{VIN1A_D17, (M14 | PIN_OUTPUT)},	/* vin1a_d17.gpio3_21 */
	{VIN1A_D18, (M14 | PIN_OUTPUT_PULLDOWN)},	/* vin1a_d18.gpio3_22 */
	{VIN1A_D19, (M14 | PIN_OUTPUT_PULLUP)},	/* vin1a_d19.gpio3_23 */
	{VIN1A_D22, (M14 | PIN_INPUT)},	/* vin1a_d22.gpio3_26 */
	{VIN2A_CLK0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_clk0.gpio3_28 */
	{VIN2A_DE0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_de0.gpio3_29 */
	{VIN2A_FLD0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_fld0.gpio3_30 */
	{VIN2A_HSYNC0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_hsync0.gpio3_31 */
	{VIN2A_VSYNC0, (M14 | PIN_INPUT)},	/* vin2a_vsync0.gpio4_0 */
	{VIN2A_D0, (M11 | PIN_INPUT)},	/* vin2a_d0.pr1_uart0_rxd */
	{VIN2A_D1, (M11 | PIN_OUTPUT)},	/* vin2a_d1.pr1_uart0_txd */
	{VIN2A_D2, (M10 | PIN_OUTPUT)},	/* vin2a_d2.eCAP1_in_PWM1_out */
	{VIN2A_D3, (M11 | PIN_INPUT_PULLDOWN)},	/* vin2a_d3.pr1_edc_latch0_in */
	{VIN2A_D4, (M11 | PIN_OUTPUT)},	/* vin2a_d4.pr1_edc_sync0_out */
	{VIN2A_D5, (M13 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d5.pr1_pru1_gpo2 */
	{VIN2A_D10, (M11 | PIN_OUTPUT_PULLDOWN)},	/* vin2a_d10.pr1_mdio_mdclk */
	{VIN2A_D11, (M11 | PIN_INPUT)},	/* vin2a_d11.pr1_mdio_data */
	{VIN2A_D12, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d12.rgmii1_txc */
	{VIN2A_D13, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d13.rgmii1_txctl */
	{VIN2A_D14, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d14.rgmii1_txd3 */
	{VIN2A_D15, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d15.rgmii1_txd2 */
	{VIN2A_D16, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d16.rgmii1_txd1 */
	{VIN2A_D17, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d17.rgmii1_txd0 */
	{VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d18.rgmii1_rxc */
	{VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d19.rgmii1_rxctl */
	{VIN2A_D20, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d20.rgmii1_rxd3 */
	{VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d21.rgmii1_rxd2 */
	{VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d22.rgmii1_rxd1 */
	{VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d23.rgmii1_rxd0 */
	{VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_clk.vout1_clk */
	{VOUT1_DE, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_de.vout1_de */
	{VOUT1_FLD, (M14 | PIN_OUTPUT)},	/* vout1_fld.gpio4_21 */
	{VOUT1_HSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_hsync.vout1_hsync */
	{VOUT1_VSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_vsync.vout1_vsync */
	{VOUT1_D0, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d0.vout1_d0 */
	{VOUT1_D1, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d1.vout1_d1 */
	{VOUT1_D2, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d2.vout1_d2 */
	{VOUT1_D3, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d3.vout1_d3 */
	{VOUT1_D4, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d4.vout1_d4 */
	{VOUT1_D5, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d5.vout1_d5 */
	{VOUT1_D6, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d6.vout1_d6 */
	{VOUT1_D7, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d7.vout1_d7 */
	{VOUT1_D8, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d8.vout1_d8 */
	{VOUT1_D9, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d9.vout1_d9 */
	{VOUT1_D10, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d10.vout1_d10 */
	{VOUT1_D11, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d11.vout1_d11 */
	{VOUT1_D12, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d12.vout1_d12 */
	{VOUT1_D13, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d13.vout1_d13 */
	{VOUT1_D14, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d14.vout1_d14 */
	{VOUT1_D15, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d15.vout1_d15 */
	{VOUT1_D16, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d16.vout1_d16 */
	{VOUT1_D17, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d17.vout1_d17 */
	{VOUT1_D18, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d18.vout1_d18 */
	{VOUT1_D19, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d19.vout1_d19 */
	{VOUT1_D20, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d20.vout1_d20 */
	{VOUT1_D21, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d21.vout1_d21 */
	{VOUT1_D22, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d22.vout1_d22 */
	{VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d23.vout1_d23 */
	{MDIO_MCLK, (M0 | PIN_INPUT_SLEW)},	/* mdio_mclk.mdio_mclk */
	{MDIO_D, (M0 | PIN_INPUT | SLEWCONTROL)},	/* mdio_d.mdio_d */
	{RGMII0_TXC, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
	{RGMII0_TXCTL, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
	{RGMII0_TXD3, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
	{RGMII0_TXD2, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
	{RGMII0_TXD1, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
	{RGMII0_TXD0, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
	{RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
	{RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
	{RGMII0_RXD3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
	{RGMII0_RXD2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
	{RGMII0_RXD1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
	{RGMII0_RXD0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
	{USB1_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* usb1_drvvbus.usb1_drvvbus */
	{USB2_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* usb2_drvvbus.usb2_drvvbus */
	{GPIO6_14, (M0 | PIN_OUTPUT)},	/* gpio6_14.gpio6_14 */
	{GPIO6_15, (M0 | PIN_OUTPUT)},	/* gpio6_15.gpio6_15 */
	{GPIO6_16, (M0 | PIN_INPUT_PULLUP)},	/* gpio6_16.gpio6_16 */
	{XREF_CLK0, (M11 | PIN_INPUT_PULLDOWN)},	/* xref_clk0.pr2_mii1_col */
	{XREF_CLK1, (M11 | PIN_INPUT_PULLDOWN)},	/* xref_clk1.pr2_mii1_crs */
	{XREF_CLK2, (M14 | PIN_OUTPUT)},	/* xref_clk2.gpio6_19 */
	{XREF_CLK3, (M9 | PIN_OUTPUT_PULLDOWN)},	/* xref_clk3.clkout3 */
	{MCASP1_ACLKX, (M11 | PIN_OUTPUT_PULLDOWN)},	/* mcasp1_aclkx.pr2_mdio_mdclk */
	{MCASP1_FSX, (M11 | PIN_INPUT | SLEWCONTROL)},	/* mcasp1_fsx.pr2_mdio_data */
	{MCASP1_ACLKR, (M14 | PIN_INPUT)},	/* mcasp1_aclkr.gpio5_0 */
	{MCASP1_FSR, (M14 | PIN_INPUT)},	/* mcasp1_fsr.gpio5_1 */
	{MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr0.pr2_mii0_rxer */
	{MCASP1_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr1.pr2_mii_mt0_clk */
	{MCASP1_AXR2, (M14 | PIN_INPUT)},	/* mcasp1_axr2.gpio5_4 */
	{MCASP1_AXR3, (M14 | PIN_INPUT)},	/* mcasp1_axr3.gpio5_5 */
	{MCASP1_AXR4, (M14 | PIN_OUTPUT)},	/* mcasp1_axr4.gpio5_6 */
	{MCASP1_AXR5, (M14 | PIN_OUTPUT)},	/* mcasp1_axr5.gpio5_7 */
	{MCASP1_AXR6, (M14 | PIN_OUTPUT)},	/* mcasp1_axr6.gpio5_8 */
	{MCASP1_AXR7, (M14 | PIN_OUTPUT)},	/* mcasp1_axr7.gpio5_9 */
	{MCASP1_AXR8, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr8.pr2_mii0_txen */
	{MCASP1_AXR9, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr9.pr2_mii0_txd3 */
	{MCASP1_AXR10, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr10.pr2_mii0_txd2 */
	{MCASP1_AXR11, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr11.pr2_mii0_txd1 */
	{MCASP1_AXR12, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr12.pr2_mii0_txd0 */
	{MCASP1_AXR13, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr13.pr2_mii_mr0_clk */
	{MCASP1_AXR14, (M11 | PIN_INPUT_SLEW)},	/* mcasp1_axr14.pr2_mii0_rxdv */
	{MCASP1_AXR15, (M11 | PIN_INPUT_SLEW)},	/* mcasp1_axr15.pr2_mii0_rxd3 */
	{MCASP2_ACLKX, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp2_aclkx.pr2_mii0_rxd2 */
	{MCASP2_FSX, (M11 | PIN_INPUT_SLEW)},	/* mcasp2_fsx.pr2_mii0_rxd1 */
	{MCASP2_AXR2, (M11 | PIN_INPUT_SLEW)},	/* mcasp2_axr2.pr2_mii0_rxd0 */
	{MCASP2_AXR3, (M11 | PIN_INPUT_SLEW)},	/* mcasp2_axr3.pr2_mii0_rxlink */
	{MCASP2_AXR4, (M14 | PIN_INPUT)},	/* mcasp2_axr4.gpio1_4 */
	{MCASP2_AXR5, (M14 | PIN_OUTPUT)},	/* mcasp2_axr5.gpio6_7 */
	{MCASP2_AXR6, (M14 | PIN_OUTPUT)},	/* mcasp2_axr6.gpio2_29 */
	{MCASP2_AXR7, (M14 | PIN_INPUT)},	/* mcasp2_axr7.gpio1_5 */
	{MCASP3_ACLKX, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp3_aclkx.pr2_mii0_crs */
	{MCASP3_FSX, (M11 | PIN_INPUT_SLEW)},	/* mcasp3_fsx.pr2_mii0_col */
	{MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp3_axr0.pr2_mii1_rxer */
	{MCASP3_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp3_axr1.pr2_mii1_rxlink */
	{MCASP4_ACLKX, (M2 | PIN_INPUT)},	/* mcasp4_aclkx.spi3_sclk */
	{MCASP4_FSX, (M2 | PIN_INPUT)},	/* mcasp4_fsx.spi3_d1 */
	{MCASP4_AXR1, (M2 | PIN_INPUT_PULLUP)},	/* mcasp4_axr1.spi3_cs0 */
	{MCASP5_ACLKX, (M13 | PIN_OUTPUT | MANUAL_MODE)},	/* mcasp5_aclkx.pr2_pru1_gpo1 */
	{MCASP5_FSX, (M12 | PIN_INPUT | MANUAL_MODE)},	/* mcasp5_fsx.pr2_pru1_gpi2 */
	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_cmd.mmc1_cmd */
	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat0.mmc1_dat0 */
	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat1.mmc1_dat1 */
	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat2.mmc1_dat2 */
	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat3.mmc1_dat3 */
	{MMC1_SDCD, (M14 | PIN_INPUT | SLEWCONTROL)},	/* mmc1_sdcd.gpio6_27 */
	{MMC1_SDWP, (M14 | PIN_INPUT | SLEWCONTROL)},	/* mmc1_sdwp.gpio6_28 */
	{GPIO6_10, (M11 | PIN_INPUT_PULLUP)},	/* gpio6_10.pr2_mii_mt1_clk */
	{GPIO6_11, (M11 | PIN_OUTPUT_PULLUP)},	/* gpio6_11.pr2_mii1_txen */
	{MMC3_CLK, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_clk.pr2_mii1_txd3 */
	{MMC3_CMD, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_cmd.pr2_mii1_txd2 */
	{MMC3_DAT0, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_dat0.pr2_mii1_txd1 */
	{MMC3_DAT1, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_dat1.pr2_mii1_txd0 */
	{MMC3_DAT2, (M11 | PIN_INPUT_PULLUP)},	/* mmc3_dat2.pr2_mii_mr1_clk */
	{MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat3.pr2_mii1_rxdv */
	{MMC3_DAT4, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat4.pr2_mii1_rxd3 */
	{MMC3_DAT5, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat5.pr2_mii1_rxd2 */
	{MMC3_DAT6, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat6.pr2_mii1_rxd1 */
	{MMC3_DAT7, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat7.pr2_mii1_rxd0 */
	{SPI1_SCLK, (M14 | PIN_OUTPUT)},	/* spi1_sclk.gpio7_7 */
	{SPI1_D1, (M14 | PIN_OUTPUT)},	/* spi1_d1.gpio7_8 */
	{SPI1_D0, (M14 | PIN_OUTPUT)},	/* spi1_d0.gpio7_9 */
	{SPI1_CS0, (M14 | PIN_OUTPUT)},	/* spi1_cs0.gpio7_10 */
	{SPI1_CS1, (M14 | PIN_OUTPUT)},	/* spi1_cs1.gpio7_11 */
	{SPI1_CS2, (M14 | PIN_INPUT_SLEW)},	/* spi1_cs2.gpio7_12 */
	{SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)},	/* spi1_cs3.hdmi1_cec */
	{SPI2_SCLK, (M0 | PIN_INPUT)},	/* spi2_sclk.spi2_sclk */
	{SPI2_D1, (M0 | PIN_INPUT | SLEWCONTROL)},	/* spi2_d1.spi2_d1 */
	{SPI2_D0, (M0 | PIN_INPUT | SLEWCONTROL)},	/* spi2_d0.spi2_d0 */
	{SPI2_CS0, (M0 | PIN_INPUT | SLEWCONTROL)},	/* spi2_cs0.spi2_cs0 */
	{DCAN1_TX, (M15 | PULL_UP)},	/* dcan1_tx.safe for dcan1_tx */
	{DCAN1_RX, (M15 | PULL_UP)},	/* dcan1_rx.safe for dcan1_rx */
	{UART1_RXD, (M14 | PIN_OUTPUT | SLEWCONTROL)},	/* uart1_rxd.gpio7_22 */
	{UART1_TXD, (M14 | PIN_OUTPUT | SLEWCONTROL)},	/* uart1_txd.gpio7_23 */
	{UART2_RXD, (M4 | PIN_INPUT)},	/* uart2_rxd.uart2_rxd */
	{UART2_TXD, (M0 | PIN_OUTPUT)},	/* uart2_txd.uart2_txd */
	{UART2_CTSN, (M2 | PIN_INPUT)},	/* uart2_ctsn.uart3_rxd */
	{UART2_RTSN, (M1 | PIN_OUTPUT)},	/* uart2_rtsn.uart3_txd */
	{I2C1_SDA, (M0 | PIN_INPUT)},	/* i2c1_sda.i2c1_sda */
	{I2C1_SCL, (M0 | PIN_INPUT)},	/* i2c1_scl.i2c1_scl */
	{I2C2_SDA, (M1 | PIN_INPUT)},	/* i2c2_sda.hdmi1_ddc_scl */
	{I2C2_SCL, (M1 | PIN_INPUT)},	/* i2c2_scl.hdmi1_ddc_sda */
	{WAKEUP0, (M0 | PIN_INPUT)},	/* Wakeup0.Wakeup0 */
	{WAKEUP1, (M0 | PIN_INPUT)},	/* Wakeup1.Wakeup1 */
	{WAKEUP2, (M0 | PIN_INPUT)},	/* Wakeup2.Wakeup2 */
	{WAKEUP3, (M0 | PIN_INPUT)},	/* Wakeup3.Wakeup3 */
	{ON_OFF, (M0 | PIN_OUTPUT)},	/* on_off.on_off */
	{RTC_PORZ, (M0 | PIN_INPUT)},	/* rtc_porz.rtc_porz */
	{TMS, (M0 | PIN_INPUT_PULLUP)},	/* tms.tms */
	{TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* tdi.tdi */
	{TDO, (M0 | PIN_OUTPUT_PULLUP)},	/* tdo.tdo */
	{TCLK, (M0 | PIN_INPUT_PULLUP)},	/* tclk.tclk */
	{TRSTN, (M0 | PIN_INPUT_PULLDOWN)},	/* trstn.trstn */
	{RTCK, (M0 | PIN_OUTPUT_PULLUP)},	/* rtck.rtck */
	{EMU0, (M0 | PIN_INPUT_PULLUP)},	/* emu0.emu0 */
	{EMU1, (M0 | PIN_INPUT_PULLUP)},	/* emu1.emu1 */
	{RESETN, (M0 | PIN_INPUT)},	/* resetn.resetn */
	{NMIN_DSP, (M0 | PIN_INPUT)},	/* nmin_dsp.nmin_dsp */
	{RSTOUTN, (M0 | PIN_OUTPUT)},	/* rstoutn.rstoutn */
};

const struct pad_conf_entry core_padconf_array_essential_am572x_idk[] = {
	{GPMC_A0, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a0.vin4b_d0 */
	{GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a1.vin4b_d1 */
	{GPMC_A2, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a2.vin4b_d2 */
	{GPMC_A3, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a3.vin4b_d3 */
	{GPMC_A4, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a4.vin4b_d4 */
	{GPMC_A5, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a5.vin4b_d5 */
	{GPMC_A6, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a6.vin4b_d6 */
	{GPMC_A7, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a7.vin4b_d7 */
	{GPMC_A8, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a8.vin4b_hsync1 */
	{GPMC_A9, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a9.vin4b_vsync1 */
	{GPMC_A10, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a10.vin4b_clk1 */
	{GPMC_A11, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a11.vin4b_de1 */
	{GPMC_A12, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a12.vin4b_fld1 */
	{GPMC_A13, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a13.qspi1_rtclk */
	{GPMC_A14, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a14.qspi1_d3 */
	{GPMC_A15, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a15.qspi1_d2 */
	{GPMC_A16, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a16.qspi1_d0 */
	{GPMC_A17, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a17.qspi1_d1 */
	{GPMC_A18, (M1 | PIN_OUTPUT | MANUAL_MODE)},	/* gpmc_a18.qspi1_sclk */
	{GPMC_A19, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a19.mmc2_dat4 */
	{GPMC_A20, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a20.mmc2_dat5 */
	{GPMC_A21, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a21.mmc2_dat6 */
	{GPMC_A22, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a22.mmc2_dat7 */
	{GPMC_A23, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a23.mmc2_clk */
	{GPMC_A24, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a24.mmc2_dat0 */
	{GPMC_A25, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a25.mmc2_dat1 */
	{GPMC_A26, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a26.mmc2_dat2 */
	{GPMC_A27, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a27.mmc2_dat3 */
	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_cs1.mmc2_cmd */
	{GPMC_CS2, (M1 | PIN_OUTPUT | MANUAL_MODE)},	/* gpmc_cs2.qspi1_cs0 */
	{VIN1A_D5, (M14 | PIN_OUTPUT)},	/* vin1a_d5.gpio3_9 */
	{VIN1A_D6, (M14 | PIN_OUTPUT)},	/* vin1a_d6.gpio3_10 */
	{VIN1A_D7, (M14 | PIN_OUTPUT)},	/* vin1a_d7.gpio3_11 */
	{VIN1A_D8, (M14 | PIN_OUTPUT)},	/* vin1a_d8.gpio3_12 */
	{VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d10.gpio3_14 */
	{VIN1A_D12, (M14 | PIN_INPUT)},	/* vin1a_d12.gpio3_16 */
	{VIN1A_D13, (M14 | PIN_OUTPUT)},	/* vin1a_d13.gpio3_17 */
	{VIN1A_D14, (M14 | PIN_OUTPUT)},	/* vin1a_d14.gpio3_18 */
	{VIN1A_D15, (M14 | PIN_OUTPUT)},	/* vin1a_d15.gpio3_19 */
	{VIN1A_D17, (M14 | PIN_OUTPUT)},	/* vin1a_d17.gpio3_21 */
	{VIN1A_D18, (M14 | PIN_OUTPUT_PULLDOWN)},	/* vin1a_d18.gpio3_22 */
	{VIN1A_D19, (M14 | PIN_OUTPUT_PULLUP)},	/* vin1a_d19.gpio3_23 */
	{VIN1A_D22, (M14 | PIN_INPUT)},	/* vin1a_d22.gpio3_26 */
	{VIN2A_CLK0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_clk0.gpio3_28 */
	{VIN2A_DE0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_de0.gpio3_29 */
	{VIN2A_FLD0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_fld0.gpio3_30 */
	{VIN2A_HSYNC0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_hsync0.gpio3_31 */
	{VIN2A_VSYNC0, (M14 | PIN_INPUT)},	/* vin2a_vsync0.gpio4_0 */
	{VIN2A_D0, (M11 | PIN_INPUT)},	/* vin2a_d0.pr1_uart0_rxd */
	{VIN2A_D1, (M11 | PIN_OUTPUT)},	/* vin2a_d1.pr1_uart0_txd */
	{VIN2A_D2, (M10 | PIN_OUTPUT)},	/* vin2a_d2.eCAP1_in_PWM1_out */
	{VIN2A_D3, (M11 | PIN_INPUT_PULLDOWN)},	/* vin2a_d3.pr1_edc_latch0_in */
	{VIN2A_D4, (M11 | PIN_OUTPUT)},	/* vin2a_d4.pr1_edc_sync0_out */
	{VIN2A_D5, (M13 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d5.pr1_pru1_gpo2 */
	{VIN2A_D10, (M11 | PIN_OUTPUT_PULLDOWN)},	/* vin2a_d10.pr1_mdio_mdclk */
	{VIN2A_D11, (M11 | PIN_INPUT)},	/* vin2a_d11.pr1_mdio_data */
	{VIN2A_D12, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d12.rgmii1_txc */
	{VIN2A_D13, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d13.rgmii1_txctl */
	{VIN2A_D14, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d14.rgmii1_txd3 */
	{VIN2A_D15, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d15.rgmii1_txd2 */
	{VIN2A_D16, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d16.rgmii1_txd1 */
	{VIN2A_D17, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d17.rgmii1_txd0 */
	{VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d18.rgmii1_rxc */
	{VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d19.rgmii1_rxctl */
	{VIN2A_D20, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d20.rgmii1_rxd3 */
	{VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d21.rgmii1_rxd2 */
	{VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d22.rgmii1_rxd1 */
	{VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d23.rgmii1_rxd0 */
	{VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_clk.vout1_clk */
	{VOUT1_DE, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_de.vout1_de */
	{VOUT1_FLD, (M14 | PIN_OUTPUT)},	/* vout1_fld.gpio4_21 */
	{VOUT1_HSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_hsync.vout1_hsync */
	{VOUT1_VSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_vsync.vout1_vsync */
	{VOUT1_D0, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d0.vout1_d0 */
	{VOUT1_D1, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d1.vout1_d1 */
	{VOUT1_D2, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d2.vout1_d2 */
	{VOUT1_D3, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d3.vout1_d3 */
	{VOUT1_D4, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d4.vout1_d4 */
	{VOUT1_D5, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d5.vout1_d5 */
	{VOUT1_D6, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d6.vout1_d6 */
	{VOUT1_D7, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d7.vout1_d7 */
	{VOUT1_D8, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d8.vout1_d8 */
	{VOUT1_D9, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d9.vout1_d9 */
	{VOUT1_D10, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d10.vout1_d10 */
	{VOUT1_D11, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d11.vout1_d11 */
	{VOUT1_D12, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d12.vout1_d12 */
	{VOUT1_D13, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d13.vout1_d13 */
	{VOUT1_D14, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d14.vout1_d14 */
	{VOUT1_D15, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d15.vout1_d15 */
	{VOUT1_D16, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d16.vout1_d16 */
	{VOUT1_D17, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d17.vout1_d17 */
	{VOUT1_D18, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d18.vout1_d18 */
	{VOUT1_D19, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d19.vout1_d19 */
	{VOUT1_D20, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d20.vout1_d20 */
	{VOUT1_D21, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d21.vout1_d21 */
	{VOUT1_D22, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d22.vout1_d22 */
	{VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)},	/* vout1_d23.vout1_d23 */
	{MDIO_MCLK, (M0 | PIN_INPUT_SLEW)},	/* mdio_mclk.mdio_mclk */
	{MDIO_D, (M0 | PIN_INPUT | SLEWCONTROL)},	/* mdio_d.mdio_d */
	{RGMII0_TXC, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
	{RGMII0_TXCTL, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
	{RGMII0_TXD3, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
	{RGMII0_TXD2, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
	{RGMII0_TXD1, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
	{RGMII0_TXD0, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
	{RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
	{RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
	{RGMII0_RXD3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
	{RGMII0_RXD2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
	{RGMII0_RXD1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
	{RGMII0_RXD0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
	{USB1_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* usb1_drvvbus.usb1_drvvbus */
	{USB2_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* usb2_drvvbus.usb2_drvvbus */
	{GPIO6_14, (M0 | PIN_OUTPUT)},	/* gpio6_14.gpio6_14 */
	{GPIO6_15, (M0 | PIN_OUTPUT)},	/* gpio6_15.gpio6_15 */
	{GPIO6_16, (M0 | PIN_INPUT_PULLUP)},	/* gpio6_16.gpio6_16 */
	{XREF_CLK0, (M11 | PIN_INPUT_PULLDOWN)},	/* xref_clk0.pr2_mii1_col */
	{XREF_CLK1, (M11 | PIN_INPUT_PULLDOWN)},	/* xref_clk1.pr2_mii1_crs */
	{XREF_CLK2, (M14 | PIN_OUTPUT)},	/* xref_clk2.gpio6_19 */
	{XREF_CLK3, (M9 | PIN_OUTPUT_PULLDOWN)},	/* xref_clk3.clkout3 */
	{MCASP1_ACLKX, (M11 | PIN_OUTPUT_PULLDOWN)},	/* mcasp1_aclkx.pr2_mdio_mdclk */
	{MCASP1_FSX, (M11 | PIN_INPUT | SLEWCONTROL)},	/* mcasp1_fsx.pr2_mdio_data */
	{MCASP1_ACLKR, (M14 | PIN_INPUT)},	/* mcasp1_aclkr.gpio5_0 */
	{MCASP1_FSR, (M14 | PIN_INPUT)},	/* mcasp1_fsr.gpio5_1 */
	{MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr0.pr2_mii0_rxer */
	{MCASP1_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr1.pr2_mii_mt0_clk */
	{MCASP1_AXR2, (M14 | PIN_INPUT)},	/* mcasp1_axr2.gpio5_4 */
	{MCASP1_AXR3, (M14 | PIN_INPUT)},	/* mcasp1_axr3.gpio5_5 */
	{MCASP1_AXR4, (M14 | PIN_OUTPUT)},	/* mcasp1_axr4.gpio5_6 */
	{MCASP1_AXR5, (M14 | PIN_OUTPUT)},	/* mcasp1_axr5.gpio5_7 */
	{MCASP1_AXR6, (M14 | PIN_OUTPUT)},	/* mcasp1_axr6.gpio5_8 */
	{MCASP1_AXR7, (M14 | PIN_OUTPUT)},	/* mcasp1_axr7.gpio5_9 */
	{MCASP1_AXR8, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr8.pr2_mii0_txen */
	{MCASP1_AXR9, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr9.pr2_mii0_txd3 */
	{MCASP1_AXR10, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr10.pr2_mii0_txd2 */
	{MCASP1_AXR11, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr11.pr2_mii0_txd1 */
	{MCASP1_AXR12, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr12.pr2_mii0_txd0 */
	{MCASP1_AXR13, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr13.pr2_mii_mr0_clk */
	{MCASP1_AXR14, (M11 | PIN_INPUT_SLEW)},	/* mcasp1_axr14.pr2_mii0_rxdv */
	{MCASP1_AXR15, (M11 | PIN_INPUT_SLEW)},	/* mcasp1_axr15.pr2_mii0_rxd3 */
	{MCASP2_ACLKX, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp2_aclkx.pr2_mii0_rxd2 */
	{MCASP2_FSX, (M11 | PIN_INPUT_SLEW)},	/* mcasp2_fsx.pr2_mii0_rxd1 */
	{MCASP2_AXR2, (M11 | PIN_INPUT_SLEW)},	/* mcasp2_axr2.pr2_mii0_rxd0 */
	{MCASP2_AXR3, (M11 | PIN_INPUT_SLEW)},	/* mcasp2_axr3.pr2_mii0_rxlink */
	{MCASP2_AXR4, (M14 | PIN_OUTPUT)},	/* mcasp2_axr4.gpio1_4 */
	{MCASP2_AXR5, (M14 | PIN_OUTPUT)},	/* mcasp2_axr5.gpio6_7 */
	{MCASP2_AXR6, (M14 | PIN_OUTPUT)},	/* mcasp2_axr6.gpio2_29 */
	{MCASP2_AXR7, (M14 | PIN_OUTPUT)},	/* mcasp2_axr7.gpio1_5 */
	{MCASP3_ACLKX, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp3_aclkx.pr2_mii0_crs */
	{MCASP3_FSX, (M11 | PIN_INPUT_SLEW)},	/* mcasp3_fsx.pr2_mii0_col */
	{MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp3_axr0.pr2_mii1_rxer */
	{MCASP3_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp3_axr1.pr2_mii1_rxlink */
	{MCASP4_ACLKX, (M2 | PIN_INPUT)},	/* mcasp4_aclkx.spi3_sclk */
	{MCASP4_FSX, (M2 | PIN_INPUT)},	/* mcasp4_fsx.spi3_d1 */
	{MCASP4_AXR1, (M2 | PIN_INPUT_PULLUP)},	/* mcasp4_axr1.spi3_cs0 */
	{MCASP5_ACLKX, (M13 | PIN_OUTPUT | MANUAL_MODE)},	/* mcasp5_aclkx.pr2_pru1_gpo1 */
	{MCASP5_FSX, (M12 | PIN_INPUT | MANUAL_MODE)},	/* mcasp5_fsx.pr2_pru1_gpi2 */
	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_cmd.mmc1_cmd */
	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat0.mmc1_dat0 */
	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat1.mmc1_dat1 */
	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat2.mmc1_dat2 */
	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat3.mmc1_dat3 */
	{MMC1_SDCD, (M14 | PIN_INPUT | SLEWCONTROL)},	/* mmc1_sdcd.gpio6_27 */
	{MMC1_SDWP, (M14 | PIN_INPUT | SLEWCONTROL)},	/* mmc1_sdwp.gpio6_28 */
	{GPIO6_10, (M11 | PIN_INPUT_PULLUP)},	/* gpio6_10.pr2_mii_mt1_clk */
	{GPIO6_11, (M11 | PIN_OUTPUT_PULLUP)},	/* gpio6_11.pr2_mii1_txen */
	{MMC3_CLK, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_clk.pr2_mii1_txd3 */
	{MMC3_CMD, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_cmd.pr2_mii1_txd2 */
	{MMC3_DAT0, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_dat0.pr2_mii1_txd1 */
	{MMC3_DAT1, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_dat1.pr2_mii1_txd0 */
	{MMC3_DAT2, (M11 | PIN_INPUT_PULLUP)},	/* mmc3_dat2.pr2_mii_mr1_clk */
	{MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat3.pr2_mii1_rxdv */
	{MMC3_DAT4, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat4.pr2_mii1_rxd3 */
	{MMC3_DAT5, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat5.pr2_mii1_rxd2 */
	{MMC3_DAT6, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat6.pr2_mii1_rxd1 */
	{MMC3_DAT7, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat7.pr2_mii1_rxd0 */
	{SPI1_SCLK, (M14 | PIN_OUTPUT)},	/* spi1_sclk.gpio7_7 */
	{SPI1_D1, (M14 | PIN_OUTPUT)},	/* spi1_d1.gpio7_8 */
	{SPI1_D0, (M14 | PIN_OUTPUT)},	/* spi1_d0.gpio7_9 */
	{SPI1_CS0, (M14 | PIN_OUTPUT)},	/* spi1_cs0.gpio7_10 */
	{SPI1_CS1, (M14 | PIN_OUTPUT)},	/* spi1_cs1.gpio7_11 */
	{SPI1_CS2, (M14 | PIN_INPUT_SLEW)},	/* spi1_cs2.gpio7_12 */
	{SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)},	/* spi1_cs3.hdmi1_cec */
	{SPI2_SCLK, (M0 | PIN_INPUT)},	/* spi2_sclk.spi2_sclk */
	{SPI2_D1, (M0 | PIN_INPUT | SLEWCONTROL)},	/* spi2_d1.spi2_d1 */
	{SPI2_D0, (M0 | PIN_INPUT | SLEWCONTROL)},	/* spi2_d0.spi2_d0 */
	{SPI2_CS0, (M0 | PIN_INPUT | SLEWCONTROL)},	/* spi2_cs0.spi2_cs0 */
	{DCAN1_TX, (M15 | PULL_UP)},	/* dcan1_tx.safe for dcan1_tx */
	{DCAN1_RX, (M15 | PULL_UP)},	/* dcan1_rx.safe for dcan1_rx */
	{UART1_RXD, (M14 | PIN_OUTPUT | SLEWCONTROL)},	/* uart1_rxd.gpio7_22 */
	{UART1_TXD, (M14 | PIN_OUTPUT | SLEWCONTROL)},	/* uart1_txd.gpio7_23 */
	{UART2_RXD, (M4 | PIN_INPUT)},	/* uart2_rxd.uart2_rxd */
	{UART2_TXD, (M0 | PIN_OUTPUT)},	/* uart2_txd.uart2_txd */
	{UART2_CTSN, (M2 | PIN_INPUT)},	/* uart2_ctsn.uart3_rxd */
	{UART2_RTSN, (M1 | PIN_OUTPUT)},	/* uart2_rtsn.uart3_txd */
	{I2C1_SDA, (M0 | PIN_INPUT)},	/* i2c1_sda.i2c1_sda */
	{I2C1_SCL, (M0 | PIN_INPUT)},	/* i2c1_scl.i2c1_scl */
	{I2C2_SDA, (M1 | PIN_INPUT)},	/* i2c2_sda.hdmi1_ddc_scl */
	{I2C2_SCL, (M1 | PIN_INPUT)},	/* i2c2_scl.hdmi1_ddc_sda */
	{WAKEUP0, (M0 | PIN_INPUT)},	/* Wakeup0.Wakeup0 */
	{WAKEUP1, (M0 | PIN_INPUT)},	/* Wakeup1.Wakeup1 */
	{WAKEUP2, (M0 | PIN_INPUT)},	/* Wakeup2.Wakeup2 */
	{WAKEUP3, (M0 | PIN_INPUT)},	/* Wakeup3.Wakeup3 */
	{ON_OFF, (M0 | PIN_OUTPUT)},	/* on_off.on_off */
	{RTC_PORZ, (M0 | PIN_INPUT)},	/* rtc_porz.rtc_porz */
	{TMS, (M0 | PIN_INPUT_PULLUP)},	/* tms.tms */
	{TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* tdi.tdi */
	{TDO, (M0 | PIN_OUTPUT_PULLUP)},	/* tdo.tdo */
	{TCLK, (M0 | PIN_INPUT_PULLUP)},	/* tclk.tclk */
	{TRSTN, (M0 | PIN_INPUT_PULLDOWN)},	/* trstn.trstn */
	{RTCK, (M0 | PIN_OUTPUT_PULLUP)},	/* rtck.rtck */
	{EMU0, (M0 | PIN_INPUT_PULLUP)},	/* emu0.emu0 */
	{EMU1, (M0 | PIN_INPUT_PULLUP)},	/* emu1.emu1 */
	{RESETN, (M0 | PIN_INPUT)},	/* resetn.resetn */
	{NMIN_DSP, (M0 | PIN_INPUT)},	/* nmin_dsp.nmin_dsp */
	{RSTOUTN, (M0 | PIN_OUTPUT)},	/* rstoutn.rstoutn */
};

const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = {
	{GPMC_A0, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a0.vin1b_d0 */
	{GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a1.vin1b_d1 */
	{GPMC_A2, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a2.vin1b_d2 */
	{GPMC_A3, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a3.vin1b_d3 */
	{GPMC_A4, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a4.vin1b_d4 */
	{GPMC_A5, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a5.vin1b_d5 */
	{GPMC_A6, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a6.vin1b_d6 */
	{GPMC_A7, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a7.vin1b_d7 */
	{GPMC_A8, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a8.vin1b_hsync1 */
	{GPMC_A9, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a9.vin1b_vsync1 */
	{GPMC_A10, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a10.vin1b_clk1 */
	{GPMC_A11, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a11.vin1b_de1 */
	{GPMC_A12, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a12.vin1b_fld1 */
	{GPMC_A13, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a13.qspi1_rtclk */
	{GPMC_A14, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a14.qspi1_d3 */
	{GPMC_A15, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a15.qspi1_d2 */
	{GPMC_A16, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a16.qspi1_d0 */
	{GPMC_A17, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a17.qspi1_d1 */
	{GPMC_A18, (M1 | PIN_OUTPUT | MANUAL_MODE)},	/* gpmc_a18.qspi1_sclk */
	{GPMC_A19, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a19.mmc2_dat4 */
	{GPMC_A20, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a20.mmc2_dat5 */
	{GPMC_A21, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a21.mmc2_dat6 */
	{GPMC_A22, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a22.mmc2_dat7 */
	{GPMC_A23, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a23.mmc2_clk */
	{GPMC_A24, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a24.mmc2_dat0 */
	{GPMC_A25, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a25.mmc2_dat1 */
	{GPMC_A26, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a26.mmc2_dat2 */
	{GPMC_A27, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a27.mmc2_dat3 */
	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_cs1.mmc2_cmd */
	{GPMC_CS0, (M14 | PIN_OUTPUT)},	/* gpmc_cs0.gpio2_19 */
	{GPMC_CS2, (M1 | PIN_OUTPUT | MANUAL_MODE)},	/* gpmc_cs2.qspi1_cs0 */
	{GPMC_CS3, (M14 | PIN_OUTPUT)},	/* gpmc_cs3.gpio2_21 */
	{GPMC_CLK, (M14 | PIN_INPUT)},	/* gpmc_clk.gpio2_22 */
	{GPMC_ADVN_ALE, (M14 | PIN_OUTPUT)},	/* gpmc_advn_ale.gpio2_23 */
	{GPMC_OEN_REN, (M14 | PIN_OUTPUT)},	/* gpmc_oen_ren.gpio2_24 */
	{GPMC_WEN, (M14 | PIN_OUTPUT)},	/* gpmc_wen.gpio2_25 */
	{GPMC_BEN0, (M14 | PIN_OUTPUT)},	/* gpmc_ben0.gpio2_26 */
	{GPMC_BEN1, (M14 | PIN_OUTPUT)},	/* gpmc_ben1.gpio2_27 */
	{GPMC_WAIT0, (M14 | PIN_OUTPUT | SLEWCONTROL)},	/* gpmc_wait0.gpio2_28 */
	{VIN2A_CLK0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_clk0.gpio3_28 */
	{VIN2A_DE0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_de0.gpio3_29 */
	{VIN2A_FLD0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_fld0.gpio3_30 */
	{VIN2A_HSYNC0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_hsync0.gpio3_31 */
	{VIN2A_VSYNC0, (M14 | PIN_OUTPUT)},	/* vin2a_vsync0.gpio4_0 */
	{VIN2A_D0, (M11 | PIN_INPUT)},	/* vin2a_d0.pr1_uart0_rxd */
	{VIN2A_D1, (M11 | PIN_OUTPUT)},	/* vin2a_d1.pr1_uart0_txd */
	{VIN2A_D2, (M10 | PIN_OUTPUT)},	/* vin2a_d2.eCAP1_in_PWM1_out */
	{VIN2A_D10, (M11 | PIN_OUTPUT_PULLDOWN)},	/* vin2a_d10.pr1_mdio_mdclk */
	{VIN2A_D11, (M11 | PIN_INPUT)},	/* vin2a_d11.pr1_mdio_data */
	{VIN2A_D12, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d12.rgmii1_txc */
	{VIN2A_D13, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d13.rgmii1_txctl */
	{VIN2A_D14, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d14.rgmii1_txd3 */
	{VIN2A_D15, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d15.rgmii1_txd2 */
	{VIN2A_D16, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d16.rgmii1_txd1 */
	{VIN2A_D17, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d17.rgmii1_txd0 */
	{VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d18.rgmii1_rxc */
	{VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d19.rgmii1_rxctl */
	{VIN2A_D20, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d20.rgmii1_rxd3 */
	{VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d21.rgmii1_rxd2 */
	{VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d22.rgmii1_rxd1 */
	{VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d23.rgmii1_rxd0 */
	{VOUT1_FLD, (M14 | PIN_OUTPUT)},	/* vout1_fld.gpio4_21 */
	{MDIO_MCLK, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)},	/* mdio_mclk.mdio_mclk */
	{MDIO_D, (M0 | PIN_INPUT | SLEWCONTROL)},	/* mdio_d.mdio_d */
	{UART3_RXD, (M14 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* uart3_rxd.gpio5_18 */
	{UART3_TXD, (M14 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)},	/* uart3_txd.gpio5_19 */
	{RGMII0_TXC, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
	{RGMII0_TXCTL, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
	{RGMII0_TXD3, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
	{RGMII0_TXD2, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
	{RGMII0_TXD1, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
	{RGMII0_TXD0, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
	{RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
	{RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
	{RGMII0_RXD3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
	{RGMII0_RXD2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
	{RGMII0_RXD1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
	{RGMII0_RXD0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
	{USB1_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* usb1_drvvbus.usb1_drvvbus */
	{USB2_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* usb2_drvvbus.usb2_drvvbus */
	{GPIO6_14, (M0 | PIN_OUTPUT)},	/* gpio6_14.gpio6_14 */
	{GPIO6_15, (M0 | PIN_OUTPUT)},	/* gpio6_15.gpio6_15 */
	{GPIO6_16, (M0 | PIN_INPUT_PULLUP)},	/* gpio6_16.gpio6_16 */
	{XREF_CLK0, (M11 | PIN_INPUT_PULLDOWN)},	/* xref_clk0.pr2_mii1_col */
	{XREF_CLK1, (M11 | PIN_INPUT_PULLDOWN)},	/* xref_clk1.pr2_mii1_crs */
	{XREF_CLK2, (M14 | PIN_OUTPUT)},	/* xref_clk2.gpio6_19 */
	{XREF_CLK3, (M7 | PIN_INPUT)},	/* xref_clk3.hdq0 */
	{MCASP1_ACLKX, (M11 | PIN_OUTPUT_PULLDOWN)},	/* mcasp1_aclkx.pr2_mdio_mdclk */
	{MCASP1_FSX, (M11 | PIN_INPUT | SLEWCONTROL)},	/* mcasp1_fsx.pr2_mdio_data */
	{MCASP1_ACLKR, (M14 | PIN_INPUT)},	/* mcasp1_aclkr.gpio5_0 */
	{MCASP1_FSR, (M14 | PIN_INPUT)},	/* mcasp1_fsr.gpio5_1 */
	{MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr0.pr2_mii0_rxer */
	{MCASP1_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr1.pr2_mii_mt0_clk */
	{MCASP1_AXR2, (M14 | PIN_INPUT)},	/* mcasp1_axr2.gpio5_4 */
	{MCASP1_AXR3, (M14 | PIN_INPUT)},	/* mcasp1_axr3.gpio5_5 */
	{MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr4.gpio5_6 */
	{MCASP1_AXR5, (M14 | PIN_INPUT)},	/* mcasp1_axr5.gpio5_7 */
	{MCASP1_AXR6, (M14 | PIN_OUTPUT)},	/* mcasp1_axr6.gpio5_8 */
	{MCASP1_AXR7, (M14 | PIN_OUTPUT)},	/* mcasp1_axr7.gpio5_9 */
	{MCASP1_AXR8, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr8.pr2_mii0_txen */
	{MCASP1_AXR9, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr9.pr2_mii0_txd3 */
	{MCASP1_AXR10, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr10.pr2_mii0_txd2 */
	{MCASP1_AXR11, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr11.pr2_mii0_txd1 */
	{MCASP1_AXR12, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr12.pr2_mii0_txd0 */
	{MCASP1_AXR13, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp1_axr13.pr2_mii_mr0_clk */
	{MCASP1_AXR14, (M11 | PIN_INPUT_SLEW)},	/* mcasp1_axr14.pr2_mii0_rxdv */
	{MCASP1_AXR15, (M11 | PIN_INPUT_SLEW)},	/* mcasp1_axr15.pr2_mii0_rxd3 */
	{MCASP2_ACLKX, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp2_aclkx.pr2_mii0_rxd2 */
	{MCASP2_FSX, (M11 | PIN_INPUT_SLEW)},	/* mcasp2_fsx.pr2_mii0_rxd1 */
	{MCASP2_AXR2, (M11 | PIN_INPUT_SLEW)},	/* mcasp2_axr2.pr2_mii0_rxd0 */
	{MCASP2_AXR3, (M11 | PIN_INPUT_SLEW)},	/* mcasp2_axr3.pr2_mii0_rxlink */
	{MCASP2_AXR4, (M14 | PIN_OUTPUT)},	/* mcasp2_axr4.gpio1_4 */
	{MCASP2_AXR5, (M14 | PIN_OUTPUT)},	/* mcasp2_axr5.gpio6_7 */
	{MCASP2_AXR6, (M14 | PIN_OUTPUT)},	/* mcasp2_axr6.gpio2_29 */
	{MCASP2_AXR7, (M14 | PIN_OUTPUT)},	/* mcasp2_axr7.gpio1_5 */
	{MCASP3_ACLKX, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp3_aclkx.pr2_mii0_crs */
	{MCASP3_FSX, (M11 | PIN_INPUT_SLEW)},	/* mcasp3_fsx.pr2_mii0_col */
	{MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp3_axr0.pr2_mii1_rxer */
	{MCASP3_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mcasp3_axr1.pr2_mii1_rxlink */
	{MCASP4_ACLKX, (M2 | PIN_OUTPUT)},	/* mcasp4_aclkx.spi3_sclk */
	{MCASP4_FSX, (M2 | PIN_INPUT)},	/* mcasp4_fsx.spi3_d1 */
	{MCASP4_AXR1, (M2 | PIN_OUTPUT_PULLUP)},	/* mcasp4_axr1.spi3_cs0 */
	{MCASP5_AXR0, (M4 | PIN_INPUT)},	/* mcasp5_axr0.uart3_rxd */
	{MCASP5_AXR1, (M4 | PIN_OUTPUT)},	/* mcasp5_axr1.uart3_txd */
	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_cmd.mmc1_cmd */
	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat0.mmc1_dat0 */
	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat1.mmc1_dat1 */
	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat2.mmc1_dat2 */
	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat3.mmc1_dat3 */
	{MMC1_SDCD, (M14 | PIN_INPUT | SLEWCONTROL)},	/* mmc1_sdcd.gpio6_27 */
	{MMC1_SDWP, (M14 | PIN_INPUT | SLEWCONTROL)},	/* mmc1_sdwp.gpio6_28 */
	{GPIO6_10, (M11 | PIN_INPUT_PULLUP)},	/* gpio6_10.pr2_mii_mt1_clk */
	{GPIO6_11, (M11 | PIN_OUTPUT_PULLUP)},	/* gpio6_11.pr2_mii1_txen */
	{MMC3_CLK, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_clk.pr2_mii1_txd3 */
	{MMC3_CMD, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_cmd.pr2_mii1_txd2 */
	{MMC3_DAT0, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_dat0.pr2_mii1_txd1 */
	{MMC3_DAT1, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_dat1.pr2_mii1_txd0 */
	{MMC3_DAT2, (M11 | PIN_INPUT_PULLUP)},	/* mmc3_dat2.pr2_mii_mr1_clk */
	{MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat3.pr2_mii1_rxdv */
	{MMC3_DAT4, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat4.pr2_mii1_rxd3 */
	{MMC3_DAT5, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat5.pr2_mii1_rxd2 */
	{MMC3_DAT6, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat6.pr2_mii1_rxd1 */
	{MMC3_DAT7, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat7.pr2_mii1_rxd0 */
	{SPI1_SCLK, (M14 | PIN_OUTPUT)},	/* spi1_sclk.gpio7_7 */
	{SPI1_D1, (M14 | PIN_OUTPUT)},	/* spi1_d1.gpio7_8 */
	{SPI1_D0, (M14 | PIN_OUTPUT)},	/* spi1_d0.gpio7_9 */
	{SPI1_CS0, (M14 | PIN_OUTPUT)},	/* spi1_cs0.gpio7_10 */
	{SPI1_CS1, (M14 | PIN_OUTPUT)},	/* spi1_cs1.gpio7_11 */
	{SPI1_CS2, (M14 | PIN_INPUT_SLEW)},	/* spi1_cs2.gpio7_12 */
	{SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)},	/* spi1_cs3.hdmi1_cec */
	{SPI2_SCLK, (M0 | PIN_INPUT)},	/* spi2_sclk.spi2_sclk */
	{SPI2_D1, (M0 | PIN_INPUT | SLEWCONTROL)},	/* spi2_d1.spi2_d1 */
	{SPI2_D0, (M0 | PIN_INPUT | SLEWCONTROL)},	/* spi2_d0.spi2_d0 */
	{SPI2_CS0, (M0 | PIN_INPUT | SLEWCONTROL)},	/* spi2_cs0.spi2_cs0 */
	{DCAN1_TX, (M15 | PULL_UP)},	/* dcan1_tx.safe for dcan1_tx */
	{DCAN1_RX, (M15 | PULL_UP)},	/* dcan1_rx.safe for dcan1_rx */
	{UART1_RXD, (M14 | PIN_INPUT | SLEWCONTROL)},	/* uart1_rxd.gpio7_22 */
	{UART1_CTSN, (M14 | PIN_OUTPUT)},	/* uart1_ctsn.gpio7_24 */
	{UART1_RTSN, (M14 | PIN_OUTPUT)},	/* uart1_rtsn.gpio7_25 */
	{I2C1_SDA, (M0 | PIN_INPUT)},	/* i2c1_sda.i2c1_sda */
	{I2C1_SCL, (M0 | PIN_INPUT)},	/* i2c1_scl.i2c1_scl */
	{I2C2_SDA, (M1 | PIN_INPUT)},	/* i2c2_sda.hdmi1_ddc_scl */
	{I2C2_SCL, (M1 | PIN_INPUT)},	/* i2c2_scl.hdmi1_ddc_sda */
	{WAKEUP0, (M0 | PIN_INPUT)},	/* Wakeup0.Wakeup0 */
	{WAKEUP3, (M0 | PIN_INPUT)},	/* Wakeup3.Wakeup3 */
	{ON_OFF, (M0 | PIN_OUTPUT)},	/* on_off.on_off */
	{RTC_PORZ, (M0 | PIN_INPUT)},	/* rtc_porz.rtc_porz */
	{TMS, (M0 | PIN_INPUT_PULLUP)},	/* tms.tms */
	{TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* tdi.tdi */
	{TDO, (M0 | PIN_OUTPUT_PULLUP)},	/* tdo.tdo */
	{TCLK, (M0 | PIN_INPUT_PULLUP)},	/* tclk.tclk */
	{TRSTN, (M0 | PIN_INPUT)},	/* trstn.trstn */
	{RTCK, (M0 | PIN_OUTPUT_PULLUP)},	/* rtck.rtck */
	{EMU0, (M0 | PIN_INPUT)},	/* emu0.emu0 */
	{EMU1, (M0 | PIN_INPUT)},	/* emu1.emu1 */
	{RESETN, (M0 | PIN_INPUT)},	/* resetn.resetn */
	{RSTOUTN, (M0 | PIN_OUTPUT)},	/* rstoutn.rstoutn */
};

const struct pad_conf_entry core_padconf_array_icss1eth_am571x_idk[] = {
	/* PR1 MII0 */
	{VOUT1_D8, (M12 | PIN_INPUT_PULLUP)},	/* vout1_d8.pr1_mii_mt0_clk */
	{VOUT1_D9, (M13 | PIN_OUTPUT_PULLUP)},	/* vout1_d9.pr1_mii0_txd3 */
	{VOUT1_D10, (M13 | PIN_OUTPUT_PULLUP)},	/* vout1_d10.pr1_mii0_txd2 */
	{VOUT1_D11, (M13 | PIN_OUTPUT_PULLUP)},	/* vout1_d11.pr1_mii0_txen */
	{VOUT1_D12, (M13 | PIN_OUTPUT_PULLUP)},	/* vout1_d12.pr1_mii0_txd1 */
	{VOUT1_D13, (M13 | PIN_OUTPUT_PULLUP)},	/* vout1_d13.pr1_mii0_txd0 */
	{VOUT1_D14, (M12 | PIN_INPUT_PULLUP)},	/* vout1_d14.pr1_mii_mr0_clk */
	{VOUT1_D15, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d15.pr1_mii0_rxdv */
	{VOUT1_D16, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d16.pr1_mii0_rxd3 */
	{VOUT1_D17, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d17.pr1_mii0_rxd2 */
	{VOUT1_D18, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d18.pr1_mii0_rxd1 */
	{VOUT1_D19, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d19.pr1_mii0_rxd0 */
	{VOUT1_D20, (M12 | PIN_INPUT_PULLUP)},	/* vout1_d20.pr1_mii0_rxer */
	{VOUT1_D21, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d21.pr1_mii0_rxlink */
	{VOUT1_D22, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d22.pr1_mii0_col */
	{VOUT1_D23, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d23.pr1_mii0_crs */

	/* PR1 MII1 */
	{VIN2A_D3, (M12 | PIN_INPUT_PULLDOWN)},	/* vin2a_d3.pr1_mii1_col */
	{VIN2A_D4, (M13 | PIN_OUTPUT_PULLUP)},	/* vin2a_d4.pr1_mii1_txd1 */
	{VIN2A_D5, (M13 | PIN_OUTPUT_PULLUP)},	/* vin2a_d5.pr1_mii1_txd0 */
	{VIN2A_D6, (M11 | PIN_INPUT_PULLUP)},	/* vin2a_d6.pr1_mii_mt1_clk */
	{VIN2A_D7, (M11 | PIN_OUTPUT_PULLUP)},	/* vin2a_d7.pr1_mii1_txen */
	{VIN2A_D8, (M11 | PIN_OUTPUT_PULLUP)},	/* vin2a_d8.pr1_mii1_txd3 */
	{VIN2A_D9, (M11 | PIN_OUTPUT_PULLUP)},	/* vin2a_d9.pr1_mii1_txd2 */
	{VOUT1_VSYNC, (M12 | PIN_INPUT_PULLUP)},	/* vout1_vsync.pr1_mii1_rxer */
	{VOUT1_D0, (M12 | PIN_INPUT_PULLUP)},	/* vout1_d0.pr1_mii1_rxlink */
	{VOUT1_D1, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d1.pr1_mii1_crs */
	{VOUT1_D2, (M12 | PIN_INPUT_PULLUP)},	/* vout1_d2.pr1_mii_mr1_clk */
	{VOUT1_D3, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d3.pr1_mii1_rxdv */
	{VOUT1_D4, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d4.pr1_mii1_rxd3 */
	{VOUT1_D5, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d5.pr1_mii1_rxd2 */
	{VOUT1_D6, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d6.pr1_mii1_rxd1 */
	{VOUT1_D7, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d7.pr1_mii1_rxd0 */
};

const struct pad_conf_entry core_padconf_array_vout_am571x_idk[] = {
	{VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_clk.vout1_clk */
	{VOUT1_DE, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_de.vout1_de */
	{VOUT1_HSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_hsync.vout1_hsync */
	{VOUT1_VSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_vsync.vout1_vsync */
	{VOUT1_D0, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d0.vout1_d0 */
	{VOUT1_D1, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d1.vout1_d1 */
	{VOUT1_D2, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d2.vout1_d2 */
	{VOUT1_D3, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d3.vout1_d3 */
	{VOUT1_D4, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d4.vout1_d4 */
	{VOUT1_D5, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d5.vout1_d5 */
	{VOUT1_D6, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d6.vout1_d6 */
	{VOUT1_D7, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d7.vout1_d7 */
	{VOUT1_D8, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d8.vout1_d8 */
	{VOUT1_D9, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d9.vout1_d9 */
	{VOUT1_D10, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d10.vout1_d10 */
	{VOUT1_D11, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d11.vout1_d11 */
	{VOUT1_D12, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d12.vout1_d12 */
	{VOUT1_D13, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d13.vout1_d13 */
	{VOUT1_D14, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d14.vout1_d14 */
	{VOUT1_D15, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d15.vout1_d15 */
	{VOUT1_D16, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d16.vout1_d16 */
	{VOUT1_D17, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d17.vout1_d17 */
	{VOUT1_D18, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d18.vout1_d18 */
	{VOUT1_D19, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d19.vout1_d19 */
	{VOUT1_D20, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d20.vout1_d20 */
	{VOUT1_D21, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d21.vout1_d21 */
	{VOUT1_D22, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d22.vout1_d22 */
	{VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL)},	/* vout1_d23.vout1_d23 */

	{MCASP5_ACLKX, (M12 | PIN_INPUT | MANUAL_MODE)},	/* mcasp5_aclkx.pr2_pru1_gpi1 */
	{MCASP5_FSX, (M12 | PIN_INPUT | MANUAL_MODE)},	/* mcasp5_fsx.pr2_pru1_gpi2 */
	{UART2_RXD, (M0 | PIN_INPUT)},	/* uart2_rxd.uart2_rxd */
	{UART2_TXD, (M0 | PIN_OUTPUT)},	/* uart2_txd.uart2_txd */
	{VIN2A_D5, (M13 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d5.pr1_pru1_gpo2 */
};

const struct pad_conf_entry early_padconf[] = {
	{UART2_CTSN, (M2 | PIN_INPUT_SLEW)},	/* uart2_ctsn.uart3_rxd */
	{UART2_RTSN, (M1 | PIN_INPUT_SLEW)},	/* uart2_rtsn.uart3_txd */
	{I2C1_SDA, (PIN_INPUT_PULLUP | M0)},	/* I2C1_SDA */
	{I2C1_SCL, (PIN_INPUT_PULLUP | M0)},	/* I2C1_SCL */
};

#ifdef CONFIG_IODELAY_RECALIBRATION
const struct iodelay_cfg_entry iodelay_cfg_array_x15_sr1_1[] = {
	{0x0114, 2980, 0},	/* CFG_GPMC_A0_IN */
	{0x0120, 2648, 0},	/* CFG_GPMC_A10_IN */
	{0x012C, 2918, 0},	/* CFG_GPMC_A11_IN */
	{0x0198, 2917, 0},	/* CFG_GPMC_A1_IN */
	{0x0204, 3156, 178},	/* CFG_GPMC_A2_IN */
	{0x0210, 3109, 246},	/* CFG_GPMC_A3_IN */
	{0x021C, 3142, 100},	/* CFG_GPMC_A4_IN */
	{0x0228, 3084, 33},	/* CFG_GPMC_A5_IN */
	{0x0234, 2778, 0},	/* CFG_GPMC_A6_IN */
	{0x0240, 3110, 0},	/* CFG_GPMC_A7_IN */
	{0x024C, 2874, 0},	/* CFG_GPMC_A8_IN */
	{0x0258, 3072, 0},	/* CFG_GPMC_A9_IN */
	{0x0264, 2466, 0},	/* CFG_GPMC_AD0_IN */
	{0x0270, 2523, 0},	/* CFG_GPMC_AD10_IN */
	{0x027C, 2453, 0},	/* CFG_GPMC_AD11_IN */
	{0x0288, 2285, 0},	/* CFG_GPMC_AD12_IN */
	{0x0294, 2206, 0},	/* CFG_GPMC_AD13_IN */
	{0x02A0, 1898, 0},	/* CFG_GPMC_AD14_IN */
	{0x02AC, 2473, 0},	/* CFG_GPMC_AD15_IN */
	{0x02B8, 2307, 0},	/* CFG_GPMC_AD1_IN */
	{0x02C4, 2691, 0},	/* CFG_GPMC_AD2_IN */
	{0x02D0, 2384, 0},	/* CFG_GPMC_AD3_IN */
	{0x02DC, 2462, 0},	/* CFG_GPMC_AD4_IN */
	{0x02E8, 2335, 0},	/* CFG_GPMC_AD5_IN */
	{0x02F4, 2370, 0},	/* CFG_GPMC_AD6_IN */
	{0x0300, 2389, 0},	/* CFG_GPMC_AD7_IN */
	{0x030C, 2672, 0},	/* CFG_GPMC_AD8_IN */
	{0x0318, 2334, 0},	/* CFG_GPMC_AD9_IN */
//caravel
	{0x0144, 0, 0},		/* CFG_GPMC_A13_IN */
	{0x0150, 2575, 966},	/* CFG_GPMC_A14_IN */
	{0x015C, 2503, 889},	/* CFG_GPMC_A15_IN */
	{0x0168, 2528, 1007},	/* CFG_GPMC_A16_IN */
	{0x0170, 0, 0},		/* CFG_GPMC_A16_OUT */
	{0x0174, 2533, 980},	/* CFG_GPMC_A17_IN */
	{0x0188, 590, 0},	/* CFG_GPMC_A18_OUT */
	{0x0374, 0, 0},		/* CFG_GPMC_CS2_OUT */

	{0x0378, 0, 0},		/* CFG_GPMC_CS3_IN */
	{0x0678, 406, 0},	/* CFG_MMC3_CLK_IN */
//caravel
	{0x03D4, 2533, 980},	/* CFG_MCASP1_AXR10_OUT*/
	{0x03E0, 0, 0},		/* CFG_MCASP1_AXR11_OUT*/
	{0x0470, 590, 0},	/* CFG_MCASP1_AXR8_OUT*/
	{0x0474, 2528, 1007},	/* CFG_MCASP1_AXR9_IN*/

	{0x0680, 659, 0},	/* CFG_MMC3_CLK_OUT */
	{0x0684, 0, 0},	/* CFG_MMC3_CMD_IN */
	{0x0688, 0, 0},	/* CFG_MMC3_CMD_OEN */
	{0x068C, 0, 0},	/* CFG_MMC3_CMD_OUT */
	{0x0690, 130, 0},	/* CFG_MMC3_DAT0_IN */
	{0x0694, 0, 0},	/* CFG_MMC3_DAT0_OEN */
	{0x0698, 0, 0},	/* CFG_MMC3_DAT0_OUT */
	{0x069C, 169, 0},	/* CFG_MMC3_DAT1_IN */
	{0x06A0, 0, 0},	/* CFG_MMC3_DAT1_OEN */
	{0x06A4, 0, 0},	/* CFG_MMC3_DAT1_OUT */
	{0x06A8, 0, 0},	/* CFG_MMC3_DAT2_IN */
	{0x06AC, 0, 0},	/* CFG_MMC3_DAT2_OEN */
	{0x06B0, 0, 0},	/* CFG_MMC3_DAT2_OUT */
	{0x06B4, 457, 0},	/* CFG_MMC3_DAT3_IN */
	{0x06B8, 0, 0},	/* CFG_MMC3_DAT3_OEN */
	{0x06BC, 0, 0},	/* CFG_MMC3_DAT3_OUT */
	{0x06C0, 702, 0},	/* CFG_MMC3_DAT4_IN */
	{0x06C4, 0, 0},	/* CFG_MMC3_DAT4_OEN */
	{0x06C8, 0, 0},	/* CFG_MMC3_DAT4_OUT */
	{0x06CC, 738, 0},	/* CFG_MMC3_DAT5_IN */
	{0x06D0, 0, 0},	/* CFG_MMC3_DAT5_OEN */
	{0x06D4, 0, 0},	/* CFG_MMC3_DAT5_OUT */
	{0x06D8, 856, 0},	/* CFG_MMC3_DAT6_IN */
	{0x06DC, 0, 0},	/* CFG_MMC3_DAT6_OEN */
	{0x06E0, 0, 0},	/* CFG_MMC3_DAT6_OUT */
	{0x06E4, 610, 0},	/* CFG_MMC3_DAT7_IN */
	{0x06E8, 0, 0},	/* CFG_MMC3_DAT7_OEN */
	{0x06EC, 0, 0},	/* CFG_MMC3_DAT7_OUT */
	{0x06F0, 480, 0},	/* CFG_RGMII0_RXC_IN */
	{0x06FC, 111, 1641},	/* CFG_RGMII0_RXCTL_IN */
	{0x0708, 272, 1116},	/* CFG_RGMII0_RXD0_IN */
	{0x0714, 243, 1260},	/* CFG_RGMII0_RXD1_IN */
	{0x0720, 0, 1614},	/* CFG_RGMII0_RXD2_IN */
	{0x072C, 105, 1673},	/* CFG_RGMII0_RXD3_IN */
	{0x0740, 531, 120},	/* CFG_RGMII0_TXC_OUT */
	{0x074C, 201, 60},	/* CFG_RGMII0_TXCTL_OUT */
	{0x0758, 229, 120},	/* CFG_RGMII0_TXD0_OUT */
	{0x0764, 141, 0},	/* CFG_RGMII0_TXD1_OUT */
	{0x0770, 495, 120},	/* CFG_RGMII0_TXD2_OUT */
	{0x077C, 660, 120},	/* CFG_RGMII0_TXD3_OUT */
	{0x0A70, 1551, 115},	/* CFG_VIN2A_D12_OUT */
	{0x0A7C, 816, 0},	/* CFG_VIN2A_D13_OUT */
	{0x0A88, 876, 0},	/* CFG_VIN2A_D14_OUT */
	{0x0A94, 312, 0},	/* CFG_VIN2A_D15_OUT */
	{0x0AA0, 58, 0},	/* CFG_VIN2A_D16_OUT */
	{0x0AAC, 0, 0},	/* CFG_VIN2A_D17_OUT */
	{0x0AB0, 702, 0},	/* CFG_VIN2A_D18_IN */
	{0x0ABC, 136, 976},	/* CFG_VIN2A_D19_IN */
	{0x0AD4, 210, 1357},	/* CFG_VIN2A_D20_IN */
	{0x0AE0, 189, 1462},	/* CFG_VIN2A_D21_IN */
	{0x0AEC, 232, 1278},	/* CFG_VIN2A_D22_IN */
	{0x0AF8, 0, 1397},	/* CFG_VIN2A_D23_IN */
//caravel
	{0x0CC0, 2688, 0},	/* CFG_VIN3A_DE_OUT */
	{0x0CD8, 2420, 0},	/* CFG_VIN3A_HSYNC_OUT */
	{0x0CE4, 2274, 0},	/* CFG_VIN3A_VSYNC_OUT */
	{0x0B94, 0, 0},		/* CFG_VIN3A_CLK_OUT */
	{0x0C00, 3033, 0},	/* CFG_VIN3A_D17_OUT */
	{0x0C0C, 2780, 0},	/* CFG_VIN3A_D18_OUT */
	{0x0C18, 2442, 0},	/* CFG_VIN3A_D19_OUT */
	{0x0C30, 2955, 120},	/* CFG_VIN3A_D20_OUT */
	{0x0C3C, 2572, 0},	/* CFG_VIN3A_D21_OUT */
	{0x0C48, 2761, 0},	/* CFG_VIN3A_D22_OUT */
	{0x0C54, 2674, 0},	/* CFG_VIN3A_D23_OUT */
	{0x0CA8, 2970, 69},	/* CFG_VIN3A_D8_OUT */
	{0x0CB4, 2992, 80},	/* CFG_VIN3A_D9_OUT */
	{0x0BAC, 2924, 5},	/* CFG_VIN3A_D10_OUT */
	{0x0BB8, 2993, 56},	/* CFG_VIN3A_D11_OUT */
	{0x0BC4, 2944, 0},	/* CFG_VIN3A_D12_OUT */
	{0x0BD0, 2916, 0},	/* CFG_VIN3A_D13_OUT */
	{0x0BDC, 2917, 0},	/* CFG_VIN3A_D14_OUT */
	{0x0BE8, 3013, 0},	/* CFG_VIN3A_D15_OUT */
	
//	{0x0BF4, 1996, 0},	/* CFG_VIN3A_D16_OUT */
//	{0x0C24, 2439, 0},	/* CFG_VIN3A_D1_OUT */
//	{0x0BA0, 2313, 0},	/* CFG_VIN3A_D0_OUT */
//	{0x0C60, 2200, 0},	/* CFG_VIN3A_D2_OUT */
//	{0x0C6C, 2355, 0},	/* CFG_VIN3A_D3_OUT */
//	{0x0C78, 3215, 0},	/* CFG_VIN3A_D4_OUT */
//	{0x0C84, 2314, 0},	/* CFG_VIN3A_D5_OUT */
//	{0x0C90, 2238, 0},	/* CFG_VIN3A_D6_OUT */
//	{0x0C9C, 2381, 0},	/* CFG_VIN3A_D7_OUT */

//	{0x0B9C, 0, 706},	/* CFG_VIN3A_CLK_OUT */
//	{0x0BA8, 2313, 0},	/* CFG_VIN3A_D0_OUT */
//	{0x0BB4, 2199, 0},	/* CFG_VIN3A_D10_OUT */
//	{0x0BC0, 2266, 0},	/* CFG_VIN3A_D11_OUT */
//	{0x0BCC, 3159, 0},	/* CFG_VIN3A_D12_OUT */
//	{0x0BD8, 2100, 0},	/* CFG_VIN3A_D13_OUT */
//	{0x0BE4, 2229, 0},	/* CFG_VIN3A_D14_OUT */
//	{0x0BF0, 2202, 0},	/* CFG_VIN3A_D15_OUT */
//	{0x0BFC, 2084, 0},	/* CFG_VIN3A_D16_OUT */
//	{0x0C08, 2195, 0},	/* CFG_VIN3A_D17_OUT */
//	{0x0C14, 2342, 0},	/* CFG_VIN3A_D18_OUT */
//	{0x0C20, 2463, 0},	/* CFG_VIN3A_D19_OUT */
//	{0x0C2C, 2439, 0},	/* CFG_VIN3A_D1_OUT */
//	{0x0C38, 2304, 0},	/* CFG_VIN3A_D20_OUT */
//	{0x0C44, 2103, 0},	/* CFG_VIN3A_D21_OUT */
//	{0x0C50, 2145, 0},	/* CFG_VIN3A_D22_OUT */
//	{0x0C5C, 1932, 0},	/* CFG_VIN3A_D23_OUT */
//	{0x0C68, 2200, 0},	/* CFG_VIN3A_D2_OUT */
//	{0x0C74, 2355, 0},	/* CFG_VIN3A_D3_OUT */
//	{0x0C80, 3215, 0},	/* CFG_VIN3A_D4_OUT */
//	{0x0C8C, 2314, 0},	/* CFG_VIN3A_D5_OUT */
//	{0x0C98, 2238, 0},	/* CFG_VIN3A_D6_OUT */
//	{0x0CA4, 2381, 0},	/* CFG_VIN3A_D7_OUT */
//	{0x0CB0, 2138, 0},	/* CFG_VIN3A_D8_OUT */
//	{0x0CBC, 2383, 0},	/* CFG_VIN3A_D9_OUT */
//	{0x0CC8, 1984, 0},	/* CFG_VIN3A_DE_OUT */
//	{0x0CE0, 1947, 0},	/* CFG_VIN3A_HSYNC_OUT */
//	{0x0CEC, 2739, 0},	/* CFG_VIN3A_VSYNC_OUT */
};

const struct iodelay_cfg_entry iodelay_cfg_array_x15_sr2_0[] = {
	{0x0114, 2519, 702},	/* CFG_GPMC_A0_IN */
	{0x0120, 2435, 411},	/* CFG_GPMC_A10_IN */
	{0x012C, 2379, 755},	/* CFG_GPMC_A11_IN */
	{0x0198, 2384, 778},	/* CFG_GPMC_A1_IN */
	{0x0204, 2499, 1127},	/* CFG_GPMC_A2_IN */
	{0x0210, 2455, 1181},	/* CFG_GPMC_A3_IN */
	{0x021C, 2486, 1039},	/* CFG_GPMC_A4_IN */
	{0x0228, 2456, 938},	/* CFG_GPMC_A5_IN */
	{0x0234, 2463, 573},	/* CFG_GPMC_A6_IN */
	{0x0240, 2608, 783},	/* CFG_GPMC_A7_IN */
	{0x024C, 2430, 656},	/* CFG_GPMC_A8_IN */
	{0x0258, 2465, 850},	/* CFG_GPMC_A9_IN */
	{0x0264, 2316, 301},	/* CFG_GPMC_AD0_IN */
	{0x0270, 2324, 406},	/* CFG_GPMC_AD10_IN */
	{0x027C, 2278, 352},	/* CFG_GPMC_AD11_IN */
	{0x0288, 2297, 160},	/* CFG_GPMC_AD12_IN */
	{0x0294, 2278, 108},	/* CFG_GPMC_AD13_IN */
	{0x02A0, 2035, 0},	/* CFG_GPMC_AD14_IN */
	{0x02AC, 2279, 378},	/* CFG_GPMC_AD15_IN */
	{0x02B8, 2440, 70},	/* CFG_GPMC_AD1_IN */
	{0x02C4, 2404, 446},	/* CFG_GPMC_AD2_IN */
	{0x02D0, 2343, 212},	/* CFG_GPMC_AD3_IN */
	{0x02DC, 2355, 322},	/* CFG_GPMC_AD4_IN */
	{0x02E8, 2337, 192},	/* CFG_GPMC_AD5_IN */
	{0x02F4, 2270, 314},	/* CFG_GPMC_AD6_IN */
	{0x0300, 2339, 259},	/* CFG_GPMC_AD7_IN */
	{0x030C, 2308, 577},	/* CFG_GPMC_AD8_IN */
	{0x0318, 2334, 166},	/* CFG_GPMC_AD9_IN */
//caravel
	{0x0144, 0, 0},	/* CFG_GPMC_A13_IN */
	{0x0150, 2575, 966},	/* CFG_GPMC_A14_IN */
	{0x015C, 2503, 889},	/* CFG_GPMC_A15_IN */
	{0x0168, 2528, 1007},	/* CFG_GPMC_A16_IN */
	{0x0170, 0, 0},	/* CFG_GPMC_A16_OUT */
	{0x0174, 2533, 980},	/* CFG_GPMC_A17_IN */
	{0x0188, 590, 0},	/* CFG_GPMC_A18_OUT */
	{0x0374, 0, 0},	/* CFG_GPMC_CS2_OUT */
//caravel
	{0x0378, 0, 0},	/* CFG_GPMC_CS3_IN */

//caravel
	{0x03D4, 2533, 980},	/* CFG_MCASP1_AXR10_OUT*/
	{0x03E0, 0, 0},		/* CFG_MCASP1_AXR11_OUT*/
	{0x0470, 590, 0},	/* CFG_MCASP1_AXR8_OUT*/
	{0x0474, 2528, 1007},	/* CFG_MCASP1_AXR9_IN*/

	{0x0678, 0, 386},	/* CFG_MMC3_CLK_IN */
	{0x0680, 605, 0},	/* CFG_MMC3_CLK_OUT */
	{0x0684, 0, 0},	/* CFG_MMC3_CMD_IN */
	{0x0688, 0, 0},	/* CFG_MMC3_CMD_OEN */
	{0x068C, 0, 0},	/* CFG_MMC3_CMD_OUT */
	{0x0690, 171, 0},	/* CFG_MMC3_DAT0_IN */
	{0x0694, 0, 0},	/* CFG_MMC3_DAT0_OEN */
	{0x0698, 0, 0},	/* CFG_MMC3_DAT0_OUT */
	{0x069C, 221, 0},	/* CFG_MMC3_DAT1_IN */
	{0x06A0, 0, 0},	/* CFG_MMC3_DAT1_OEN */
	{0x06A4, 0, 0},	/* CFG_MMC3_DAT1_OUT */
	{0x06A8, 0, 0},	/* CFG_MMC3_DAT2_IN */
	{0x06AC, 0, 0},	/* CFG_MMC3_DAT2_OEN */
	{0x06B0, 0, 0},	/* CFG_MMC3_DAT2_OUT */
	{0x06B4, 474, 0},	/* CFG_MMC3_DAT3_IN */
	{0x06B8, 0, 0},	/* CFG_MMC3_DAT3_OEN */
	{0x06BC, 0, 0},	/* CFG_MMC3_DAT3_OUT */
	{0x06C0, 792, 0},	/* CFG_MMC3_DAT4_IN */
	{0x06C4, 0, 0},	/* CFG_MMC3_DAT4_OEN */
	{0x06C8, 0, 0},	/* CFG_MMC3_DAT4_OUT */
	{0x06CC, 782, 0},	/* CFG_MMC3_DAT5_IN */
	{0x06D0, 0, 0},	/* CFG_MMC3_DAT5_OEN */
	{0x06D4, 0, 0},	/* CFG_MMC3_DAT5_OUT */
	{0x06D8, 942, 0},	/* CFG_MMC3_DAT6_IN */
	{0x06DC, 0, 0},	/* CFG_MMC3_DAT6_OEN */
	{0x06E0, 0, 0},	/* CFG_MMC3_DAT6_OUT */
	{0x06E4, 636, 0},	/* CFG_MMC3_DAT7_IN */
	{0x06E8, 0, 0},	/* CFG_MMC3_DAT7_OEN */
	{0x06EC, 0, 0},	/* CFG_MMC3_DAT7_OUT */
	{0x06F0, 260, 0},	/* CFG_RGMII0_RXC_IN */
	{0x06FC, 0, 1412},	/* CFG_RGMII0_RXCTL_IN */
	{0x0708, 123, 1047},	/* CFG_RGMII0_RXD0_IN */
	{0x0714, 139, 1081},	/* CFG_RGMII0_RXD1_IN */
	{0x0720, 195, 1100},	/* CFG_RGMII0_RXD2_IN */
	{0x072C, 239, 1216},	/* CFG_RGMII0_RXD3_IN */
	{0x0740, 89, 0},	/* CFG_RGMII0_TXC_OUT */
	{0x074C, 15, 125},	/* CFG_RGMII0_TXCTL_OUT */
	{0x0758, 339, 162},	/* CFG_RGMII0_TXD0_OUT */
	{0x0764, 146, 94},	/* CFG_RGMII0_TXD1_OUT */
	{0x0770, 0, 27},	/* CFG_RGMII0_TXD2_OUT */
	{0x077C, 291, 205},	/* CFG_RGMII0_TXD3_OUT */
	{0x0A70, 0, 0},	/* CFG_VIN2A_D12_OUT */
	{0x0A7C, 219, 101},	/* CFG_VIN2A_D13_OUT */
	{0x0A88, 92, 58},	/* CFG_VIN2A_D14_OUT */
	{0x0A94, 135, 100},	/* CFG_VIN2A_D15_OUT */
	{0x0AA0, 154, 101},	/* CFG_VIN2A_D16_OUT */
	{0x0AAC, 78, 27},	/* CFG_VIN2A_D17_OUT */
	{0x0AB0, 411, 0},	/* CFG_VIN2A_D18_IN */
	{0x0ABC, 0, 382},	/* CFG_VIN2A_D19_IN */
	{0x0AD4, 320, 750},	/* CFG_VIN2A_D20_IN */
	{0x0AE0, 192, 836},	/* CFG_VIN2A_D21_IN */
	{0x0AEC, 294, 669},	/* CFG_VIN2A_D22_IN */
	{0x0AF8, 50, 700},	/* CFG_VIN2A_D23_IN */
	{0x0CC0, 2688, 0},	/* CFG_VIN3A_DE_OUT */
	{0x0CD8, 2420, 0},	/* CFG_VIN3A_HSYNC_OUT */
	{0x0CE4, 2274, 0},	/* CFG_VIN3A_VSYNC_OUT */
//	{0x0B94, 0, 0},		/* CFG_VIN3A_CLK_OUT */
	{0x0C00, 3033, 0},	/* CFG_VIN3A_D17_OUT */
	{0x0C0C, 2780, 0},	/* CFG_VIN3A_D18_OUT */
	{0x0C18, 2442, 0},	/* CFG_VIN3A_D19_OUT */
	{0x0C30, 2955, 120},	/* CFG_VIN3A_D20_OUT */
	{0x0C3C, 2572, 0},	/* CFG_VIN3A_D21_OUT */
	{0x0C48, 2761, 0},	/* CFG_VIN3A_D22_OUT */
	{0x0C54, 2674, 0},	/* CFG_VIN3A_D23_OUT */
	{0x0CA8, 2970, 69},	/* CFG_VIN3A_D8_OUT */
	{0x0CB4, 2992, 80},	/* CFG_VIN3A_D9_OUT */
	{0x0BAC, 2924, 5},	/* CFG_VIN3A_D10_OUT */
	{0x0BB8, 2993, 56},	/* CFG_VIN3A_D11_OUT */
	{0x0BC4, 2944, 0},	/* CFG_VIN3A_D12_OUT */
	{0x0BD0, 2916, 0},	/* CFG_VIN3A_D13_OUT */
	{0x0BDC, 2917, 0},	/* CFG_VIN3A_D14_OUT */
	{0x0BE8, 3013, 0},	/* CFG_VIN3A_D15_OUT */
};

const struct iodelay_cfg_entry iodelay_cfg_array_am574x_idk[] = {
	{0x0114, 2199, 621},	/* CFG_GPMC_A0_IN */
	{0x0120, 0, 0},	/* CFG_GPMC_A10_IN */
	{0x012C, 2133, 859},	/* CFG_GPMC_A11_IN */
	{0x0138, 2258, 562},	/* CFG_GPMC_A12_IN */
	{0x0144, 0, 0},	/* CFG_GPMC_A13_IN */
	{0x0150, 2149, 1052},	/* CFG_GPMC_A14_IN */
	{0x015C, 2121, 997},	/* CFG_GPMC_A15_IN */
	{0x0168, 2159, 1134},	/* CFG_GPMC_A16_IN */
	{0x0170, 0, 0},	/* CFG_GPMC_A16_OUT */
	{0x0174, 2135, 1085},	/* CFG_GPMC_A17_IN */
	{0x0188, 0, 0},	/* CFG_GPMC_A18_OUT */
	{0x0198, 1989, 612},	/* CFG_GPMC_A1_IN */
	{0x0204, 2218, 912},	/* CFG_GPMC_A2_IN */
	{0x0210, 2168, 963},	/* CFG_GPMC_A3_IN */
	{0x021C, 2196, 813},	/* CFG_GPMC_A4_IN */
	{0x0228, 2082, 782},	/* CFG_GPMC_A5_IN */
	{0x0234, 2098, 407},	/* CFG_GPMC_A6_IN */
	{0x0240, 2343, 585},	/* CFG_GPMC_A7_IN */
	{0x024C, 2030, 685},	/* CFG_GPMC_A8_IN */
	{0x0258, 2116, 832},	/* CFG_GPMC_A9_IN */
	{0x0374, 0, 0},	/* CFG_GPMC_CS2_OUT */
	{0x0590, 1000, 3900},	/* CFG_MCASP5_ACLKX_OUT */
	{0x05AC, 1000, 3800},	/* CFG_MCASP5_FSX_IN */
	{0x06F0, 451, 0},	/* CFG_RGMII0_RXC_IN */
	{0x06FC, 127, 1571},	/* CFG_RGMII0_RXCTL_IN */
	{0x0708, 165, 1178},	/* CFG_RGMII0_RXD0_IN */
	{0x0714, 136, 1302},	/* CFG_RGMII0_RXD1_IN */
	{0x0720, 0, 1520},	/* CFG_RGMII0_RXD2_IN */
	{0x072C, 28, 1690},	/* CFG_RGMII0_RXD3_IN */
	{0x0740, 121, 0},	/* CFG_RGMII0_TXC_OUT */
	{0x074C, 60, 0},	/* CFG_RGMII0_TXCTL_OUT */
	{0x0758, 153, 0},	/* CFG_RGMII0_TXD0_OUT */
	{0x0764, 35, 0},	/* CFG_RGMII0_TXD1_OUT */
	{0x0770, 0, 0},	/* CFG_RGMII0_TXD2_OUT */
	{0x077C, 172, 0},	/* CFG_RGMII0_TXD3_OUT */
	{0x0A70, 147, 0},	/* CFG_VIN2A_D12_OUT */
	{0x0A7C, 110, 0},	/* CFG_VIN2A_D13_OUT */
	{0x0A88, 18, 0},	/* CFG_VIN2A_D14_OUT */
	{0x0A94, 82, 0},	/* CFG_VIN2A_D15_OUT */
	{0x0AA0, 33, 0},	/* CFG_VIN2A_D16_OUT */
	{0x0AAC, 0, 0},	/* CFG_VIN2A_D17_OUT */
	{0x0AB0, 417, 0},	/* CFG_VIN2A_D18_IN */
	{0x0ABC, 156, 843},	/* CFG_VIN2A_D19_IN */
	{0x0AD4, 223, 1413},	/* CFG_VIN2A_D20_IN */
	{0x0AE0, 169, 1415},	/* CFG_VIN2A_D21_IN */
	{0x0AEC, 43, 1150},	/* CFG_VIN2A_D22_IN */
	{0x0AF8, 0, 1210},	/* CFG_VIN2A_D23_IN */
	{0x0B30, 0, 200},	/* CFG_VIN2A_D5_OUT */
	{0x0B9C, 1281, 497},	/* CFG_VOUT1_CLK_OUT */
	{0x0BA8, 379, 0},	/* CFG_VOUT1_D0_OUT */
	{0x0BB4, 441, 0},	/* CFG_VOUT1_D10_OUT */
	{0x0BC0, 461, 0},	/* CFG_VOUT1_D11_OUT */
	{0x0BCC, 1189, 0},	/* CFG_VOUT1_D12_OUT */
	{0x0BD8, 312, 0},	/* CFG_VOUT1_D13_OUT */
	{0x0BE4, 298, 0},	/* CFG_VOUT1_D14_OUT */
	{0x0BF0, 284, 0},	/* CFG_VOUT1_D15_OUT */
	{0x0BFC, 152, 0},	/* CFG_VOUT1_D16_OUT */
	{0x0C08, 216, 0},	/* CFG_VOUT1_D17_OUT */
	{0x0C14, 408, 0},	/* CFG_VOUT1_D18_OUT */
	{0x0C20, 519, 0},	/* CFG_VOUT1_D19_OUT */
	{0x0C2C, 475, 0},	/* CFG_VOUT1_D1_OUT */
	{0x0C38, 316, 0},	/* CFG_VOUT1_D20_OUT */
	{0x0C44, 59, 0},	/* CFG_VOUT1_D21_OUT */
	{0x0C50, 221, 0},	/* CFG_VOUT1_D22_OUT */
	{0x0C5C, 96, 0},	/* CFG_VOUT1_D23_OUT */
	{0x0C68, 264, 0},	/* CFG_VOUT1_D2_OUT */
	{0x0C74, 421, 0},	/* CFG_VOUT1_D3_OUT */
	{0x0C80, 1257, 0},	/* CFG_VOUT1_D4_OUT */
	{0x0C8C, 432, 0},	/* CFG_VOUT1_D5_OUT */
	{0x0C98, 436, 0},	/* CFG_VOUT1_D6_OUT */
	{0x0CA4, 440, 0},	/* CFG_VOUT1_D7_OUT */
	{0x0CB0, 81, 100},	/* CFG_VOUT1_D8_OUT */
	{0x0CBC, 471, 0},	/* CFG_VOUT1_D9_OUT */
	{0x0CC8, 0, 0},	/* CFG_VOUT1_DE_OUT */
	{0x0CE0, 0, 0},	/* CFG_VOUT1_HSYNC_OUT */
	{0x0CEC, 815, 0},	/* CFG_VOUT1_VSYNC_OUT */
};

const struct iodelay_cfg_entry iodelay_cfg_array_am572x_idk[] = {
	{0x0114, 1861, 901},	/* CFG_GPMC_A0_IN */
	{0x0120, 0, 0},	/* CFG_GPMC_A10_IN */
	{0x012C, 1783, 1178},	/* CFG_GPMC_A11_IN */
	{0x0138, 1903, 853},	/* CFG_GPMC_A12_IN */
	{0x0144, 0, 0},	/* CFG_GPMC_A13_IN */
	{0x0150, 2575, 966},	/* CFG_GPMC_A14_IN */
	{0x015C, 2503, 889},	/* CFG_GPMC_A15_IN */
	{0x0168, 2528, 1007},	/* CFG_GPMC_A16_IN */
	{0x0170, 0, 0},	/* CFG_GPMC_A16_OUT */
	{0x0174, 2533, 980},	/* CFG_GPMC_A17_IN */
	{0x0188, 590, 0},	/* CFG_GPMC_A18_OUT */
	{0x0198, 1652, 891},	/* CFG_GPMC_A1_IN */
	{0x0204, 1888, 1212},	/* CFG_GPMC_A2_IN */
	{0x0210, 1839, 1274},	/* CFG_GPMC_A3_IN */
	{0x021C, 1868, 1113},	/* CFG_GPMC_A4_IN */
	{0x0228, 1757, 1079},	/* CFG_GPMC_A5_IN */
	{0x0234, 1800, 670},	/* CFG_GPMC_A6_IN */
	{0x0240, 1967, 898},	/* CFG_GPMC_A7_IN */
	{0x024C, 1731, 959},	/* CFG_GPMC_A8_IN */
	{0x0258, 1766, 1150},	/* CFG_GPMC_A9_IN */
	{0x0374, 0, 0},	/* CFG_GPMC_CS2_OUT */
	{0x0590, 1000, 4200},	/* CFG_MCASP5_ACLKX_OUT */
	{0x05AC, 800, 3800},	/* CFG_MCASP5_FSX_IN */
	{0x06F0, 260, 0},	/* CFG_RGMII0_RXC_IN */
	{0x06FC, 0, 1412},	/* CFG_RGMII0_RXCTL_IN */
	{0x0708, 123, 1047},	/* CFG_RGMII0_RXD0_IN */
	{0x0714, 139, 1081},	/* CFG_RGMII0_RXD1_IN */
	{0x0720, 195, 1100},	/* CFG_RGMII0_RXD2_IN */
	{0x072C, 239, 1216},	/* CFG_RGMII0_RXD3_IN */
	{0x0740, 89, 0},	/* CFG_RGMII0_TXC_OUT */
	{0x074C, 15, 125},	/* CFG_RGMII0_TXCTL_OUT */
	{0x0758, 339, 162},	/* CFG_RGMII0_TXD0_OUT */
	{0x0764, 146, 94},	/* CFG_RGMII0_TXD1_OUT */
	{0x0770, 0, 27},	/* CFG_RGMII0_TXD2_OUT */
	{0x077C, 291, 205},	/* CFG_RGMII0_TXD3_OUT */
	{0x0A70, 0, 0},	/* CFG_VIN2A_D12_OUT */
	{0x0A7C, 219, 101},	/* CFG_VIN2A_D13_OUT */
	{0x0A88, 92, 58},	/* CFG_VIN2A_D14_OUT */
	{0x0A94, 135, 100},	/* CFG_VIN2A_D15_OUT */
	{0x0AA0, 154, 101},	/* CFG_VIN2A_D16_OUT */
	{0x0AAC, 78, 27},	/* CFG_VIN2A_D17_OUT */
	{0x0AB0, 411, 0},	/* CFG_VIN2A_D18_IN */
	{0x0ABC, 0, 382},	/* CFG_VIN2A_D19_IN */
	{0x0AD4, 320, 750},	/* CFG_VIN2A_D20_IN */
	{0x0AE0, 192, 836},	/* CFG_VIN2A_D21_IN */
	{0x0AEC, 294, 669},	/* CFG_VIN2A_D22_IN */
	{0x0AF8, 50, 700},	/* CFG_VIN2A_D23_IN */
	{0x0B30, 0, 0},	/* CFG_VIN2A_D5_OUT */
	{0x0B9C, 1126, 751},	/* CFG_VOUT1_CLK_OUT */
	{0x0BA8, 395, 0},	/* CFG_VOUT1_D0_OUT */
	{0x0BB4, 282, 0},	/* CFG_VOUT1_D10_OUT */
	{0x0BC0, 348, 0},	/* CFG_VOUT1_D11_OUT */
	{0x0BCC, 1240, 0},	/* CFG_VOUT1_D12_OUT */
	{0x0BD8, 182, 0},	/* CFG_VOUT1_D13_OUT */
	{0x0BE4, 311, 0},	/* CFG_VOUT1_D14_OUT */
	{0x0BF0, 285, 0},	/* CFG_VOUT1_D15_OUT */
	{0x0BFC, 166, 0},	/* CFG_VOUT1_D16_OUT */
	{0x0C08, 278, 0},	/* CFG_VOUT1_D17_OUT */
	{0x0C14, 425, 0},	/* CFG_VOUT1_D18_OUT */
	{0x0C20, 516, 0},	/* CFG_VOUT1_D19_OUT */
	{0x0C2C, 521, 0},	/* CFG_VOUT1_D1_OUT */
	{0x0C38, 386, 0},	/* CFG_VOUT1_D20_OUT */
	{0x0C44, 111, 0},	/* CFG_VOUT1_D21_OUT */
	{0x0C50, 227, 0},	/* CFG_VOUT1_D22_OUT */
	{0x0C5C, 0, 0},	/* CFG_VOUT1_D23_OUT */
	{0x0C68, 282, 0},	/* CFG_VOUT1_D2_OUT */
	{0x0C74, 438, 0},	/* CFG_VOUT1_D3_OUT */
	{0x0C80, 1298, 0},	/* CFG_VOUT1_D4_OUT */
	{0x0C8C, 397, 0},	/* CFG_VOUT1_D5_OUT */
	{0x0C98, 321, 0},	/* CFG_VOUT1_D6_OUT */
	{0x0CA4, 155, 309},	/* CFG_VOUT1_D7_OUT */
	{0x0CB0, 212, 0},	/* CFG_VOUT1_D8_OUT */
	{0x0CBC, 466, 0},	/* CFG_VOUT1_D9_OUT */
	{0x0CC8, 0, 0},	/* CFG_VOUT1_DE_OUT */
	{0x0CE0, 0, 0},	/* CFG_VOUT1_HSYNC_OUT */
	{0x0CEC, 139, 701},	/* CFG_VOUT1_VSYNC_OUT */
};

const struct iodelay_cfg_entry iodelay_cfg_array_am571x_idk[] = {
	{0x0114, 1873, 702},	/* CFG_GPMC_A0_IN */
	{0x0120, 0, 0},	/* CFG_GPMC_A10_IN */
	{0x012C, 1851, 1011},	/* CFG_GPMC_A11_IN */
	{0x0138, 2009, 601},	/* CFG_GPMC_A12_IN */
	{0x0144, 0, 0},	/* CFG_GPMC_A13_IN */
	{0x0150, 2247, 1186},	/* CFG_GPMC_A14_IN */
	{0x015C, 2176, 1197},	/* CFG_GPMC_A15_IN */
	{0x0168, 2229, 1268},	/* CFG_GPMC_A16_IN */
	{0x0170, 0, 0},	/* CFG_GPMC_A16_OUT */
	{0x0174, 2251, 1217},	/* CFG_GPMC_A17_IN */
	{0x0188, 0, 0},	/* CFG_GPMC_A18_OUT */
	{0x0198, 1629, 772},	/* CFG_GPMC_A1_IN */
	{0x0204, 1734, 898},	/* CFG_GPMC_A2_IN */
	{0x0210, 1757, 1076},	/* CFG_GPMC_A3_IN */
	{0x021C, 1794, 893},	/* CFG_GPMC_A4_IN */
	{0x0228, 1726, 853},	/* CFG_GPMC_A5_IN */
	{0x0234, 1792, 612},	/* CFG_GPMC_A6_IN */
	{0x0240, 2117, 610},	/* CFG_GPMC_A7_IN */
	{0x024C, 1758, 653},	/* CFG_GPMC_A8_IN */
	{0x0258, 1705, 899},	/* CFG_GPMC_A9_IN */
	{0x0374, 0, 0},	/* CFG_GPMC_CS2_OUT */
	{0x06F0, 413, 0},	/* CFG_RGMII0_RXC_IN */
	{0x06FC, 27, 2296},	/* CFG_RGMII0_RXCTL_IN */
	{0x0708, 3, 1721},	/* CFG_RGMII0_RXD0_IN */
	{0x0714, 134, 1786},	/* CFG_RGMII0_RXD1_IN */
	{0x0720, 40, 1966},	/* CFG_RGMII0_RXD2_IN */
	{0x072C, 0, 2057},	/* CFG_RGMII0_RXD3_IN */
	{0x0740, 0, 60},	/* CFG_RGMII0_TXC_OUT */
	{0x074C, 0, 60},	/* CFG_RGMII0_TXCTL_OUT */
	{0x0758, 0, 60},	/* CFG_RGMII0_TXD0_OUT */
	{0x0764, 0, 0},	/* CFG_RGMII0_TXD1_OUT */
	{0x0770, 0, 60},	/* CFG_RGMII0_TXD2_OUT */
	{0x077C, 0, 120},	/* CFG_RGMII0_TXD3_OUT */
	{0x0A70, 0, 0},	/* CFG_VIN2A_D12_OUT */
	{0x0A7C, 170, 0},	/* CFG_VIN2A_D13_OUT */
	{0x0A88, 150, 0},	/* CFG_VIN2A_D14_OUT */
	{0x0A94, 0, 0},	/* CFG_VIN2A_D15_OUT */
	{0x0AA0, 60, 0},	/* CFG_VIN2A_D16_OUT */
	{0x0AAC, 60, 0},	/* CFG_VIN2A_D17_OUT */
	{0x0AB0, 530, 0},	/* CFG_VIN2A_D18_IN */
	{0x0ABC, 71, 1099},	/* CFG_VIN2A_D19_IN */
	{0x0AD4, 142, 1337},	/* CFG_VIN2A_D20_IN */
	{0x0AE0, 114, 1517},	/* CFG_VIN2A_D21_IN */
	{0x0AEC, 171, 1331},	/* CFG_VIN2A_D22_IN */
	{0x0AF8, 0, 1328},	/* CFG_VIN2A_D23_IN */
};

const struct iodelay_cfg_entry iodelay_cfg_array_am571x_idk_4port[] = {
	{0x0588, 2100, 1959},	/* CFG_MCASP5_ACLKX_IN */
	{0x05AC, 2100, 1780},	/* CFG_MCASP5_FSX_IN */
	{0x0B30, 0, 400},	/* CFG_VIN2A_D5_OUT */
};
#endif
#endif /* _MUX_DATA_BEAGLE_X15_H_ */

Thanking you,

Regards,

Ramachandra

Hi Ramachandra,

Video nodes are usually created by video_register_device(). This is called by alloc_stream() in the driver, which is called by vip_create_streams() in vip driver. Can you please check if video_register_device is getting called in your case and if it is running successfully?

Regards,
Parth

Hi sir,

In gs2971.c not calling these functions video_register_device(), alloc_stream(),vip_create_streams().

Actually i will add alloc_stream then kernel_panic is hapeening.

Thanking you,

Ramachandra

Hi Ramachandra,

Can you please comment out v4l2_int_device_register in your gs2971 driver probe (Line-1553) and just use the v4l2_spi_subdev_init, v4l2_subdev_init and ret = v4l2_async_register_subdev and check.

Regards,
Parth

hi  sir,

After running spi_subdev_init,async it is hanging

Arago Project http://arago-project.org am57xx-evm ttyS2

Arago 2019.07 am57xx-evm ttyS2

am57xx-evm login: root
root@am57xx-evm:~# cd ..
root@am57xx-evm:/home# cd ..
root@am57xx-evm:/# insmod /lib/modules/4.19.59-g5f8c1c6121/kernel/drivers/media/platform/mxc/capture/v4l2-int-device.ko
root@am57xx-evm:/# insmod /lib/modules/4.19.59-g5f8c1c6121/kernel/drivers/media/platform/mxc/capture/gs2971_video.ko
[ 46.555253] gs2971 spi3.2: mclk=19bfcc0
[ 46.559363] gs2971 spi3.2: ipu=1
[ 46.562616] gs2971_probe:cea861=0
[ 46.565949] gs2971 spi3.2: pixelformat=1448695129
[ 46.572409] gs2971 spi3.2: width=1920
[ 46.576626] gs2971 spi3.2: height=1080
[ 46.580389] gs2971 spi3.2: capability=1001
[ 46.584503] gs2971_gpio_state: active=0, standby-gpios(0)=0x0
[ 47.676355] gs2971 spi3.2: status=0, read value of 0x000000c0, expected 0x000000c0
[ 47.684652] gs2971 spi3.2: register 00 = 000000c0
[ 47.689513] gs2971 spi3.2: register 01 = 00000000
[ 47.694320] gs2971 spi3.2: register 02 = 00000000
[ 47.699154] gs2971 spi3.2: register 03 = 00000000
[ 47.703960] gs2971 spi3.2: register 04 = 00000000
[ 47.708786] gs2971 spi3.2: register 05 = 00004210
[ 47.713585] gs2971 spi3.2: register 06 = 00000b66
[ 47.718394] gs2971 spi3.2: register 07 = 00001dff
[ 47.723192] gs2971 spi3.2: register 08 = 00000820
[ 47.728037] gs2971 spi3.2: register 09 = 00001883
[ 47.732836] gs2971 spi3.2: register 0a = 00000000
[ 47.737695] gs2971 spi3.2: register 0b = 00000000
[ 47.742491] gs2971 spi3.2: register 0c = 00000000
[ 47.747305] gs2971 spi3.2: register 0d = 00000000
[ 47.752100] gs2971 spi3.2: register 0e = 00000000
[ 47.756930] gs2971 spi3.2: register 0f = 00000000
[ 47.761784] gs2971 spi3.2: register 10 = 00000000
[ 47.766618] gs2971 spi3.2: register 11 = 00000000
[ 47.771413] gs2971 spi3.2: register 12 = 00000000
[ 47.776245] gs2971 spi3.2: register 13 = 00000000
[ 47.781042] gs2971 spi3.2: register 14 = 00000000
[ 47.785838] gs2971 spi3.2: register 15 = 00000000
[ 47.790693] gs2971 spi3.2: register 16 = 00000000
[ 47.795488] gs2971 spi3.2: register 17 = 00000000
[ 47.800307] gs2971 spi3.2: register 18 = 00000000
[ 47.805102] gs2971 spi3.2: register 19 = 00000000
[ 47.809933] gs2971 spi3.2: register 1a = 00000000
[ 47.814729] gs2971 spi3.2: register 1b = 00000000
[ 47.819559] gs2971 spi3.2: register 1c = 00000000
[ 47.824354] gs2971 spi3.2: register 1d = 00000000
[ 47.829184] gs2971 spi3.2: register 1e = 00000000
[ 47.833978] gs2971 spi3.2: register 1f = 00000780
[ 47.838828] gs2971 spi3.2: register 20 = 00000898
[ 47.843626] gs2971 spi3.2: register 21 = 00000465
[ 47.848455] gs2971 spi3.2: register 22 = 00001438
[ 47.853249] gs2971 spi3.2: register 23 = 00000003
[ 47.858080] gs2971 spi3.2: register 24 = 00000004
[ 47.863120] gs2971 spi3.2: register 25 = 00000022
[ 47.867881] gs2971_gpio_state: active=1, standby-gpios(0)=0x1
[ 47.873655] (NULL device *): v4l2_async_register_subdev Entered
[ 47.879630] (NULL device *): v4l2_async_notifier_find_v4l2_dev1
[ 47.885573] (NULL device *): v4l2_async_notifier_find_v4l2_dev2
[ 47.891572] (NULL device *): v4l2_async_notifier_find_v4l2_dev After loop
[ 47.898414] (NULL device *): v4l2_async_find_match
[ 47.903223] (NULL device *): v4l2_async_find_match match_fwnode
[ 47.909195] (NULL device *): v4l2_async_find_match match_fwnode1
[ 47.915223] (NULL device *): v4l2_async_match_notify
[ 47.920221] (NULL device *): v4l2_async_match_notify v4l2_async_notifier_call_bound start
[ 47.928457] (NULL device *): v4l2_async_notifier_call_bound start
[ 47.934572] (NULL device *): v4l2_async_notifier_call_bound end
[ 47.940574] vin3a: Port A: Using subdev gs2971 for capture

It is hangs not coming out of loop

Thank you sir

Hi Ramachandra,

Can you please explain which loop are you referring here? Please share the API where the code is hanging.

Regards,
Parth

Hi sir,

I am using below gs2971 code(linux/driver/media/platform/mxc/capture/gs2971.c

/* SEMTECH SD SDI reciever
 *
 * Copyright (C) 2014 RidgeRun
 * Author: Edison Fernández <edison.fernández@ridgerun.com>
 *
 * Currently working with 1080p30 and 720p60 with no audio support.
 * In order to support more standars the VD_STD value should be
 * used in order to identify the incomming resolution and framerate.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

/*!
 * @file gs2971.c
 *
 * @brief SEMTECH SD SDI reciever
 *
 * @ingroup Camera
 */

#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/i2c.h>
#include <linux/of_gpio.h>
#include <linux/videodev2.h>
#include <linux/regulator/consumer.h>
#include <linux/fsl_devices.h>
#include <media/v4l2-chip-ident.h>
//#include <media/v4l2-int-device.h>
#include "v4l2-int-device.h"
#include "mxc_v4l2_capture.h"
#include <linux/proc_fs.h>

#include <media/v4l2-async.h>
#include <media/v4l2-device.h>
#include <media/v4l2-common.h>
#include <media/v4l2-mediabus.h>
//#include <media/v4l2-of.h>
#include <media/v4l2-ctrls.h>
#include <media/media-entity.h>
#include <linux/videodev2.h>

#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-event.h>
#include <media/v4l2-image-sizes.h>
#include <media/v4l2-subdev.h>
#include <media/v4l2-mediabus.h>
#include <media/v4l2-common.h>
//#include <media/v4l2-of.h>
#include <media/v4l2-dv-timings.h>
#include <media/v4l2-ioctl.h>

#include "gs2971.h"

#define DEBUG 1
#define DRIVER_NAME     "gs2971"

/* Debug functions */
static int debug = 1;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Debug level (0-2)");

static struct gs2971_spidata *spidata;

#define YUV_FORMAT(gs) ((gs->cea861) ? V4L2_PIX_FMT_UYVY : V4L2_PIX_FMT_YUYV)

/*! @brief This mutex is used to provide mutual exclusion.
 *
 *  Create a mutex that can be used to provide mutually exclusive
 *  read/write access to the globally accessible data structures
 *  and variables that were defined above.
 */
static DEFINE_MUTEX(mutex);

int gs2971_read_buffer(struct spi_device *spi, u16 offset, u16 * values,
		       int length)
{
	struct spi_message msg;
	struct spi_transfer spi_xfer;
	int status;
	struct gs2971_spidata *sp = spidata;

	if (!spi)
		return -ENODEV;

	if (length > GS2971_SPI_TRANSFER_MAX)
		return -EINVAL;

	sp->txbuf[0] = 0x8000 | (offset & 0xfff);	/* read */
	if (length > 1)
		sp->txbuf[0] |= 0x1000;	/* autoinc */

	memset(&spi_xfer, '\0', sizeof(spi_xfer));
	spi_xfer.tx_buf = sp->txbuf;
	spi_xfer.rx_buf = sp->rxbuf;
	spi_xfer.bits_per_word = 16;
	spi_xfer.delay_usecs = 0;
	spi_xfer.speed_hz = 1000000;
	spi_xfer.len = sizeof(*values) * (length + 1);	// length in bytes

	spi_message_init(&msg);
	spi_message_add_tail(&spi_xfer, &msg);

	status = spi_sync(spi, &msg);
	
	memcpy(values, &sp->rxbuf[1], sizeof(*values) * length);
	if (status)
		pr_err(">> Read buffer(%d) (%x): %x %x, %x %x\n", status,
		       offset, sp->txbuf[0], sp->txbuf[1], sp->rxbuf[0],
		       sp->rxbuf[1]);

	return status;
}

int gs2971_read_register(struct spi_device *spi, u16 offset, u16 * value)
{
	struct spi_message msg;
	struct spi_transfer spi_xfer;
	int status;
	u32 txbuf[1];
	u32 rxbuf[1];

	if (!spi)
		return -ENODEV;

	txbuf[0] = 0x80000000 | ((offset & 0xfff) << 16);	/* read */


	memset(&spi_xfer, '\0', sizeof(spi_xfer));
	spi_xfer.tx_buf = txbuf;
	spi_xfer.rx_buf = rxbuf;
	spi_xfer.bits_per_word = 32;	
	spi_xfer.delay_usecs = 0;	
	spi_xfer.speed_hz = 1000000;
	spi_xfer.len = 4;	// length in bytes

	spi_message_init(&msg);
	spi_message_add_tail(&spi_xfer, &msg);

	status = spi_sync(spi, &msg);

	//dev_err(&spi->dev, "read_register status=%x\n", status);	//cispl
	if (status) {
		dev_dbg(&spi->dev, "read_reg failed\n");
		*value = 0xffff;
	} else {
		*value = (u16) rxbuf[0];
	}

	if (status)
		pr_err(">> Read register(%d) (%x): %x, %x\n", status, offset,
		       txbuf[0], rxbuf[0]);

	pr_debug("--> Read register (%x) with value: %x", offset, *value);
	return status;
}

int gs2971_write_buffer(struct spi_device *spi, u16 offset, u16 * values,
			int length)
{
	struct spi_message msg;
	struct spi_transfer spi_xfer;
	int status;
	struct gs2971_spidata *sp = spidata;

	if (!spi)
		return -ENODEV;

	if (length > GS2971_SPI_TRANSFER_MAX - 1)
		return -EINVAL;

	sp->txbuf[0] = (offset & 0xfff);	/* write  */
	if (length > 1)
		sp->txbuf[0] |= 0x1000;	/* autoinc */
	memcpy(&sp->txbuf[1], values, sizeof(*values) * length);

	memset(&spi_xfer, '\0', sizeof(spi_xfer));
	spi_xfer.tx_buf = sp->txbuf;
	spi_xfer.rx_buf = sp->rxbuf;
	spi_xfer.bits_per_word = 16;
	spi_xfer.delay_usecs = 0;
	spi_xfer.speed_hz = 1000000;
	spi_xfer.len = sizeof(*values) * (length + 1);	// length in bytes

	spi_message_init(&msg);
	spi_message_add_tail(&spi_xfer, &msg);

	status = spi_sync(spi, &msg);
	if (status)
		pr_err(">> Write register(%d) (%x): %x %x, %x %x\n", status,
		       offset, sp->txbuf[0], sp->txbuf[1], sp->rxbuf[0],
		       sp->rxbuf[1]);
	return status;
}

int gs2971_write_register(struct spi_device *spi, u16 offset, u16 value)
{
	pr_debug("--> Writing to address (%x) : %x\n", offset, value);
	return gs2971_write_buffer(spi, offset, &value, 1);
}
const char *gpio_names[] = {
[GPIO_STANDBY] = "standby-gpios",
[GPIO_RESET] = "rst-gpios",
[GPIO_TIM_861] = "tim_861-gpios",
[GPIO_IOPROC_EN] = "ioproc_en-gpios",
[GPIO_SW_EN] = "sw_en-gpios",
[GPIO_RC_BYPASS] = "rc_bypass-gpios",
[GPIO_AUDIO_EN] = "audio_en-gpios",
[GPIO_DVB_ASI] = "dvb_asi-gpios",
[GPIO_SMPTE_BYPASS] = "smpte_bypass-gpios",
[GPIO_DVI_LOCK] = "dvi_lock-gpios",
[GPIO_DATA_ERR] = "data_err-gpios",
[GPIO_LB_CONT] = "lb_cont-gpios",
[GPIO_Y_1ANC] = "y_1anc-gpios",
};

void gs2971_gpio_state(struct gs2971_priv *gs, int index, int active)
{
	if (gpio_is_valid(gs->gpios[index])) {
		int state = (gs->gpio_flags[index] & OF_GPIO_ACTIVE_LOW) ? 1 : 0;

		state ^= active;
		gpio_set_value(gs->gpios[index], state);
		pr_info("%s: active=%d, %s(%d)=0x%x\n", __func__, active, gpio_names[index], gs->gpios[index], state);
	}
}

static void gs2971_change_gpio_state(struct gs2971_priv *gs, int on)
{
	gs2971_gpio_state(gs, GPIO_STANDBY, on ? 0 : 1);
	if (on) {
		pr_debug("%s: power up delay\n", __func__);
		msleep(1000);
	}
}

static int gs2971_get_gpios(struct gs2971_priv *gs, struct device *dev)
{
	int i;
	int ret;
	enum of_gpio_flags flags;

	for (i = 0; i < GPIO_CNT; i++) {
		gs->gpios[i] = of_get_named_gpio_flags(dev->of_node, gpio_names[i], 0, &flags);
		if (!gpio_is_valid(gs->gpios[i])) {
			pr_info("%s: gpio %s not available\n", __func__, gpio_names[i]);
		} else {
			int gflags = (flags & OF_GPIO_ACTIVE_LOW) ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;

			if ((i == GPIO_STANDBY) || (i == GPIO_RESET))
				gflags ^= GPIOF_INIT_HIGH;
			if (flags == 2)
				gflags = GPIOF_IN;

			gs->gpio_flags[i] = flags;
			pr_info("%s: %s flags(%d -> %d)\n", __func__, gpio_names[i], flags, gflags);
			ret = devm_gpio_request_one(dev, gs->gpios[i], gflags, gpio_names[i]);
			if (ret < 0) {
				pr_info("%s: request of %s failed(%d)\n", __func__, gpio_names[i], ret);
				return ret;
			}
		}
	}
	gs2971_gpio_state(gs, GPIO_IOPROC_EN, 1);	//active ioproc_en
	msleep(2);
	gs2971_gpio_state(gs, GPIO_RESET, 0);	//remove reset
	msleep(400);
	return 0;
}

static s32 power_control(struct gs2971_priv *gs, int on)
{
	struct sensor_data *sensor = &gs->sensor;
	int i;
	int ret = 0;

	pr_debug("%s: %d\n", __func__, on);
	if (sensor->on != on) {
		if (on) {
			for (i = 0; i < REGULATOR_CNT; i++) {
				if (gs->regulator[i]) {
					ret = regulator_enable(gs->regulator[i]);
					if (ret) {
						pr_err("%s:regulator_enable failed(%d)\n",
							__func__, ret);
						on = 0;	/* power all off */
						break;
					}
				}
			}
		}
		gs2971_change_gpio_state(gs, on);
		sensor->on = on;
		if (!on) {
			for (i = REGULATOR_CNT - 1; i >= 0; i--) {
				if (gs->regulator[i])
					regulator_disable(gs->regulator[i]);
			}
		}
	}
	return ret;
}

static struct spi_device *gs2971_get_spi(struct gs2971_spidata *spidata)
{
	if (!spidata)
		return NULL;
	return spidata->spi;
}

static int get_std(struct v4l2_int_device *s, v4l2_std_id * id)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;
	struct spi_device *spi = NULL;
	u16 std_lock_value;
	u16 sync_lock_value;
	u16 words_per_actline_value;
	u16 words_per_line_value;
	u16 lines_per_frame_value;
	u16 actlines_per_frame_value;
	u16 interlaced_flag;
	int status;
	u16 sd_audio_status_value;
	u16 hd_audio_status_value;
	u16 sd_audio_config_value;
	u16 hd_audio_config_value;
	u16 readback_value;
	u16 ds1, ds2;

	pr_debug("-> In function %s\n", __func__);

	gs->mode = gs2971_mode_not_supported;
	gs->framerate = gs2971_default_fps;

	spi = gs2971_get_spi(spidata);
	if (!spi)
		return -ENODEV;

	*id = V4L2_STD_UNKNOWN;

	status =
	    gs2971_read_register(spi, GS2971_RASTER_STRUCT4, &std_lock_value);
	actlines_per_frame_value = std_lock_value & GS_RS4_ACTLINES_PER_FIELD;
	interlaced_flag = std_lock_value & GS_RS4_INT_nPROG;

	status =
	    gs2971_read_register(spi, GS2971_FLYWHEEL_STATUS, &sync_lock_value);
	if (status)
		return status;
	pr_debug("--> lock_value %x\n", sync_lock_value);
	if (!sync_lock_value) {
		pr_err("%s: no lock, gs2971\n", __func__);
		return -EBUSY;
	}

	status = gs2971_read_register(spi, GS2971_DATA_FORMAT_DS1, &ds1);
	if (status)
		return status;
	status = gs2971_read_register(spi, GS2971_DATA_FORMAT_DS2, &ds2);
	if (status)
		return status;
	pr_debug("--> ds1=%x\n--> ds2=%x\n", ds1, ds2);

	status =
	    gs2971_read_register(spi, GS2971_RASTER_STRUCT1,
				 &words_per_actline_value);
	if (status)
		return status;
	words_per_actline_value &= GS_RS1_WORDS_PER_ACTLINE;

	status =
	    gs2971_read_register(spi, GS2971_RASTER_STRUCT2,
				 &words_per_line_value);
	if (status)
		return status;
	words_per_line_value &= GS_RS2_WORDS_PER_LINE;

	status =
	    gs2971_read_register(spi, GS2971_RASTER_STRUCT3,
				 &lines_per_frame_value);
	if (status)
		return status;
	lines_per_frame_value &= GS_RS3_LINES_PER_FRAME;

	pr_debug("--> Words per line %u/%u Lines per frame %u/%u\n",
		 (unsigned int)words_per_actline_value,
		 (unsigned int)words_per_line_value,
		 (unsigned int)actlines_per_frame_value,
		 (unsigned int)lines_per_frame_value);
	pr_debug("--> SyncLock: %s %s StdLock: 0x%04x\n",
		 (sync_lock_value & GS_FLY_V_LOCK_DS1) ? "Vsync" : "NoVsync",
		 (sync_lock_value & GS_FLY_H_LOCK_DS1) ? "Hsync" : "NoHsync",
		 (unsigned int)(std_lock_value));

	status =
	    gs2971_read_register(spi, GS2971_CH_VALID, &sd_audio_status_value);
	if (status)
		return status;

	status =
	    gs2971_read_register(spi, GS2971_HD_CH_VALID,
				 &hd_audio_status_value);
	if (status)
		return status;

	if (!lines_per_frame_value) {
		pr_err("%s: 0 frame size\n", __func__);
		return -EBUSY;
	}

	if (gs->cea861) {
		sensor->spix.swidth = words_per_line_value - 1;
		sensor->spix.sheight = lines_per_frame_value;
	}
	if (interlaced_flag && lines_per_frame_value == 525) {
		pr_debug("--> V4L2_STD_525_60\n");
		*id = V4L2_STD_525_60;
	} else if (interlaced_flag && lines_per_frame_value == 625) {
		pr_debug("--> V4L2_STD_625_50\n");
		*id = V4L2_STD_625_50;
	} else if (interlaced_flag && lines_per_frame_value == 525) {
		pr_debug("--> V4L2_STD_525P_60\n");
		*id = YUV_FORMAT(gs);
	} else if (interlaced_flag && lines_per_frame_value == 625) {
		pr_debug("--> V4L2_STD_625P_50\n");
		*id = YUV_FORMAT(gs);
	} else if (!interlaced_flag && 749 <= lines_per_frame_value
		   && lines_per_frame_value <= 750) {
		if (gs->cea861) {
			sensor->spix.left = 220;
			sensor->spix.top = 25;
		}
		sensor->pix.width = 1280;
		sensor->pix.height = 720;
		if (words_per_line_value > 1650) {
			pr_debug("--> V4L2_STD_720P_50\n");
			*id = YUV_FORMAT(gs);
		} else {
			pr_debug("--> V4L2_STD_720P_60\n");
			gs->mode = gs2971_mode_720p;
			gs->framerate = gs2971_60_fps;
			*id = YUV_FORMAT(gs);
		}
	} else if (!interlaced_flag && 1124 <= lines_per_frame_value
		   && lines_per_frame_value <= 1125) {
		sensor->pix.width = 1920;
		sensor->pix.height = 1080;
		gs->mode = gs2971_mode_1080p;
		gs->framerate = gs2971_30_fps;	// Currently only 1080p30 is supported

		if (words_per_line_value >= 2200 + 550) {
			pr_debug("--> V4L2_STD_1080P_24\n");
			*id = YUV_FORMAT(gs);
		} else if (words_per_line_value >= 2200 + 440) {
			pr_debug("--> V4L2_STD_1080P_25\n");
			*id = YUV_FORMAT(gs);
		} else {
			pr_debug("--> V4L2_STD_1080P_60\n");
			*id = YUV_FORMAT(gs);
		}
	} else if (interlaced_flag && 1124 <= lines_per_frame_value
		   && lines_per_frame_value <= 1125) {

		sensor->pix.width = 1920;
		sensor->pix.height = 1080;
		if (words_per_line_value >= 2200 + 440) {
			pr_debug("--> V4L2_STD_1080I_50\n");
			*id = YUV_FORMAT(gs);
		} else {
			pr_debug("--> V4L2_STD_1080I_60\n");
			*id = YUV_FORMAT(gs);
		}
	} else {
		dev_err(&spi->dev,
			"Std detection failed: interlaced_flag: %u words per line %u/%u Lines per frame %u/%u SyncLock: %s %s StdLock: 0x%04x\n",
			(unsigned int)interlaced_flag,
			(unsigned int)words_per_actline_value,
			(unsigned int)words_per_line_value,
			(unsigned int)actlines_per_frame_value,
			(unsigned int)lines_per_frame_value,
			(sync_lock_value & GS_FLY_V_LOCK_DS1) ? "Vsync" :
			"NoVsync",
			(sync_lock_value & GS_FLY_H_LOCK_DS1) ? "Hsync" :
			"NoHsync", (unsigned int)(std_lock_value));
		return -1;
	}

	sd_audio_config_value = 0xaaaa;	// 16-bit, right-justified

	status =
	    gs2971_write_register(spi, GS2971_CFG_AUD, sd_audio_config_value);
	if (!status) {
		status =
		    gs2971_read_register(spi, GS2971_CFG_AUD, &readback_value);
		if (!status) {
			if (sd_audio_config_value != readback_value) {
				dev_dbg(&spi->dev,
					"SD audio readback failed, wanted x%04x, got x%04x\n",
					(unsigned int)sd_audio_config_value,
					(unsigned int)readback_value);
			}
		}
	}

	hd_audio_config_value = 0x0aa4;	// 16-bit, right-justified
	status =
	    gs2971_write_register(spi, GS2971_HD_CFG_AUD,
				  hd_audio_config_value);
	if (!status) {
		status =
		    gs2971_read_register(spi, GS2971_HD_CFG_AUD,
					 &readback_value);
		if (!status) {
			if (hd_audio_config_value != readback_value) {
				dev_dbg(&spi->dev,
					"HD audio readback failed, wanted x%04x, got x%04x\n",
					(unsigned int)hd_audio_config_value,
					(unsigned int)readback_value);
			}
		}
	}

	status =
	    gs2971_write_register(spi, GS2971_ANC_CONTROL, ANCCTL_ANC_DATA_DEL);
	if (status)
		return status;
	pr_debug("--> remove anc data\n");

#if 0
	status = gs2971_write_register(spi, GS2971_ACGEN_CTRL,
				       (GS2971_ACGEN_CTRL_SCLK_INV_MASK |
					GS2971_ACGEN_CTRL_MCLK_SEL_128FS));
#endif
	return 0;
}

static void gs2971_workqueue_handler(struct work_struct *data);

DECLARE_WORK(gs2971_worker, gs2971_workqueue_handler);

static void gs2971_workqueue_handler(struct work_struct *ignored)
{
	struct spi_device *spi;
	u16 bank_reg_base, anc_reg;
	static u16 anc_buf[257];
	int anc_length;
	int adf_found = 1;
	int ch_id;
	int status;
	u16 did, sdid;

	pr_debug("-> In function %s\n", __func__);

	for (ch_id = 0; ch_id < GS2971_NUM_CHANNELS; ch_id++) {

		spi = gs2971_get_spi(spidata);
		if (!spi)
			continue;

		/* Step 2: start writing to other bank */
		gs2971_write_register(spi, GS2971_ANC_CONTROL,
				      ANCCTL_ANC_DATA_DEL |
				      ANCCTL_ANC_DATA_SWITCH);

#if 1
		/* Step 1: read ancillary data */
		bank_reg_base = GS2971_ANC_BANK_REG;
		status = 0;
		for (anc_reg = bank_reg_base, adf_found = 1; (0 == status) &&
		     ((anc_reg + 6) < bank_reg_base + GS2971_ANC_BANK_SIZE);) {
			status = gs2971_read_buffer(spi, anc_reg, anc_buf, 6);
			anc_reg += 6;

			if (anc_reg >= bank_reg_base + GS2971_ANC_BANK_SIZE)
				break;

			if (!status) {
				if (anc_buf[0] == 0 ||
				    anc_buf[1] == 0xff || anc_buf[2] == 0xff) {
					did = anc_buf[3];
					sdid = anc_buf[4];
					anc_length = (anc_buf[5] & 0xff) + 1;
					anc_reg += anc_length;

					if (!(did == 0 && sdid == 0)
					    && (did < 0xf8)) {
						dev_dbg(&spi->dev,
							"anc[%x] %02x %02x %02x\n",
							anc_reg, did, sdid,
							anc_length);
					}
				} else {
					break;
				}
			}
		}
		dev_dbg(&spi->dev, "anc_end[%x] %02x %02x %02x\n",
			anc_reg, anc_buf[0], anc_buf[1], anc_buf[2]);
#endif

		/* Step 3: switch reads to other bank */
		gs2971_write_register(spi, GS2971_ANC_CONTROL,
				      ANCCTL_ANC_DATA_DEL);
	}
}

#if defined(GS2971_ENABLE_ANCILLARY_DATA)
static int gs2971_init_ancillary(struct spi_device *spi)
{
	pr_debug("-> In function %s\n", __func__);

	u16 value;
	int offset;

	int status = 0;

	/* Set up ancillary data filtering */
	if (!status)
		status =
		    gs2971_write_register(spi, GS2971_REG_ANC_TYPE1, 0x4100);
	/*  SMPTE-352M Payload ID (0x4101) */
	if (!status)
		status = gs2971_write_register(spi, GS2971_REG_ANC_TYPE2, 0x5f00);	/* Placeholder */

	if (!status)
		status = gs2971_write_register(spi, GS2971_REG_ANC_TYPE3, 0x6000);	/* Placeholder */

	if (!status)
		status =
		    gs2971_write_register(spi, GS2971_REG_ANC_TYPE4, 0x6100);
	/* SMPTE 334 - SDID 01=EIA-708, 02=EIA-608 */

	if (!status)
		status =
		    gs2971_write_register(spi, GS2971_REG_ANC_TYPE5, 0x6200);
	/* SMPTE 334 - SDID 01=Program description, 02=Data broadcast, 03=VBI data */

	if (0 == gs2971_read_register(spi, GS2971_REG_ANC_TYPE1, &value)) {
		dev_dbg(&spi->dev, "REG_ANC_TYPE1 value x%04x\n",
			(unsigned int)value);
	}
	if (0 == gs2971_read_register(spi, GS2971_REG_ANC_TYPE2, &value)) {
		dev_dbg(&spi->dev, "REG_ANC_TYPE2 value x%04x\n",
			(unsigned int)value);
	}

	/* Clear old ancillary data */
	if (!status)
		status = gs2971_write_register(spi, GS2971_ANC_CONTROL,
					       ANCCTL_ANC_DATA_DEL |
					       ANCCTL_ANC_DATA_SWITCH);

	/* Step 2: start writing to other bank */
	if (!status)
		status =
		    gs2971_write_register(spi, GS2971_ANC_CONTROL,
					  ANCCTL_ANC_DATA_DEL);
	return status;
}
#endif

/* gs2971_initialize :
 * This function will set the video format standard
 */
static int gs2971_initialize(struct gs2971_priv *gs, struct spi_device *spi)
{
	int status = 0;
	int retry = 0;
	u16 value,i;
	static u16 anc_buf[257];

	static void __iomem *base;

	//base = ioremap(0x4A009800, SZ_4K);	cispl
	//__raw_writel(0x02,base);    		cispl

//	u16 cfg = GS_VCFG1_861_PIN_DISABLE_MASK;
	u16 cfg = 0xC0;
	if (gs->cea861)		
		cfg |= GS_VCFG1_TIMING_861_MASK;

	pr_debug("-> In function %s\n", __func__);
	for (;;) {
		status = gs2971_write_register(spi, GS2971_VCFG1, cfg);

		if (status)
			return status;
		status = gs2971_read_register(spi, GS2971_VCFG1, &value);

		if (status)
			return status;
		dev_err(&spi->dev, "status=%x, read value of 0x%08x, expected 0x%08x\n", status,
			(unsigned int)value, cfg);

		if (value == cfg)
			break;
		if (retry++ >= 20)
			return -ENODEV;
		msleep(50);
	}
	
//      status = gs2971_write_register(spi, GS2971_VCFG2, GS_VCFG2_DS_SWAP_3G);
	status = gs2971_write_register(spi, GS2971_VCFG2, 0);
	if (status)
		return status;

	status = gs2971_write_register(spi, GS2971_IO_CONFIG,
				       (GS_IOCFG_HSYNC << 0) | (GS_IOCFG_VSYNC
								<< 5) |
				       (GS_IOCFG_DE << 10));
	if (status)
		return status;

	status = gs2971_write_register(spi, GS2971_IO_CONFIG2,
				       (GS_IOCFG_LOCKED << 0) | (GS_IOCFG_Y_ANC
								 << 5) |
				       (GS_IOCFG_DATA_ERROR << 10));
	if (status)
		return status;

	status =
	    gs2971_write_register(spi, GS2971_TIM_861_CFG, GS_TIMCFG_TRS_861);		
	if (status)
		return status;
//	status =gs2971_write_register(spi, GS2971_RATE_SEL, 0x00);		//cispl
	for(i=0;i<38;i++)
	{
		gs2971_read_register(spi, i, &value);
		dev_err(&spi->dev, "register %02x = %08x\n",i,(unsigned int)value);
	}
#if defined(GS2971_ENABLE_ANCILLARY_DATA)
	gs2971_init_ancillary(spi);
#endif

#if 0
	if (gs2971_timer.function == NULL) {
		init_timer(&gs2971_timer);
		gs2971_timer.function = gs2971_timer_function;
	}
	mod_timer(&gs2971_timer, jiffies + msecs_to_jiffies(gs2971_timeout_ms));
#endif
	return status;
}

#if 0
/*!
 * Return attributes of current video standard.
 * Since this device autodetects the current standard, this function also
 * sets the values that need to be changed if the standard changes.
 * There is no set std equivalent function.
 *
 *  @return		None.
 */
static void gs2971_get_std(struct v4l2_int_device *s, v4l2_std_id * std)
{
	pr_debug("-> In function %s\n", __func__);
}
#endif

/***********************************************************************
 * IOCTL Functions from v4l2_int_ioctl_desc.
 ***********************************************************************/

/*!
 * ioctl_g_ifparm - V4L2 sensor interface handler for vidioc_int_g_ifparm_num
 * s: pointer to standard V4L2 device structure
 * p: pointer to standard V4L2 vidioc_int_g_ifparm_num ioctl structure
 *
 * Gets slave interface parameters.
 * Calculates the required xclk value to support the requested
 * clock parameters in p.  This value is returned in the p
 * parameter.
 *
 * vidioc_int_g_ifparm returns platform-specific information about the
 * interface settings used by the sensor.
 *
 * Called on open.
 */
static int ioctl_g_ifparm(struct v4l2_int_device *s, struct v4l2_ifparm *p)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;

	pr_debug("-> In function %s\n", __func__);

	/* Initialize structure to 0s then set any non-0 values. */
	memset(p, 0, sizeof(*p));
	p->u.bt656.clock_curr = sensor->mclk;
	if (gs->cea861) {
		p->if_type = V4L2_IF_TYPE_BT656;	/* This is the only possibility. */
		p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_NOBT_10BIT;
		p->u.bt656.bt_sync_correct = 1;
//      	p->u.bt656.nobt_vs_inv = 1;
		p->u.bt656.nobt_hs_inv = 1;
	} else {
		/*
		 * p->if_type = V4L2_IF_TYPE_BT656_PROGRESSIVE;
		 * BT.656 - 20/10bit pin low doesn't work because then EAV of
		 * DS1/2 are also interleaved and imx only recognizes 4 word
		 * EAV/SAV codes, not 8
		 */
		p->if_type = V4L2_IF_TYPE_BT1120_PROGRESSIVE_SDR;
		p->u.bt656.mode = V4L2_IF_TYPE_BT656_MODE_BT_10BIT;
		p->u.bt656.bt_sync_correct = 0;	// Use embedded sync
		p->u.bt656.nobt_vs_inv = 1;
//		p->u.bt656.nobt_hs_inv = 1;
	}
	p->u.bt656.latch_clk_inv = 0;	/* pixel clk polarity */
	p->u.bt656.clock_min = 6000000;
	p->u.bt656.clock_max = 180000000;
	return 0;
}

static int ioctl_s_power(struct v4l2_int_device *s, int on)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;

	pr_debug("-> In function %s\n", __func__);

	if (on && !sensor->on) {
		power_control(gs, 1);
	} else if (!on && sensor->on) {
		power_control(gs, 0);
	}
	return 0;
}

/*!
 * ioctl_g_parm - V4L2 sensor interface handler for VIDIOC_G_PARM ioctl
 * @s: pointer to standard V4L2 device structure
 * @a: pointer to standard V4L2 VIDIOC_G_PARM ioctl structure
 *
 * Returns the sensor's video CAPTURE parameters.
 */
static int ioctl_g_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;
	struct v4l2_captureparm *cparm = &a->parm.capture;

	pr_debug("-> In function %s\n", __func__);

	switch (a->type) {
		/* These are all the possible cases. */
	case V4L2_BUF_TYPE_VIDEO_CAPTURE:
		pr_debug("   type is V4L2_BUF_TYPE_VIDEO_CAPTURE\n");
		memset(a, 0, sizeof(*a));
		a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
		cparm->capability = sensor->streamcap.capability;
		cparm->timeperframe = sensor->streamcap.timeperframe;
		cparm->capturemode = sensor->streamcap.capturemode;
		break;

	case V4L2_BUF_TYPE_VIDEO_OUTPUT:
	case V4L2_BUF_TYPE_VIDEO_OVERLAY:
	case V4L2_BUF_TYPE_VBI_CAPTURE:
	case V4L2_BUF_TYPE_VBI_OUTPUT:
	case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
	case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
		break;

	default:
		pr_debug("ioctl_g_parm:type is unknown %d\n", a->type);
		break;
	}
	return 0;
}

/*!
 * ioctl_s_parm - V4L2 sensor interface handler for VIDIOC_S_PARM ioctl
 * @s: pointer to standard V4L2 device structure
 * @a: pointer to standard V4L2 VIDIOC_S_PARM ioctl structure
 *
 * Configures the sensor to use the input parameters, if possible.  If
 * not possible, reverts to the old parameters and returns the
 * appropriate error code.
 *
 * This driver cannot change these settings.
 */
static int ioctl_s_parm(struct v4l2_int_device *s, struct v4l2_streamparm *a)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;
	struct v4l2_fract *timeperframe = &a->parm.capture.timeperframe;
	int ret = 0;

	pr_debug("-> In function %s\n", __func__);

	/* Make sure power on */
	power_control(gs, 1);

	switch (a->type) {
		/* This is the only case currently handled. */
	case V4L2_BUF_TYPE_VIDEO_CAPTURE:
		/* Check that the new frame rate is allowed. */
		if ((timeperframe->numerator == 0) ||
		    (timeperframe->denominator == 0)) {
			timeperframe->denominator =
			    gs2971_framerates[gs2971_default_fps];
			timeperframe->numerator = 1;
			pr_warning("   Setting framerate to default (%dfps)!\n",
				   gs2971_framerates[gs2971_default_fps]);
		} else if (timeperframe->denominator !=
			   gs2971_framerates[gs->framerate]) {
			pr_warning
			    ("   Input framerate is %dfps and you are trying to set %dfps!\n",
			     gs2971_framerates[gs->framerate],
			     timeperframe->denominator);
		}
		sensor->streamcap.timeperframe = *timeperframe;
		sensor->streamcap.capturemode =
		    (u32) a->parm.capture.capturemode;
		break;

		/* These are all the possible cases. */
	case V4L2_BUF_TYPE_VIDEO_OUTPUT:
	case V4L2_BUF_TYPE_VIDEO_OVERLAY:
	case V4L2_BUF_TYPE_VBI_CAPTURE:
	case V4L2_BUF_TYPE_VBI_OUTPUT:
	case V4L2_BUF_TYPE_SLICED_VBI_CAPTURE:
	case V4L2_BUF_TYPE_SLICED_VBI_OUTPUT:
		pr_debug("   type is not V4L2_BUF_TYPE_VIDEO_CAPTURE but %d\n",
			 a->type);
		ret = -EINVAL;
		break;

	default:
		pr_debug("   type is unknown - %d\n", a->type);
		ret = -EINVAL;
		break;
	}
	return ret;
}

/*!
 * ioctl_g_fmt_cap - V4L2 sensor interface handler for ioctl_g_fmt_cap
 * @s: pointer to standard V4L2 device structure
 * @f: pointer to standard V4L2 v4l2_format structure
 *
 * Returns the sensor's current pixel format in the v4l2_format
 * parameter.
 */
static int ioctl_g_fmt_cap(struct v4l2_int_device *s, struct v4l2_format *f)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;
	v4l2_std_id std = V4L2_STD_UNKNOWN;

	pr_debug("-> In function %s\n", __func__);

	power_control(gs, 1);
	switch (f->type) {
	case V4L2_BUF_TYPE_VIDEO_CAPTURE:
		get_std(s, &std);
		f->fmt.pix = sensor->pix;
		break;

	case V4L2_BUF_TYPE_SENSOR:
		pr_debug("%s: left=%d, top=%d, %dx%d\n", __func__,
			sensor->spix.left, sensor->spix.top,
			sensor->spix.swidth, sensor->spix.sheight);
		f->fmt.spix = sensor->spix;
		break;

	case V4L2_BUF_TYPE_PRIVATE:
		get_std(s, &std);
//              f->fmt.pix.pixelformat = (u32)std;
		break;

	default:
		f->fmt.pix = sensor->pix;
		break;
	}
	return 0;
}

/*!
 * ioctl_queryctrl - V4L2 sensor interface handler for VIDIOC_QUERYCTRL ioctl
 * @s: pointer to standard V4L2 device structure
 * @qc: standard V4L2 VIDIOC_QUERYCTRL ioctl structure
 *
 * If the requested control is supported, returns the control information
 * from the video_control[] array.  Otherwise, returns -EINVAL if the
 * control is not supported.
 */
static int ioctl_queryctrl(struct v4l2_int_device *s, struct v4l2_queryctrl *qc)
{
	pr_debug("-> In function %s\n", __func__);
	return -EINVAL;
}

/*!
 * ioctl_g_ctrl - V4L2 sensor interface handler for VIDIOC_G_CTRL ioctl
 * @s: pointer to standard V4L2 device structure
 * @vc: standard V4L2 VIDIOC_G_CTRL ioctl structure
 *
 * If the requested control is supported, returns the control's current
 * value from the video_control[] array.  Otherwise, returns -EINVAL
 * if the control is not supported.
 */
static int ioctl_g_ctrl(struct v4l2_int_device *s, struct v4l2_control *vc)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;
	int ret = 0;

	pr_debug("-> In function %s\n", __func__);

	switch (vc->id) {
	case V4L2_CID_BRIGHTNESS:
		vc->value = sensor->brightness;
		break;
	case V4L2_CID_HUE:
		vc->value = sensor->hue;
		break;
	case V4L2_CID_CONTRAST:
		vc->value = sensor->contrast;
		break;
	case V4L2_CID_SATURATION:
		vc->value = sensor->saturation;
		break;
	case V4L2_CID_RED_BALANCE:
		vc->value = sensor->red;
		break;
	case V4L2_CID_BLUE_BALANCE:
		vc->value = sensor->blue;
		break;
	case V4L2_CID_EXPOSURE:
		vc->value = sensor->ae_mode;
		break;
	default:
		ret = -EINVAL;
	}
	return ret;
}

/*!
 * ioctl_s_ctrl - V4L2 sensor interface handler for VIDIOC_S_CTRL ioctl
 * @s: pointer to standard V4L2 device structure
 * @vc: standard V4L2 VIDIOC_S_CTRL ioctl structure
 *
 * If the requested control is supported, sets the control's current
 * value in HW (and updates the video_control[] array).  Otherwise,
 * returns -EINVAL if the control is not supported.
 */
static int ioctl_s_ctrl(struct v4l2_int_device *s, struct v4l2_control *vc)
{
	struct gs2971_priv *gs = s->priv;
//	struct sensor_data *sensor = &gs->sensor;
	int retval = 0;

	pr_debug("-> In function %s\n", __func__);

	///* Make sure power on */
	power_control(gs, 1);

	switch (vc->id) {
	case V4L2_CID_BRIGHTNESS:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_BRIGHTNESS\n");
		break;
	case V4L2_CID_CONTRAST:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_CONTRAST\n");
		break;
	case V4L2_CID_SATURATION:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_SATURATION\n");
		break;
	case V4L2_CID_HUE:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_HUE\n");
		break;
	case V4L2_CID_AUTO_WHITE_BALANCE:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_AUTO_WHITE_BALANCE\n");
		break;
	case V4L2_CID_DO_WHITE_BALANCE:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_DO_WHITE_BALANCE\n");
		break;
	case V4L2_CID_RED_BALANCE:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_RED_BALANCE\n");
		break;
	case V4L2_CID_BLUE_BALANCE:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_BLUE_BALANCE\n");
		break;
	case V4L2_CID_GAMMA:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_GAMMA\n");
		break;
	case V4L2_CID_EXPOSURE:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_EXPOSURE\n");
		break;
	case V4L2_CID_AUTOGAIN:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_AUTOGAIN\n");
		break;
	case V4L2_CID_GAIN:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_GAIN\n");
		break;
	case V4L2_CID_HFLIP:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_HFLIP\n");
		break;
	case V4L2_CID_VFLIP:
		dev_dbg(&spidata->spi->dev, "   V4L2_CID_VFLIP\n");
		break;
	default:
		dev_dbg(&spidata->spi->dev, "   Default case\n");
		retval = -EPERM;
		break;
	}
	return retval;
}

/*!
 * ioctl_enum_framesizes - V4L2 sensor interface handler for
 *			   VIDIOC_ENUM_FRAMESIZES ioctl
 * @s: pointer to standard V4L2 device structure
 * @fsize: standard V4L2 VIDIOC_ENUM_FRAMESIZES ioctl structure
 *
 * Return 0 if successful, otherwise -EINVAL.
 */
static int ioctl_enum_framesizes(struct v4l2_int_device *s,
				 struct v4l2_frmsizeenum *fsize)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;

	pr_debug("-> In function %s\n", __func__);

	if (fsize->index > gs2971_mode_MAX || gs->mode > gs2971_mode_MAX)
		return -EINVAL;

	fsize->pixel_format = sensor->pix.pixelformat;
	fsize->discrete.width = gs2971_res[gs->mode].width;
	fsize->discrete.height = gs2971_res[gs->mode].height;
	return 0;
}

/*!
 * ioctl_g_chip_ident - V4L2 sensor interface handler for
 *			VIDIOC_DBG_G_CHIP_IDENT ioctl
 * @s: pointer to standard V4L2 device structure
 * @id: pointer to int
 *
 * Return 0.
 */
static int ioctl_g_chip_ident(struct v4l2_int_device *s, int *id)
{
	pr_debug("-> In function %s\n", __func__);

	((struct v4l2_dbg_chip_ident *)id)->match.type =
	    V4L2_CHIP_MATCH_I2C_DRIVER;
	strcpy(((struct v4l2_dbg_chip_ident *)id)->match.name, "gs2971_video");

	return 0;
}

/*!
 * ioctl_enum_fmt_cap - V4L2 sensor interface handler for VIDIOC_ENUM_FMT
 * @s: pointer to standard V4L2 device structure
 * @fmt: pointer to standard V4L2 fmt description structure
 *
 * Return 0.
 */
static int ioctl_enum_fmt_cap(struct v4l2_int_device *s,
			      struct v4l2_fmtdesc *fmt)
{
	struct gs2971_priv *gs = s->priv;
	struct sensor_data *sensor = &gs->sensor;

	pr_debug("-> In function %s\n", __func__);

	if (fmt->index > 0)
		return -EINVAL;
	fmt->pixelformat = sensor->pix.pixelformat;	//gs->pix.pixelformat;
	return 0;
}

/*!
 * ioctl_init - V4L2 sensor interface handler for VIDIOC_INT_INIT
 * @s: pointer to standard V4L2 device structure
 */
static int ioctl_init(struct v4l2_int_device *s)
{
	pr_debug("-> In function %s\n", __func__);
	return 0;
}

/*!
 * ioctl_dev_init - V4L2 sensor interface handler for vidioc_int_dev_init_num
 * @s: pointer to standard V4L2 device structure
 *
 * Initialise the device when slave attaches to the master.
 */
static int ioctl_dev_init(struct v4l2_int_device *s)
{
	pr_debug("-> In function %s\n", __func__);
	return 0;
}

/*!
 * This structure defines all the ioctls for this module.
 */
static struct v4l2_int_ioctl_desc gs2971_ioctl_desc[] = {

	{vidioc_int_dev_init_num, (v4l2_int_ioctl_func *) ioctl_dev_init},
	{vidioc_int_s_power_num, (v4l2_int_ioctl_func *) ioctl_s_power},
	{vidioc_int_g_ifparm_num, (v4l2_int_ioctl_func *) ioctl_g_ifparm},
	{vidioc_int_init_num, (v4l2_int_ioctl_func *) ioctl_init},

	/*!
	 * VIDIOC_ENUM_FMT ioctl for the CAPTURE buffer type.
	 */
	{vidioc_int_enum_fmt_cap_num,
	 (v4l2_int_ioctl_func *) ioctl_enum_fmt_cap},
	{vidioc_int_g_fmt_cap_num, (v4l2_int_ioctl_func *) ioctl_g_fmt_cap},
	{vidioc_int_g_parm_num, (v4l2_int_ioctl_func *) ioctl_g_parm},
	{vidioc_int_s_parm_num, (v4l2_int_ioctl_func *) ioctl_s_parm},
	{vidioc_int_queryctrl_num, (v4l2_int_ioctl_func *) ioctl_queryctrl},
	{vidioc_int_g_ctrl_num, (v4l2_int_ioctl_func *) ioctl_g_ctrl},
	{vidioc_int_s_ctrl_num, (v4l2_int_ioctl_func *) ioctl_s_ctrl},
	{vidioc_int_enum_framesizes_num,
	 (v4l2_int_ioctl_func *) ioctl_enum_framesizes},
	{vidioc_int_g_chip_ident_num,
	 (v4l2_int_ioctl_func *) ioctl_g_chip_ident},
};

static struct v4l2_int_slave gs2971_slave = {
	.ioctls = gs2971_ioctl_desc,
	.num_ioctls = ARRAY_SIZE(gs2971_ioctl_desc),
};

static struct v4l2_int_device gs2971_int_device = {
	.module = THIS_MODULE,
	.name = "gs2971",
	.type = v4l2_int_type_slave,
	.u = {
	      .slave = &gs2971_slave,
	      },
};
static int gs_g_register(struct v4l2_subdev *sd,
		  struct v4l2_dbg_register *reg)
{
	struct spi_device *spi = v4l2_get_subdevdata(sd);
	u16 val;
	int ret;

	ret = gs2971_read_register(spi, reg->reg & 0xFFFF, &val);
	reg->val = val;
	reg->size = 2;
	return ret;
}
static int gs_s_register(struct v4l2_subdev *sd,
		  const struct v4l2_dbg_register *reg)
{
	struct spi_device *spi = v4l2_get_subdevdata(sd);

	return gs2971_write_register(spi, reg->reg & 0xFFFF, reg->val & 0xFFFF);

}
/*static inline struct gs2971_spidata *to_gs(struct v4l2_subdev *sd)
{
	return container_of(sd, struct gs2971_spidata, sd);
}
static int gs_s_dv_timings(struct v4l2_subdev *sd,
		    struct v4l2_dv_timings *timings)
{
	struct gs2971_spidata *gs = to_gs(sd);
	int reg_value;

	reg_value = get_register_timings(timings);
	if (reg_value == 0x0)
		return -EINVAL;

	gs->current_timings = *timings;
	return 0;
}
static int gs_g_dv_timings(struct v4l2_subdev *sd,
		    struct v4l2_dv_timings *timings)
{
	struct gs *gs = to_gs(sd);

	*timings = gs->current_timings;
	return 0;
}
static int gs_g_input_status(struct v4l2_subdev *sd, u32 *status)
{
	struct gs2971_spidata *gs = to_gs(sd);
	u16 reg_value, i;
	int ret;
*/
	/*
	 * Check if the component detect a line, a frame or something else
	 * which looks like a video signal activity.
	 */
/*	for (i = 0; i < 4; i++) {
		ret = gs2971_read_register(gs->pdev,
				       REG_LINES_PER_FRAME + i, &reg_value);
		if (reg_value)
			break;
		if (ret) {
			*status = V4L2_IN_ST_NO_POWER;
			return ret;
		}
	}
*/
	/* If no register reports a video signal */
/*	if (i >= 4)
		*status |= V4L2_IN_ST_NO_SIGNAL;

	ret = gs_read_register(gs->pdev, REG_STATUS, &reg_value);
	if (!(reg_value & MASK_H_LOCK))
		*status |=  V4L2_IN_ST_NO_H_LOCK;
	if (!(reg_value & MASK_V_LOCK))
		*status |=  V4L2_IN_ST_NO_V_LOCK;
	if (!(reg_value & MASK_STD_LOCK))
		*status |=  V4L2_IN_ST_NO_STD_LOCK;

	return ret;
}
static int gs_query_dv_timings(struct v4l2_subdev *sd,
			struct v4l2_dv_timings *timings)
{
	struct gs *gs = to_gs(sd);
	struct v4l2_dv_timings fmt;
	u16 reg_value, i;
	int ret;

	if (gs->enabled)
		return -EBUSY;
*/
	/*
	 * Check if the component detect a line, a frame or something else
	 * which looks like a video signal activity.
	 */
/*	for (i = 0; i < 4; i++) {
		gs_read_register(gs->pdev, REG_LINES_PER_FRAME + i, &reg_value);
		if (reg_value)
			break;
	}
*/
	/* If no register reports a video signal */
/*	if (i >= 4)
		return -ENOLINK;

	gs_read_register(gs->pdev, REG_STATUS, &reg_value);
	if (!(reg_value & MASK_H_LOCK) || !(reg_value & MASK_V_LOCK))
		return -ENOLCK;
	if (!(reg_value & MASK_STD_LOCK))
		return -ERANGE;

	ret = gs_status_format(reg_value, &fmt);

	if (ret < 0)
		return ret;

	*timings = fmt;
	return 0;
}
static int gs_s_stream(struct v4l2_subdev *sd, int enable)
{
	struct gs *gs = to_gs(sd);
	int reg_value;

	if (gs->enabled == enable)
		return 0;

	gs->enabled = enable;

	if (enable) {
*/		/* To force the specific format */
//		reg_value = get_register_timings(&gs->current_timings);
//		return gs_write_register(gs->pdev, REG_FORCE_FMT, reg_value);
//	}

	/* To renable auto-detection mode */
//	return gs_write_register(gs->pdev, REG_FORCE_FMT, 0x0);
//}

static const struct v4l2_subdev_core_ops gs2971_core_ops = {
#ifdef CONFIG_VIDEO_ADV_DEBUG
	.g_register = gs_g_register,
	.s_register = gs_s_register,
#endif
};

static const struct v4l2_subdev_video_ops gs2971_video_ops = {
//	.g_std = get_std,
//	.g_fmt_cap = ioctl_g_fmt_cap,
//	.g_parm = ioctl_g_parm,
//	.s_parm = ioctl_s_parm,
//	.queryctrl = ioctl_queryctrl,
//	.enum_framesizes = ioctl_enum_framesizes,
};

static const struct v4l2_subdev_pad_ops gs2971_pad_ops = {
//	.enum_dv_timings = ioctl_dev_init,
//	.dv_timings_cap = ioctl_init,
};
static const struct v4l2_subdev_ops gs2971_ops = {
	.core = &gs2971_core_ops,
	.video = &gs2971_video_ops,
	.pad = &gs2971_pad_ops,
};

/*!
 * GS2971 SPI probe function.
 * Function set in spi_driver struct.
 * Called by insmod.
 *
 *  @param *spi	SPI device descriptor.
 *
 *  @return		Error code indicating success or failure.
 */
static int gs2971_probe(struct spi_device *spi)
{
	struct v4l2_subdev *sd;
	struct device *dev = &spi->dev;
	struct gs2971_priv *gs;
	struct sensor_data *sensor;
	struct pinctrl_state *pins;

	int ret = 0;

	pr_debug("-> In function %s\n", __func__);

	gs = kzalloc(sizeof(*gs), GFP_KERNEL);
	if (!gs)
			return -ENOMEM;

	/* Allocate driver data */
	spidata = kzalloc(sizeof(*spidata), GFP_KERNEL);
	if (!spidata) {
		ret = -ENOMEM;
		goto exit;
	}
	/* Initialize the driver data */
	spidata->spi = spi;
	mutex_init(&spidata->buf_lock);
	sensor = &gs->sensor;

	/* Set initial values for the sensor struct. */
	memset(gs, 0, sizeof(*gs));
	ret = of_property_read_u32(dev->of_node, "mclk", &sensor->mclk);
	dev_err(dev, "mclk=%x\n",sensor->mclk);
	if (ret) {
		dev_err(dev, "mclk missing or invalid\n");
		goto exit;
	}

	ret = of_property_read_u32(dev->of_node, "ipu", &sensor->ipu_id);
	dev_err(dev, "ipu=%x\n",sensor->ipu_id);
	if (ret) {
		dev_err(dev, "ipu missing or invalid\n");
		goto exit;
	}

	ret = of_property_read_u32(dev->of_node, "csi", &sensor->csi);
	if (ret) {
		dev_err(dev, "csi missing or invalid\n");
		goto exit;
	}

	ret = of_property_read_u32(dev->of_node, "cea861", &gs->cea861);
	if (ret) {
		dev_err(dev, "cea861 missing or invalid\n");
		goto exit;
	}
	pr_info("%s:cea861=%d\n", __func__, gs->cea861);

	/*gs->pinctrl = devm_pinctrl_get(dev);
	if (IS_ERR(gs->pinctrl)) {
		ret = PTR_ERR(gs->pinctrl);
		dev_err(dev, "pinctrl missing or invalid\n");
		goto exit;
	}


	pins = pinctrl_lookup_state(gs->pinctrl, gs->cea861 ? "cea861" : "no_cea861");
	if (IS_ERR(pins)) {
		ret = PTR_ERR(pins);
		dev_err(dev, "pinctrl lookup state missing or invalid\n");
		goto exit;
	}

	ret = pinctrl_select_state(gs->pinctrl, pins);
	if (ret)
	{
		dev_err(dev, "pinctrl select state missing or invalid\n");
		goto exit;
	}*/
	sensor->pix.pixelformat = YUV_FORMAT(gs);
	sensor->pix.width = gs2971_res[gs2971_mode_default].width;
	sensor->pix.height = gs2971_res[gs2971_mode_default].height;
	sensor->streamcap.capability = V4L2_MODE_HIGHQUALITY |
	    V4L2_CAP_TIMEPERFRAME;
	sensor->streamcap.capturemode = 1;
	sensor->streamcap.timeperframe.denominator = DEFAULT_FPS;
	sensor->streamcap.timeperframe.numerator = 1;

	dev_err(dev, "pixelformat=%d\n",sensor->pix.pixelformat);
	dev_err(dev, "width=%d\n",sensor->pix.width);
	dev_err(dev, "height=%d\n",sensor->pix.height);
	dev_err(dev, "capability=%x\n",sensor->streamcap.capability );
//	dev_err(dev, "capturemode=%d\n",sensor->pix.capturemode);
//	dev_err(dev, "denominator=%d\n",sensor->streamcap.timeperframe.denominator);
//	dev_err(dev, "numerator=%d\n",sensor->streamcap.timeperframe.numerator);
	
	//sensor->pix.priv = 1;  /* 1 is used to indicate TV in */
	/*ret = gs2971_get_gpios(gs, dev);
	if (ret)
	{
		dev_err(dev, "get gpio missing or invalid\n");	
		goto exit;
	}*/
	power_control(gs, 1);
	gs2971_int_device.priv = gs;

	ret = gs2971_initialize(gs, spi);
	if (ret)
	{	
		dev_err(dev, "gs2971 init missing or invalid\n");	
		goto exit;
	}
	power_control(gs, 0);

	spidata->spi = spi;
	sd = &spidata->sd;
	//v4l2_int_device_register(&gs2971_int_device);
	//pr_debug("%s: %d\n", __func__, on);
	//pr_err("v4l2_int_device_register end\n");
	//ret = video_register_device(gs->video_dev, VFL_TYPE_GRABBER, -1);
	//if (ret < 0)
	//{
	//	pr_err("ERROR: v4l2 capture: video_register_device failed\n");
		//goto error_unregister_device;
	//}
	/*if (video_register_device(gs->video_dev, VFL_TYPE_GRABBER, -1)== -1) 
	{
		kfree(gs);
		gs = NULL;
		pr_err("ERROR: v4l2 capture: video_register_device failed\n");
		return -1;
	}*/
	//v4l2_device_register(&spi->dev, &spi->sd);
	v4l2_spi_subdev_init(sd, spi, &gs2971_ops);		
	v4l2_subdev_init(sd, &gs2971_ops);
	ret = v4l2_async_register_subdev(sd);
 exit:
	if (ret) {
		kfree(spidata);
		kfree(gs);
		pr_err("gs2971_probe returns %d\n", ret);
	}
	return ret;

}

static int gs2971_remove(struct spi_device *spi)
{
	struct v4l2_subdev *sd;
	pr_debug("-> In function %s\n", __func__);
	kfree(gs2971_int_device.priv);
	kfree(spidata);
	v4l2_int_device_unregister(&gs2971_int_device);
	//v4l2_device_unregister_subdev(sd);
	v4l2_async_unregister_subdev(sd);
	return 0;
}

static const struct of_device_id gs2971_dt_ids[] = {
	{
		.compatible = "gn,gs2971",
	}, {
		/* sentinel */
	}
};
MODULE_DEVICE_TABLE(of, gs2971_dt_ids);

static struct spi_driver gs2971_spi = {
	.driver = {
		   .name = DRIVER_NAME,
		   .bus = &spi_bus_type,
		   .owner = THIS_MODULE,
		   .of_match_table = gs2971_dt_ids,
		   },
	.probe = gs2971_probe,
	.remove = gs2971_remove,
};

/*!
 * gs2971 init function.
 * Called on insmod.
 *
 * @return    Error code indicating success or failure.
 */
static int __init gs2971_init(void)
{
	int ret;

	pr_debug("-> In function %s\n", __func__);

	ret = spi_register_driver(&gs2971_spi);

	return ret;
}

/*!
 * gs2971 cleanup function.
 * Called on rmmod.
 *
 * @return   Error code indicating success or failure.
 */
static void __exit gs2971_exit(void)
{
	pr_debug("-> In function %s\n", __func__);

	spi_unregister_driver(&gs2971_spi);
}

module_init(gs2971_init);
module_exit(gs2971_exit);
MODULE_DESCRIPTION("gs2971 video input Driver");
MODULE_LICENSE("GPL");
MODULE_VERSION("1.0");
MODULE_ALIAS("CSI");

And another file i am refering (linux/driver/media/v4l2-core/v4l2-async.c)

/*
 * V4L2 asynchronous subdevice registration API
 *
 * Copyright (C) 2012-2013, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/device.h>
#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/list.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/types.h>

#include <media/v4l2-async.h>
#include <media/v4l2-device.h>
#include <media/v4l2-fwnode.h>
#include <media/v4l2-subdev.h>

static int v4l2_async_notifier_call_bound(struct v4l2_async_notifier *n,struct v4l2_subdev *subdev,struct v4l2_async_subdev *asd)
{
	struct device *dev;
	dev_err(dev,"v4l2_async_notifier_call_bound start\n");
	if (!n->ops || !n->ops->bound)
		return 0;
	dev_err(dev,"v4l2_async_notifier_call_bound end\n");
	return n->ops->bound(n, subdev, asd);
}

static void v4l2_async_notifier_call_unbind(struct v4l2_async_notifier *n,
					    struct v4l2_subdev *subdev,
					    struct v4l2_async_subdev *asd)
{
	if (!n->ops || !n->ops->unbind)
		return;

	n->ops->unbind(n, subdev, asd);
}

static int v4l2_async_notifier_call_complete(struct v4l2_async_notifier *n)
{
	if (!n->ops || !n->ops->complete)
		return 0;

	return n->ops->complete(n);
}

static bool match_i2c(struct v4l2_subdev *sd, struct v4l2_async_subdev *asd)
{
#if IS_ENABLED(CONFIG_I2C)
	struct i2c_client *client = i2c_verify_client(sd->dev);
	return client &&
		asd->match.i2c.adapter_id == client->adapter->nr &&
		asd->match.i2c.address == client->addr;
#else
	return false;
#endif
}

static bool match_devname(struct v4l2_subdev *sd,
			  struct v4l2_async_subdev *asd)
{
	return !strcmp(asd->match.device_name, dev_name(sd->dev));
}

static bool match_fwnode(struct v4l2_subdev *sd, struct v4l2_async_subdev *asd)
{
	return sd->fwnode == asd->match.fwnode;
}

static bool match_custom(struct v4l2_subdev *sd, struct v4l2_async_subdev *asd)
{
	if (!asd->match.custom.match)
		/* Match always */
		return true;

	return asd->match.custom.match(sd->dev, asd);
}

static LIST_HEAD(subdev_list);
static LIST_HEAD(notifier_list);
static DEFINE_MUTEX(list_lock);

static struct v4l2_async_subdev *v4l2_async_find_match(struct v4l2_async_notifier *notifier, struct v4l2_subdev *sd)
{
	bool (*match)(struct v4l2_subdev *, struct v4l2_async_subdev *);
	struct v4l2_async_subdev *asd;
	struct device *dev;
	dev_err(dev,"v4l2_async_find_match\n");

	list_for_each_entry(asd, &notifier->waiting, list) {
		/* bus_type has been verified valid before */
		switch (asd->match_type) {
		case V4L2_ASYNC_MATCH_CUSTOM:
			match = match_custom;
			dev_err(dev,"v4l2_async_find_match match_custom\n");
			break;
		case V4L2_ASYNC_MATCH_DEVNAME:
			match = match_devname;
			dev_err(dev,"v4l2_async_find_match match_devname\n");
			break;
		case V4L2_ASYNC_MATCH_I2C:
			match = match_i2c;
			dev_err(dev,"v4l2_async_find_match match_i2c\n");
			break;
		case V4L2_ASYNC_MATCH_FWNODE:
			match = match_fwnode;
			dev_err(dev,"v4l2_async_find_match match_fwnode\n");
			break;
		default:
			/* Cannot happen, unless someone breaks us */
			WARN_ON(true);
			dev_err(dev,"v4l2_async_find_match WARN_ON\n");
			return NULL;
		}

		/* match cannot be NULL here */
		if (match(sd, asd))
		{
			dev_err(dev,"v4l2_async_find_match match_fwnode1\n");
			return asd;
		}
	}
	dev_err(dev,"v4l2_async_find_match after match\n");
	return NULL;
}

/* Find the sub-device notifier registered by a sub-device driver. */
static struct v4l2_async_notifier *v4l2_async_find_subdev_notifier(
	struct v4l2_subdev *sd)
{
	struct v4l2_async_notifier *n;

	list_for_each_entry(n, &notifier_list, list)
		if (n->sd == sd)
			return n;

	return NULL;
}

/* Get v4l2_device related to the notifier if one can be found. */
static struct v4l2_device *v4l2_async_notifier_find_v4l2_dev(
	struct v4l2_async_notifier *notifier)
{
	struct device *dev;
	dev_err(dev,"v4l2_async_notifier_find_v4l2_dev1\n");
	while (notifier->parent)
		notifier = notifier->parent;
	dev_err(dev,"v4l2_async_notifier_find_v4l2_dev2\n");
	return notifier->v4l2_dev;
}

/*
 * Return true if all child sub-device notifiers are complete, false otherwise.
 */
static bool v4l2_async_notifier_can_complete(
	struct v4l2_async_notifier *notifier)
{
	struct v4l2_subdev *sd;

	if (!list_empty(&notifier->waiting))
		return false;

	list_for_each_entry(sd, &notifier->done, async_list) {
		struct v4l2_async_notifier *subdev_notifier =
			v4l2_async_find_subdev_notifier(sd);

		if (subdev_notifier &&
		    !v4l2_async_notifier_can_complete(subdev_notifier))
			return false;
	}

	return true;
}

/*
 * Complete the master notifier if possible. This is done when all async
 * sub-devices have been bound; v4l2_device is also available then.
 */
static int v4l2_async_notifier_try_complete(
	struct v4l2_async_notifier *notifier)
{
	/* Quick check whether there are still more sub-devices here. */
	if (!list_empty(&notifier->waiting))
		return 0;

	/* Check the entire notifier tree; find the root notifier first. */
	while (notifier->parent)
		notifier = notifier->parent;

	/* This is root if it has v4l2_dev. */
	if (!notifier->v4l2_dev)
		return 0;

	/* Is everything ready? */
	if (!v4l2_async_notifier_can_complete(notifier))
		return 0;

	return v4l2_async_notifier_call_complete(notifier);
}

static int v4l2_async_notifier_try_all_subdevs(
	struct v4l2_async_notifier *notifier);

static int v4l2_async_match_notify(struct v4l2_async_notifier *notifier,
				   struct v4l2_device *v4l2_dev,
				   struct v4l2_subdev *sd,
				   struct v4l2_async_subdev *asd)
{
	struct v4l2_async_notifier *subdev_notifier;
	int ret;
	struct device *dev;
	dev_err(dev,"v4l2_async_match_notify\n");

	dev_err(dev,"v4l2_async_match_notify v4l2_async_notifier_call_bound start\n");
	ret = v4l2_async_notifier_call_bound(notifier, sd, asd);
	dev_err(dev,"v4l2_async_match_notify v4l2_async_notifier_call_bound end\n");
	if (ret < 0) {
		dev_err(dev,"v4l2_async_match_notify v4l2_device_unregister_subdev\n");
		v4l2_device_unregister_subdev(sd);
		return ret;
	}
	ret = v4l2_device_register_subdev(v4l2_dev, sd);
	dev_err(dev,"v4l2_async_match_notify v4l2_device_register_subdev\n");
	if (ret < 0)
		return ret;
	/* Remove from the waiting list */
	list_del(&asd->list);
	sd->asd = asd;
	sd->notifier = notifier;

	/* Move from the global subdevice list to notifier's done */
	list_move(&sd->async_list, &notifier->done);

	/*
	 * See if the sub-device has a notifier. If not, return here.
	 */
		dev_err(dev,"v4l2_async_match_notify v4l2_async_find_subdev_notifier start\n");
	subdev_notifier = v4l2_async_find_subdev_notifier(sd);
		dev_err(dev,"v4l2_async_match_notify v4l2_async_find_subdev_notifier end\n");
	if (!subdev_notifier || subdev_notifier->parent)
		return 0;

	/*
	 * Proceed with checking for the sub-device notifier's async
	 * sub-devices, and return the result. The error will be handled by the
	 * caller.
	 */
	subdev_notifier->parent = notifier;
	dev_err(dev,"v4l2_async_match_notify end\n");
	return v4l2_async_notifier_try_all_subdevs(subdev_notifier);
}

/* Test all async sub-devices in a notifier for a match. */
static int v4l2_async_notifier_try_all_subdevs(
	struct v4l2_async_notifier *notifier)
{
	struct v4l2_device *v4l2_dev =
		v4l2_async_notifier_find_v4l2_dev(notifier);
	struct v4l2_subdev *sd;

	if (!v4l2_dev)
		return 0;

again:
	list_for_each_entry(sd, &subdev_list, async_list) {
		struct v4l2_async_subdev *asd;
		int ret;

		asd = v4l2_async_find_match(notifier, sd);
		if (!asd)
			continue;

		ret = v4l2_async_match_notify(notifier, v4l2_dev, sd, asd);
		if (ret < 0)
			return ret;

		/*
		 * v4l2_async_match_notify() may lead to registering a
		 * new notifier and thus changing the async subdevs
		 * list. In order to proceed safely from here, restart
		 * parsing the list from the beginning.
		 */
		goto again;
	}

	return 0;
}

static void v4l2_async_cleanup(struct v4l2_subdev *sd)
{
	v4l2_device_unregister_subdev(sd);
	/* Subdevice driver will reprobe and put the subdev back onto the list */
	list_del_init(&sd->async_list);
	sd->asd = NULL;
}

/* Unbind all sub-devices in the notifier tree. */
static void v4l2_async_notifier_unbind_all_subdevs(
	struct v4l2_async_notifier *notifier)
{
	struct v4l2_subdev *sd, *tmp;

	list_for_each_entry_safe(sd, tmp, &notifier->done, async_list) {
		struct v4l2_async_notifier *subdev_notifier =
			v4l2_async_find_subdev_notifier(sd);

		if (subdev_notifier)
			v4l2_async_notifier_unbind_all_subdevs(subdev_notifier);

		v4l2_async_notifier_call_unbind(notifier, sd, sd->asd);
		v4l2_async_cleanup(sd);

		list_move(&sd->async_list, &subdev_list);
	}

	notifier->parent = NULL;
}

/* See if an fwnode can be found in a notifier's lists. */
static bool __v4l2_async_notifier_fwnode_has_async_subdev(
	struct v4l2_async_notifier *notifier, struct fwnode_handle *fwnode)
{
	struct v4l2_async_subdev *asd;
	struct v4l2_subdev *sd;

	list_for_each_entry(asd, &notifier->waiting, list) {
		if (asd->match_type != V4L2_ASYNC_MATCH_FWNODE)
			continue;

		if (asd->match.fwnode == fwnode)
			return true;
	}

	list_for_each_entry(sd, &notifier->done, async_list) {
		if (WARN_ON(!sd->asd))
			continue;

		if (sd->asd->match_type != V4L2_ASYNC_MATCH_FWNODE)
			continue;

		if (sd->asd->match.fwnode == fwnode)
			return true;
	}

	return false;
}

/*
 * Find out whether an async sub-device was set up for an fwnode already or
 * whether it exists in a given notifier before @this_index.
 */
static bool v4l2_async_notifier_fwnode_has_async_subdev(
	struct v4l2_async_notifier *notifier, struct fwnode_handle *fwnode,
	unsigned int this_index)
{
	unsigned int j;

	lockdep_assert_held(&list_lock);

	/* Check that an fwnode is not being added more than once. */
	for (j = 0; j < this_index; j++) {
		struct v4l2_async_subdev *asd = notifier->subdevs[this_index];
		struct v4l2_async_subdev *other_asd = notifier->subdevs[j];

		if (other_asd->match_type == V4L2_ASYNC_MATCH_FWNODE &&
		    asd->match.fwnode ==
		    other_asd->match.fwnode)
			return true;
	}

	/* Check than an fwnode did not exist in other notifiers. */
	list_for_each_entry(notifier, &notifier_list, list)
		if (__v4l2_async_notifier_fwnode_has_async_subdev(
			    notifier, fwnode))
			return true;

	return false;
}

static int __v4l2_async_notifier_register(struct v4l2_async_notifier *notifier)
{
	struct device *dev =
		notifier->v4l2_dev ? notifier->v4l2_dev->dev : NULL;
	struct v4l2_async_subdev *asd;
	int ret;
	int i;

	if (notifier->num_subdevs > V4L2_MAX_SUBDEVS)
		return -EINVAL;

	INIT_LIST_HEAD(&notifier->waiting);
	INIT_LIST_HEAD(&notifier->done);

	mutex_lock(&list_lock);

	for (i = 0; i < notifier->num_subdevs; i++) {
		asd = notifier->subdevs[i];

		switch (asd->match_type) {
		case V4L2_ASYNC_MATCH_CUSTOM:
		case V4L2_ASYNC_MATCH_DEVNAME:
		case V4L2_ASYNC_MATCH_I2C:
			break;
		case V4L2_ASYNC_MATCH_FWNODE:
			if (v4l2_async_notifier_fwnode_has_async_subdev(
				    notifier, asd->match.fwnode, i)) {
				dev_err(dev,
					"fwnode has already been registered or in notifier's subdev list\n");
				ret = -EEXIST;
				goto err_unlock;
			}
			break;
		default:
			dev_err(dev, "Invalid match type %u on %p\n",
				asd->match_type, asd);
			ret = -EINVAL;
			goto err_unlock;
		}
		list_add_tail(&asd->list, &notifier->waiting);
	}

	ret = v4l2_async_notifier_try_all_subdevs(notifier);
	if (ret < 0)
		goto err_unbind;

	ret = v4l2_async_notifier_try_complete(notifier);
	if (ret < 0)
		goto err_unbind;

	/* Keep also completed notifiers on the list */
	list_add(&notifier->list, &notifier_list);

	mutex_unlock(&list_lock);

	return 0;

err_unbind:
	/*
	 * On failure, unbind all sub-devices registered through this notifier.
	 */
	v4l2_async_notifier_unbind_all_subdevs(notifier);

err_unlock:
	mutex_unlock(&list_lock);

	return ret;
}

int v4l2_async_notifier_register(struct v4l2_device *v4l2_dev,
				 struct v4l2_async_notifier *notifier)
{
	int ret;

	if (WARN_ON(!v4l2_dev || notifier->sd))
		return -EINVAL;

	notifier->v4l2_dev = v4l2_dev;

	ret = __v4l2_async_notifier_register(notifier);
	if (ret)
		notifier->v4l2_dev = NULL;

	return ret;
}
EXPORT_SYMBOL(v4l2_async_notifier_register);

int v4l2_async_subdev_notifier_register(struct v4l2_subdev *sd,
					struct v4l2_async_notifier *notifier)
{
	int ret;

	if (WARN_ON(!sd || notifier->v4l2_dev))
		return -EINVAL;

	notifier->sd = sd;

	ret = __v4l2_async_notifier_register(notifier);
	if (ret)
		notifier->sd = NULL;

	return ret;
}
EXPORT_SYMBOL(v4l2_async_subdev_notifier_register);

static void __v4l2_async_notifier_unregister(
	struct v4l2_async_notifier *notifier)
{
	if (!notifier || (!notifier->v4l2_dev && !notifier->sd))
		return;

	v4l2_async_notifier_unbind_all_subdevs(notifier);

	notifier->sd = NULL;
	notifier->v4l2_dev = NULL;

	list_del(&notifier->list);
}

void v4l2_async_notifier_unregister(struct v4l2_async_notifier *notifier)
{
	mutex_lock(&list_lock);

	__v4l2_async_notifier_unregister(notifier);

	mutex_unlock(&list_lock);
}
EXPORT_SYMBOL(v4l2_async_notifier_unregister);

void v4l2_async_notifier_cleanup(struct v4l2_async_notifier *notifier)
{
	unsigned int i;

	if (!notifier || !notifier->max_subdevs)
		return;

	for (i = 0; i < notifier->num_subdevs; i++) {
		struct v4l2_async_subdev *asd = notifier->subdevs[i];

		switch (asd->match_type) {
		case V4L2_ASYNC_MATCH_FWNODE:
			fwnode_handle_put(asd->match.fwnode);
			break;
		default:
			WARN_ON_ONCE(true);
			break;
		}

		kfree(asd);
	}

	notifier->max_subdevs = 0;
	notifier->num_subdevs = 0;

	kvfree(notifier->subdevs);
	notifier->subdevs = NULL;
}
EXPORT_SYMBOL_GPL(v4l2_async_notifier_cleanup);

int v4l2_async_register_subdev(struct v4l2_subdev *sd)
{
	struct v4l2_async_notifier *subdev_notifier;
	struct v4l2_async_notifier *notifier;
	struct device *dev;
	int ret;

	/*
	 * No reference taken. The reference is held by the device
	 * (struct v4l2_subdev.dev), and async sub-device does not
	 * exist independently of the device at any point of time.
	 */
	if (!sd->fwnode && sd->dev)
		sd->fwnode = dev_fwnode(sd->dev);

	mutex_lock(&list_lock);

	INIT_LIST_HEAD(&sd->async_list);
	dev_err(dev,"v4l2_async_register_subdev Entered\n");
	list_for_each_entry(notifier, &notifier_list, list) {
		struct v4l2_device *v4l2_dev =	v4l2_async_notifier_find_v4l2_dev(notifier);
		dev_err(dev,"v4l2_async_notifier_find_v4l2_dev After loop\n");
		struct v4l2_async_subdev *asd;

		if (!v4l2_dev)
		{
			dev_err(dev,"v4l2_async_register_subdev1\n");
			continue;
		}
		asd = v4l2_async_find_match(notifier, sd);
		if (!asd)
		{
			dev_err(dev,"v4l2_async_register_subdev2\n");
			continue;
		}
		ret = v4l2_async_match_notify(notifier, v4l2_dev, sd, asd);
		dev_err(dev,"v4l2_async_match_notify completed\n");
		if (ret)
		{
			dev_err(dev,"v4l2_async_register_subdev3\n");
			goto err_unbind;
		}
		ret = v4l2_async_notifier_try_complete(notifier);
		if (ret)
		{
			dev_err(dev,"v4l2_async_register_subdev4\n");
			goto err_unbind;
		}
		goto out_unlock;
	}
	dev_err(dev,"v4l2_async_register_subdev\n");
	/* None matched, wait for hot-plugging */
	list_add(&sd->async_list, &subdev_list);

out_unlock:
	mutex_unlock(&list_lock);
	dev_err(dev,"v4l2_async_register_subdev out_unlock\n");
	return 0;

err_unbind:
	/*
	 * Complete failed. Unbind the sub-devices bound through registering
	 * this async sub-device.
	 */
	dev_err(dev,"v4l2_async_find_subdev_notifier Entered\n");
	subdev_notifier = v4l2_async_find_subdev_notifier(sd);
	if (subdev_notifier)
		v4l2_async_notifier_unbind_all_subdevs(subdev_notifier);

	if (sd->asd)
		v4l2_async_notifier_call_unbind(notifier, sd, sd->asd);
	v4l2_async_cleanup(sd);

	mutex_unlock(&list_lock);
	dev_err(dev,"v4l2_async_register_subdev End\n");
	return ret;
}
EXPORT_SYMBOL(v4l2_async_register_subdev);

void v4l2_async_unregister_subdev(struct v4l2_subdev *sd)
{
	mutex_lock(&list_lock);

	__v4l2_async_notifier_unregister(sd->subdev_notifier);
	v4l2_async_notifier_cleanup(sd->subdev_notifier);
	kfree(sd->subdev_notifier);
	sd->subdev_notifier = NULL;

	if (sd->asd) {
		struct v4l2_async_notifier *notifier = sd->notifier;

		list_add(&sd->asd->list, &notifier->waiting);

		v4l2_async_notifier_call_unbind(notifier, sd, sd->asd);
	}

	v4l2_async_cleanup(sd);

	mutex_unlock(&list_lock);
}
EXPORT_SYMBOL(v4l2_async_unregister_subdev);

These two files i am referring sir,

Thanking you,

Regards,

Ram

Hi,

Can you please specify which API is causing the system to hang?

Regards,
Parth

Hi sir,

After calling v4l2-async.c file v4l2_async_notifier_call_bound function it is not returning from here return n->ops->bound(n, subdev, asd); after calling this function i am getting vin3a: Port A: Using subdev gs2971 for capture then it will hang.

Thanking you,

Regards,

Ramachndra

Hi Ramachandra,

It is not possible to reproduce and debug this issue on our end and provide a straightforward solution. You have to debug this on your end, but we can definitely support you in the process. 
Please check which operation in n->ops->bound is causing the hang. Without this information it is very difficult to figure out the issue here.

Regards,
Parth

Hi sir,

Actually return n->ops->bound(n, subdev, asd); its hang i will go in deep

thanking you,

Regards,

Ramachandra