This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TDA4VM-Q1: The description about DFTSS0_DFT interrupt

Part Number: TDA4VM-Q1
Other Parts Discussed in Thread: TDA4VM

Dear Support.

There are some 'DFTSS0_DFT_SAFETY' listed in TDA4VM TRM ( as follows). We have known that DFTSS0 was the module in PSC0, but we have no idea what the function of DFTSS0 is and what the meaning of the  'DFTSS0_DFT_SAFETY' interrupt. 

Could you please provide some details for DFTSS0 or tell us which chapter describes related situation?

Thank you for your help, sincerely.

  • Hello,

    DFTSS is referring to the test module that will be used during the post silicon validation. This will be turned off during "normal operation  or functional mode" of the device. To prevent inadvertent test mode entry, DFSS has registers that need to be configured to enter the test mode. These error events are to monitor if there are single-event-upset events that attempt to corrupt the device state to move from functional mode to test mode by switching 4 bits internally reserved for test modes. “dft_safety_signature_123_on_intr” event should indicate single or multiple bit-flips here. Remaining two events are for more details (if only one bit flipped or more).

    Thanks,

    Parvathy