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[FAQ] TMS320C6678: How to run TSIP example on C6678 EVM

Rajarajan Uthayakumar
Expert 4314 points
Part Number: TMS320C6678

How to run TSIP example on C6678 EVM?

  • 0
    TI__Expert 4314 points

    TSIP on C667X devices

    Requirements

    1. TI-RTOS SDK for C667x, version : 6.03.
    2. Code composer studio (CCS)

    Procedure

    1. Make sure CCS, TI-RTOS SDK are installed properly. 
    2. Goto "C:\ti\pdk_c667x_2_0_16\packages" folder in windows explorer and open command prompt by typing "cmd" in address bar.
    3. Create TSIP projects using following command 
      1. C:\ti\pdk_c667x_2_0_16\packages>pdksetupenv.bat
***************************************************
Environment Configuration:
***************************************************
    SDK_INSTALL_PATH        : C:/ti
    PDK_INSTALL_PATH        : C:/ti/pdk_c667x_2_0_16/packages
    GMAKE_INSTALL_PATH      : C:/ti/xdctools_3_55_02_22_core
    PDK_SOC                 : c667x
    PDK_VERSION             : 2_0_16
    RULES_MAKE              : C:/ti/pdk_c667x_2_0_16/packages/ti/build/Rules.make
***************************************************
C:\ti\pdk_c667x_2_0_16\packages>pdkProjectCreate.bat C6678 all little tsip all dsp "C:\ti\pdk_c667x_2_0_16\packages"
=========================================================================
Configuration:
   SOC             :   C6678
   BOARD           :   all
   ENDIAN          :   little
   MODULE          :   tsip
   PROJECT_TYPE    :   all
   PROCESSOR       :   dsp
   PDK_SHORT_NAME  :   "C:\ti\pdk_c667x_2_0_16\packages"
=========================================================================
Checking Configuration...
Complete
=========================================================================
   PDK_PARTNO         : C6678L
   PDK_ECLIPSE_ID     : com.ti.pdk.c667x
   RTSC_PLATFORM_NAME : ti.platforms.evm6678
   RTSC_TARGET        : ti.targets.elf.C66
   CCS_DEVICE         : "com.ti.ccstudio.deviceModel.C6000.GenericC64xPlusDevice"
*****************************************************************************
Detecting all projects in PDK and importing them in the workspace "C:\ti\pdk_c667x_2_0_16\packages"\MyExampleProjects
Detected Test Project: TSIP_evmc6678_c66exampleProject

--------------------------------------------------------------------------------
Creating project 'TSIP_evmc6678_c66exampleProject'...
Done!
      2. First command sets up environment variables,
      3. Second command creates "TSIP test and example" projects in "C:\ti\pdk_c667x_2_0_16\packages\MyExampleProjects" folder.
    4. In CCS, Import the TSIP projects,
      1. Page 1 : File -> Import -> CCS Projects (in Code Composer Studio) -> Next.
      2. Page 2 : Select search-directory -> Browse, goto path "C:\ti\pdk_c667x_2_0_16\packages\MyExampleProjects" and select only TSIP projects in the "Discovered projects" section.
      3. Select the project, right click and select "Rebuild Project", now the project will compile and binaries will be built. 
    5. Create target configuration for "C6678" device,
      1. To view "Target configurations", goto View -> Target configurations.
      2. we can create "user-defined" and "project" based configurations.
      3. Open the the "ccxml" file and In the "Basic" tab, select the type of emulator in "connection" and Processsor in "Board or device".
      4. In Advanced Tab, select the core and select the gel file from "C:\ti\ccs_930\ccs\ccs_base\emulation\boards\evmc6678l\gel" folder.
      5. Make sure the DIP switch settings are in "No Boot" mode to run CCS projects on RAM.
      6. Power ON the board now, then right click on the "ccxml" file created and select "Launch Selected configuration".
    6. Accessing the board,
      1. Connect the ethernet port for enabling TSIP, connection details are shown below.
      2.  
      3. In "Debug" window, select the core (any 1 core is enough), then right click and select "Connect to target", now particular core on the device will be connected. (To get debug window, use "view -> Debug" option).
      4. Goto "Run -> Load -> Select program to Load", In the dialog box, select "from project" and select the "out" created for the TSIP project.
      5. Now the TSIP example whcich runs on "Core 0" will enable port 0 and configure timeslots as shown below.
      6. [C66xx_0] **************************************************
********** TSIP Test Start ***********************
**************************************************
Initialize application buffers.
TSIP driver instance successfully initialized 
-----------------------
TSIP port 0 is powered up
TSIP port instance successfully initialized 
TSIP port 0 super frame interrupt is registered
Enabling TSIP timeslot TX 0x0 RX 0x0... 
TSIP timeslot TX 0x0 RX 0x0 successfully enabled 
Enabling TSIP timeslot TX 0x1 RX 0x1... 
TSIP timeslot TX 0x1 RX 0x1 successfully enabled 
Enabling TSIP timeslot TX 0x2 RX 0x2... 
TSIP timeslot TX 0x2 RX 0x2 successfully enabled 
Enabling TSIP timeslot TX 0x3 RX 0x3... 
TSIP timeslot TX 0x3 RX 0x3 successfully enabled 
Enabling TSIP timeslot TX 0x4 RX 0x4... 
TSIP timeslot TX 0x4 RX 0x4 successfully enabled 
Enabling TSIP timeslot TX 0x5 RX 0x5... 
TSIP timeslot TX 0x5 RX 0x5 successfully enabled 
Enabling TSIP timeslot TX 0x6 RX 0x6... 
TSIP timeslot TX 0x6 RX 0x6 successfully enabled 
Enabling TSIP timeslot TX 0x7 RX 0x7... 
TSIP timeslot TX 0x7 RX 0x7 successfully enabled 
Enabling TSIP timeslot TX 0x8 RX 0x8... 
TSIP timeslot TX 0x8 RX 0x8 successfully enabled 
Enabling TSIP timeslot TX 0x9 RX 0x9... 
TSIP timeslot TX 0x9 RX 0x9 successfully enabled 
Enabling TSIP timeslot TX 0xa RX 0xa... 
TSIP timeslot TX 0xa RX 0xa successfully enabled 
Enabling TSIP timeslot TX 0xb RX 0xb... 
TSIP timeslot TX 0xb RX 0xb successfully enabled 
Enabling TSIP timeslot TX 0xc RX 0xc... 
TSIP timeslot TX 0xc RX 0xc successfully enabled 
Enabling TSIP timeslot TX 0xd RX 0xd... 
TSIP timeslot TX 0xd RX 0xd successfully enabled 
Enabling TSIP timeslot TX 0xe RX 0xe... 
TSIP timeslot TX 0xe RX 0xe successfully enabled 
Enabling TSIP timeslot TX 0xf RX 0xf... 
TSIP timeslot TX 0xf RX 0xf successfully enabled 
Enabling TSIP timeslot TX 0x10 RX 0x10... 
TSIP timeslot TX 0x10 RX 0x10 successfully enabled 
Enabling TSIP timeslot TX 0x11 RX 0x11... 
TSIP timeslot TX 0x11 RX 0x11 successfully enabled 
Enabling TSIP timeslot TX 0x12 RX 0x12... 
TSIP timeslot TX 0x12 RX 0x12 successfully enabled 
Enabling TSIP timeslot TX 0x13 RX 0x13... 
TSIP timeslot TX 0x13 RX 0x13 successfully enabled 
Enabling TSIP timeslot TX 0x14 RX 0x14... 
TSIP timeslot TX 0x14 RX 0x14 successfully enabled 
Enabling TSIP timeslot TX 0x15 RX 0x15... 
TSIP timeslot TX 0x15 RX 0x15 successfully enabled 
Enabling TSIP timeslot TX 0x16 RX 0x16... 
TSIP timeslot TX 0x16 RX 0x16 successfully enabled 
Enabling TSIP timeslot TX 0x17 RX 0x17... 
TSIP timeslot TX 0x17 RX 0x17 successfully enabled 
Enabling TSIP timeslot TX 0x18 RX 0x18... 
TSIP timeslot TX 0x18 RX 0x18 successfully enabled 
Enabling TSIP timeslot TX 0x19 RX 0x19... 
TSIP timeslot TX 0x19 RX 0x19 successfully enabled 
Enabling TSIP timeslot TX 0x1a RX 0x1a... 
TSIP timeslot TX 0x1a RX 0x1a successfully enabled 
Enabling TSIP timeslot TX 0x1b RX 0x1b... 
TSIP timeslot TX 0x1b RX 0x1b successfully enabled 
Enabling TSIP timeslot TX 0x1c RX 0x1c... 
TSIP timeslot TX 0x1c RX 0x1c successfully enabled 
Enabling TSIP timeslot TX 0x1d RX 0x1d... 
TSIP timeslot TX 0x1d RX 0x1d successfully enabled 
Enabling TSIP timeslot TX 0x1e RX 0x1e... 
TSIP timeslot TX 0x1e RX 0x1e successfully enabled 
Enabling TSIP timeslot TX 0x1f RX 0x1f... 
TSIP timeslot TX 0x1f RX 0x1f successfully enabled 
TSIP Port 0 configured
-----------------------
TSIP data transfer...

    Thanks,

    Rajarajan U