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TDA4VM: Pcie mode configuration for linux systems

Cherry Zhou
Mastermind 22235 points
Part Number: TDA4VM

Hi team,

https://software-dl.ti.com/jacinto7/esd/processor-sdk-linux-jacinto7/08_00_00_08/exports/docs/linux/Foundational_Components/Kernel/Kernel_Drivers/PCIe/PCIe_End_Point.html

The customer needs to configure the k3-j721e-common-proc-board.dts and k3-j721e-proc-board-tps65917.dts files, but the document above does not match the code they are using(linux-5.4.106+gitAUTOINC+023faefa70-g023faefa70).

Could you help check this case or give some advices? Thanks.

Best Regards,

Cherry

  • 0
    TI__Mastermind 22235 points

    Hi,

    May I know is there any updates?

    Thanks and Best Regards,

    Cherry

  • 0 in reply to Cherry Zhou
    TI__Mastermind 22235 points

    Hi,

    I have noticed that you are out of office and the info below just the updates in case you can look into this when you come back:

    The customer are doing Qualcomm 8155 PCIe communication with TDA, the TDA side is configured in EP mode, and trying to configure it now, but LS /sys/class/pci_epc/ is empty after execution, so do not know how to do next step.

    Thanks and expecting your response.

    Best,

    Cherry

  • 0 in reply to Cherry Zhou
    TI__Mastermind 22235 points

    Hi,

    The new info is as follows:

    The customer has configured to EP mode, but cannot scan the TDA device for the opposite end. And the customer would like to confirm, under what conditions can the TDA side be scanned to? Or may I know is there any principle?

    Thanks and Best Regards,

    Cherry

  • 0 in reply to Cherry Zhou
    TI__Mastermind 23125 points

    Cherry, 

    Sorry for the delayed response. 

    I assume the issue is that the RootComplex can not detect TDA4 device, when TDA4 is in EP mode, please correct me if I misunderstood. 

    If this is the problem, please confirm:

    1. Did they connect a PERST reset signal from the RC to TDA4? Note the SDK UG page described a EVM-EVM interconnection where there is no PERST connected.

    2. If the Qualcomm processor host provide a standard PCIe slot, please try to start the TDA4 device first, then boot up the host. This is to ensure the TDA4 is in LTSSM link ready state when the host tries to detect the device in its PCIe slot. 

    Jian

  • 0 in reply to jian35385
    TI__Mastermind 22235 points

    Hi Jian,

    Thanks for your response! And I have updated to the customer. Here's some new info:

    After outputting the Qualcomm reset signal, the signal remains low. And the customer would like to know how to determine the status of the TDA.

    Currently, training fails after scan of the SA8155 RC-side to LTSSM_POL_ACTIVE. Normal the next step is to enter polling.configuration.

    The SA8155 transmit logic first sends a 1024 TS sequence to the opposite end, so that the device can enter polling.configuration if the TDA receive logic receives eight consecutive messages correctly.

    For now, the SA8155 does transmit, then how to debug the TDA side ?

    jian35385 said:
    1. Did they connect a PERST reset signal from the RC to TDA4? Note the SDK UG page described a EVM-EVM interconnection where there is no PERST connected.

    After the TDA side is configured, restart the RC side (as it is the same block board) and jump to the status PCIe RC1: LTSSM_STATE: LTSSM_PRE_DETECT_QUIET.

    For the Perst reset signal of the RC, there was no connection before, but after connecting, the TDA start-up was affected, and even after the TDA start-up was normal, connecting the Perst reset signal to restart the RC side would cause a TDA abnormality.

    Is there any reference for the connection? Or just connect directly?

    Does TDA output clkreq as EP?  If so, when to output?

    Thanks and Best Regards,

    Cherry

  • 0 in reply to Cherry Zhou
    TI__Mastermind 22235 points

    Hi Jian,

    May I know is there any updates regarding my last post?

    Thanks and Best Regards,

    Cherry