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TDA4VM: How to load the app of mcu1_1,mcu2_0,mcu2-1,etc from SD card?

Part Number: TDA4VM
Other Parts Discussed in Thread: SYSBIOS

Situation:

I have made an SD card according to the document and start the app of mcu1_0 from the SD card successfully . However ,I can't start other kernels' app, such as mcu1_1,mcu2_0,mcu2-1,etc from SD card.

Question:

1.Does every kernel need an SBL file?

2.Is sbl_mmcsd_img_mcu1_0_release.tiimage only for mcu1_0?

3.How to load the app of mcu1_1,mcu2_0,mcu2-1,etc from SD card? 

  • Hi Tan Yang,

    Does every kernel need an SBL file?

     Each core does not need a separate SBL, sbl_mmcsd_img_mcu1_0_release.tiimage will take care of booting the cores that are needed by the application.

    How to load the app of mcu1_1,mcu2_0,mcu2-1,etc from SD card? 

    You can load the app for mcu1_1, mcu2_0 and mcu2_1 the same way you loaded mcu1_0. 

    1) Flash sbl_mmcsd_img_mcu1_0_release.tiimage, tifs, and application on SD card.
    2) Rename sbl_mmcsd_img_mcu1_0_release.tiimage to tiboot3.bin
    3) Rename the application to app

    Please note that for mcu2_0, mcu2_1 you will get the logs on MAIN UART port.

    Regards,
    Parth

  • I use the following command to stitch the can_profile_app_tirtos_mcu1_0_release.rprc and can_profile_app_tirtos_mcu2_1_release.rprc  into a multicore image.

    Then, I copy the output.appimage into SDcard and name it as app. However,  I can't see anything on the URAT log. 

    Besides, we found that it loaded the app of mcu2_1 into mcu1_0 when we boot a demo app of mcu2_1 from SDcard.

  • Hi Tan Yang,

    Can you please increase the log level in SBL from <pdkInstallPath>\packages\ti\boot\sbl\sbl_component.mk and share the logs while booting your multi-core image?

    Regards,
    Parth

  • Hi Parth Nagpal,

    I have changed the log level to 3 as the following figure.

    Then, I perform the command make sbl_mmcsd_img again  and copy the sbl_mmcsd_img_mcu1_0_release.tiimage to SD card as tiboot3.bin .

    However, I still see any other useful information  while booting my multi-core image.

  • Hi,

    You would have to rebuild SBL and its dependent libraries.. 

    I would suggest to remove pdk/packages/ti/binary and pdk/packages/ti/boot/sbl/lib folders and then rebuild SBL and its libraries with this change.

    Regards,

    Brijesh

  • Hi,

    I set my environment using pdksetupenv.sh like the following figure.

    Then, I remove pdk/packages/ti/binary and pdk/packages/ti/boot/sbl/lib folders and then rebuild SBL using the command make clear all under the folder <PDK>/packages/ti/boot/sbl/build.

    After about two hours, the compilation is over.

    However, there are many errors while executing the command.

    Regards,

    Tan yang

  • Hi Tan Yang,

    make clear command removes some dependencies, you just needed to remove pdk/packages/ti/binary and pdk/packages/ti/boot/sbl/lib folders and rebuild the library and binary again. 

    However did you get the SBL image or not? If yes, can you please try to boot and share the logs.

    Regards,
    Parth

  • Another ways is to clean just sbl images, using below commands

    make sbl_mmcsd_img_clean

    make sbl_lib_mmcsd_clean

    Regards,

    Brijesh

  • Hi,

    I get the new SBL image which is about 286 KB.

    Then, I copy it to the BOOT partition as tiboot3.bin.

    I try to start three apps separately. They are can_profile_app_tirtos_mcu1_0_release.appimage, can_profile_app_tirtos_mcu2_1_release.appimagecan_profile_app_mcu_1_0_2_1.appimage which is the combination of can_profile_app_tirtos_mcu1_0_release.rprc and can_profile_app_tirtos_mcu2_1_release.rprc .

    I upload their uart log ,you can see some information about them. 

    Besides, I don't know why that the information is printed by COM6 and COM7 while I start the  can_profile_app_tirtos_mcu2_1_release.appimage.

    can_profile_app_tirtos_mcu1_0_release.txt
    SBL Revision: 01.00.10.01 (Dec  2 2021 - 09:21:20)
    TIFS  ver: 21.5.0--v2021.05 (Terrific Llam
    SCISERVER Board Configuration header population... PASSED
    Sciclient_setBoardConfigHeader... PASSED
    Efuse xlated: VD 2 to 800 mV (OppVid: 0x37, Slave:0x48, Res:0x0)
    Successfully set voltage to 800 mV for Slave:0x48, Res:0x0
    Initlialzing PLLs ...done.
    InitlialzingClocks ...done.
    Initlialzing DDR ...done.
    Initializing GTC ...Begin parsing user application
    Calling Sciclient_procBootRequestProcessor, ProcId 0x20...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x21...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x6...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x7...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x8...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x9...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x3...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x4...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x30...
    Searching for X509 certificate ...not found
    Switching core id 4, proc_id 0x1 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Sciclient_procBootSetProcessorCfg, ProcId 0x1, enabling split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Enabling MCU TCMs after reset for core 4
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Copying 0x40 bytes to 0x41010000
    Copying 0x28 bytes to 0x41010040
    Copying 0x1a300 bytes to 0x41c82000
    Copying 0x5084 bytes to 0x41c9c300
    Copying 0x3120 bytes to 0x41ca1384
    Copying 0x1900 bytes to 0x41ca4500
    Copying 0x200 bytes to 0x41ca8980
    Copying 0x200 bytes to 0x41ca8b80
    Copying 0x200 bytes to 0x41ca8d80
    Copying 0xa30 bytes to 0x41ce2ad8
    Copying 0xe5e0 bytes to 0x700600a0
    Copying 0x4710 bytes to 0x70073b80
    Copying 0x2000 bytes to 0x707ee000
    Setting entry point for core 4 @0x41010000
    Sciclient_procBootReleaseProcessor, ProcId 0x20...
    Sciclient_procBootReleaseProcessor, ProcId 0x21...
    Sciclient_procBootReleaseProcessor, ProcId 0x1...
    Sciclient_procBootReleaseProcessor, ProcId 0x2...
    Sciclient_procBootReleaseProcessor, ProcId 0x6...
    Sciclient_procBootReleaseProcessor, ProcId 0x7...
    Sciclient_procBootReleaseProcessor, ProcId 0x8...
    Sciclient_procBootReleaseProcessor, ProcId 0x9...
    Sciclient_procBootReleaseProcessor, ProcId 0x3...
    Sciclient_procBootReleaseProcessor, ProcId 0x4...
    Sciclient_procBootReleaseProcessor, ProcId 0x30...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Sciclient_procBootSetProcessorCfg, ProcId 0x1, EntryPoint 0x41010000...
    Sciclient_pmSetModuleClkFreq, DevId 0xfa @ 1000000000Hz...
    Copying first 128 bytes from app to MCU ATCM @ 0x0 for core 4
    Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
    Skipping Sciclient_procBootSetProcessorCfg for ProcId 0x2, EntryPoint 0xfffffffe...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Starting Sciserver..... PASSED
    CAN Profile App:Variant - Pre Compile being used !!!
    CAN Profile App: Successfully Enabled CAN Transceiver MCU MCAN0!!!
    CAN Profile App: Successfully Enabled CAN Transceiver MCU MCAN1!!!
    CAN Profile App:Will Transmit & Receive (Internal-loopback) 10000 Messages, 2 times
    CAN Profile App:NOTE : Operating in interrupt mode!
    CAN Profile App:Transmit & Receive (Internal-loopback)  10000 packets 2 times
    CAN Profile App:Average of 86.37743 usecs per packet
    CAN Profile App:Average of 11501 packets in 1 second with CPU Load 5.379601%
    CAN Profile App:Packets sent: 20000, Packets recv: 20000 in total time: 3477743 us
    CAN Profile App:Measured Load: Total CPU: 5.733925%, HWI: 3.933855%, SWI:0.027721% TSK: 1.418025%
    CAN Profile App:Message Id Received c00000c0 Message Length is 64
    CAN Profile App:Test completed for 0 instance
    
    CAN Profile App: 8192 bytes used for stack
    CAN Profile App:Profiling completes sucessfully!!!
    
    
    can_profile_app_tirtos_mcu2_1_release.docx
    can_profile_app_mcu_1_0_2_1.txt
    SBL Revision: 01.00.10.01 (Dec  2 2021 - 09:21:20)
    TIFS  ver: 21.5.0--v2021.05 (Terrific Llam
    SCISERVER Board Configuration header population... PASSED
    Sciclient_setBoardConfigHeader... PASSED
    Efuse xlated: VD 2 to 800 mV (OppVid: 0x37, Slave:0x48, Res:0x0)
    Successfully set voltage to 800 mV for Slave:0x48, Res:0x0
    Initlialzing PLLs ...done.
    InitlialzingClocks ...done.
    Initlialzing DDR ...done.
    Initializing GTC ...Begin parsing user application
    Calling Sciclient_procBootRequestProcessor, ProcId 0x20...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x21...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x6...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x7...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x8...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x9...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x3...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x4...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x30...
    Searching for X509 certificate ...not found
    Switching core id 4, proc_id 0x1 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Sciclient_procBootSetProcessorCfg, ProcId 0x1, enabling split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Enabling MCU TCMs after reset for core 4
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Copying 0x40 bytes to 0x41010000
    Copying 0x28 bytes to 0x41010040
    Copying 0x1a300 bytes to 0x41c82000
    Copying 0x5084 bytes to 0x41c9c300
    Copying 0x3120 bytes to 0x41ca1384
    Copying 0x1900 bytes to 0x41ca4500
    Copying 0x200 bytes to 0x41ca8980
    Copying 0x200 bytes to 0x41ca8b80
    Copying 0x200 bytes to 0x41ca8d80
    Copying 0xa30 bytes to 0x41ce2ad8
    Copying 0xe5e0 bytes to 0x700600a0
    Copying 0x4710 bytes to 0x70073b80
    Copying 0x2000 bytes to 0x707ee000
    Setting entry point for core 4 @0x41010000
    Switching core id 6, proc_id 0x6 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
    Sciclient_procBootSetProcessorCfg, ProcId 0x6, enabling split mode...
    Sciclient_pmSetModuleState Off, DevId 0xf6...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x7...
    Enabling MCU TCMs after reset for core 7
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Setting HALT for ProcId 0x7...
    Sciclient_pmSetModuleState On, DevId 0xf6...
    Clearing core_id 7 (lock-step) ATCM @ 0x5d00000
    
    
    
    
    
    
    
    
    
    
    

    Regrads,

    Tan Yang

  • Hi Tan Yang,

    Sorry, did not get your issue.

    I see in the above log the CAN profile application is finishing correctly.

    CAN Profile App: 8192 bytes used for stack
    CAN Profile App:Profiling completes sucessfully!!!

    Regards,

    Brijesh

  • Hi Brijesh Jadav,

     The app of  can_profile_app_tirtos_mcu1_0_release.appimage can be booted  from the SD card successfully .

    However ,I can't start can_profile_app_mcu_1_0_2_1.appimage which is  the combination of can_profile_app_tirtos_mcu1_0_release.rprc and can_profile_app_tirtos_mcu2_1_release.rprc .

    I use the following command to generate the can_profile_app_mcu_1_0_2_1.appimage .

    The uart log can be seen in the following text file named can_profile_app_mcu_1_0_2_1.

    6330.can_profile_app_mcu_1_0_2_1.txt
    SBL Revision: 01.00.10.01 (Dec  2 2021 - 09:21:20)
    TIFS  ver: 21.5.0--v2021.05 (Terrific Llam
    SCISERVER Board Configuration header population... PASSED
    Sciclient_setBoardConfigHeader... PASSED
    Efuse xlated: VD 2 to 800 mV (OppVid: 0x37, Slave:0x48, Res:0x0)
    Successfully set voltage to 800 mV for Slave:0x48, Res:0x0
    Initlialzing PLLs ...done.
    InitlialzingClocks ...done.
    Initlialzing DDR ...done.
    Initializing GTC ...Begin parsing user application
    Calling Sciclient_procBootRequestProcessor, ProcId 0x20...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x21...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x6...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x7...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x8...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x9...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x3...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x4...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x30...
    Searching for X509 certificate ...not found
    Switching core id 4, proc_id 0x1 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Sciclient_procBootSetProcessorCfg, ProcId 0x1, enabling split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Enabling MCU TCMs after reset for core 4
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Copying 0x40 bytes to 0x41010000
    Copying 0x28 bytes to 0x41010040
    Copying 0x1a300 bytes to 0x41c82000
    Copying 0x5084 bytes to 0x41c9c300
    Copying 0x3120 bytes to 0x41ca1384
    Copying 0x1900 bytes to 0x41ca4500
    Copying 0x200 bytes to 0x41ca8980
    Copying 0x200 bytes to 0x41ca8b80
    Copying 0x200 bytes to 0x41ca8d80
    Copying 0xa30 bytes to 0x41ce2ad8
    Copying 0xe5e0 bytes to 0x700600a0
    Copying 0x4710 bytes to 0x70073b80
    Copying 0x2000 bytes to 0x707ee000
    Setting entry point for core 4 @0x41010000
    Switching core id 6, proc_id 0x6 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
    Sciclient_procBootSetProcessorCfg, ProcId 0x6, enabling split mode...
    Sciclient_pmSetModuleState Off, DevId 0xf6...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x7...
    Enabling MCU TCMs after reset for core 7
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Setting HALT for ProcId 0x7...
    Sciclient_pmSetModuleState On, DevId 0xf6...
    Clearing core_id 7 (lock-step) ATCM @ 0x5d00000
    
    
    
    
    
    
    
    
    
    
    

  • Hi,Brijesh

    First, I use the following command to build the can_profile_app of mcu2_1 and generate can_profile_app_tirtos_mcu1_0_release.appimage, 

    can_profile_app_tirtos_mcu2_1_release.rprc ,can_profile_app_tirtos_mcu2_1_release.xer5f ...

    make -s can_profile_app BOARD=j721e_evm SOC=j721e BUILD_PROFILE=release CORE=mcu2_1 BUILD_OS_TYPE=tirtos

    The following figure shows it's result of execution. We can see the LOADADDR is 0x41c00100 and IMAGE_SIZE is 346572.

     

    Then, I call the K3ImageGen script  to convert the can_profile_app_tirtos_mcu2_1_release.xer5f  to a SBL loadable image. The following figure shows it's result of execution. 

     We can see the LOADADDR is 0x00000000 and IMAGE_SIZE is 154368 !!!

    They are different from above !!!

    Therefore , I think the reason why we can't  start a multicore image by sd card is that.

    Regards

    Tan Yang

  • Hi Tan Yang,

    Are both of these application using same memory map? Could you please share the map file?

    SBL can definitely load two applications, one on mcu1_0 and other on mcu2_1.. We need to make sure both the applications resources are not conflicting. 

    Regards,

    Brijesh

  • Hi Brijesh,

    I upload can_profile_app_tirtos_mcu1_0_release.xer5f.map and can_profile_app_tirtos_mcu2_1_release.xer5f.map. You can check and compare them.

    can_profile_app_tirtos_mcu1_0_release.xer5f.map.txtcan_profile_app_tirtos_mcu2_1_release.xer5f.map.txt

    I am sorry that I  make a small mistake in above description. Now I correct it as described below.

    First, I use the following command to build the can_profile_app of mcu2_1 and generate can_profile_app_tirtos_mcu2_1_release.appimage, 

    can_profile_app_tirtos_mcu2_1_release.rprc ,can_profile_app_tirtos_mcu2_1_release.xer5f ...

    make -s can_profile_app BOARD=j721e_evm SOC=j721e BUILD_PROFILE=release CORE=mcu2_1 BUILD_OS_TYPE=tirtos

    The following figure shows it's result of execution. We can see the LOADADDR is 0x41c00100 and IMAGE_SIZE is 346572.

     

    Then, I call the K3ImageGen.sh script  to convert the can_profile_app_tirtos_mcu2_1_release.xer5f  to a SBL loadable image. The following figure shows it's result of execution. 

     We can see the LOADADDR is 0x00000000 and IMAGE_SIZE is 154368 !!!

    They are different from above !!!

    Therefore , I think the reason why we can't  start a multicore image by sd card is that.

     

    In my opinion , the problem occurred while I run the K3ImageGen.sh script.

    Please help me to check  that ,thank you .

    Regards

    Tan Yang

  • Hi Tan Yang,

    But i think there is no need to run multi-core app image gen utility. The AppImage for can_profile_app is by default getting generated. 

    I used below commands and found appimage for can_profile_app under mcusw/binary/can_profile_app/bin/j721e_evm/ folder.

    make -s can_profile_app BOARD=j721e_evm SOC=j721e BUILD_PROFILE=release CORE=mcu2_1 BUILD_OS_TYPE=tirtos

    make -s can_profile_app BOARD=j721e_evm SOC=j721e BUILD_PROFILE=release CORE=mcu1_0 BUILD_OS_TYPE=tirtos

    The above two commands generate below files..

    In addition, i see in your map file, that you are using MSMC RAM for storing code section for mcu2_1, starting at the address 0x70000000. Can you please move this address at 1MB offset, ie 0x70000000 + 1MB? 

    Regards,

    Brijesh

  • Hi Brijesh,

    I know that the AppImage for can_profile_app is by default getting generated.

    I just want to verify  the ways which convert the  ELF executables to SBL loadable image. 

    Finally , I found that the .appimage generated by these methods cannot be successfully booted by the SD card.

    And then ,  I don't know how to move the address at 1MB offset, ie 0x70000000 + 1MB .

    Regards,

    Tan Yang

  • Hi Tan Yang,

    Linked command file is specified in the Makefile, so the make file for can profile application is ti-processor-sdk-rtos-j721e-evm-07_03_00_07\mcusw\mcuss_demos\profiling\can\makefile and below line provides the for the linker command file. 

    EXTERNAL_LNKCMD_FILE_LOCAL = overrides/$(SOC)/$(CORE)/linker_r5_sysbios.lds.

    So you could change the offsets in file ti-processor-sdk-rtos-j721e-evm-07_03_00_07\mcusw\mcuss_demos\profiling\can\overrides\j721e\mcu2_1\linker_r5_sysbios.lds.

    Regards,

    Brijesh

  • Hi Brijesh,

    I upload two uart logs about  can_profile_app of mcu2_1.

    One uart log named can_profile_app_tirtos_mcu2_1_release is about  the app generated by the following command 

    make -s can_profile_app BOARD=j721e_evm SOC=j721e BUILD_PROFILE=release CORE=mcu2_1 BUILD_OS_TYPE=tirtos

    It indicates that the app generated by the above command is successfully loaded into mcu2_1 by SBL.

    5531.can_profile_app_tirtos_mcu2_1_release.docx

    the other uart  log named can_profile_app_mcu2_1_rprctoappimage is about app generated by the following command

    ./MulticoreImageGen LE 55 can_2_1.appimage 7 can_profile_app_tirtos_mcu2_1_release.rprc

    It indicates that the app generated by the above command has not been successfully loaded into mcu2_1 by SBL.

    can_profile_app_mcu2_1_rprctoappimage.txt
    SBL Revision: 01.00.10.01 (Dec  2 2021 - 14:00:55)
    TIFS  ver: 21.5.0--v2021.05 (Terrific Llam
    SCISERVER Board Configuration header population... PASSED
    Sciclient_setBoardConfigHeader... PASSED
    Efuse xlated: VD 2 to 800 mV (OppVid: 0x37, Slave:0x48, Res:0x0)
    Successfully set voltage to 800 mV for Slave:0x48, Res:0x0
    Initlialzing PLLs ...done.
    InitlialzingClocks ...done.
    Initlialzing DDR ...done.
    Initializing GTC ...Begin parsing user application
    Calling Sciclient_procBootRequestProcessor, ProcId 0x20...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x21...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x6...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x7...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x8...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x9...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x3...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x4...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x30...
    Searching for X509 certificate ...not found
    Switching core id 6, proc_id 0x6 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
    Sciclient_procBootSetProcessorCfg, ProcId 0x6, enabling split mode...
    Sciclient_pmSetModuleState Off, DevId 0xf6...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x7...
    Enabling MCU TCMs after reset for core 7
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Setting HALT for ProcId 0x7...
    Sciclient_pmSetModuleState On, DevId 0xf6...
    Clearing core_id 7 (lock-step) ATCM @ 0x5d00000
    
    
    
     So, please help me analyze the reason why the app generated by the MulticoreImageGen  cannot be successfully loaded by SBL.

    Regards

    Tan Yang

  • Hi Tan Yang,

    I used the CSIRX example to generate the appimage for the mcu2_1 and found few differences in invoking the multicore image gen utility.

    1, when you generate appimage for mcu2_1, we need to provide dummy image for the mcu2_0 also.. You could dummy image in pdk_jacinto_08_00_00_37/packages/ti/build/j721e/sbl_mcux_0_dummy_app.rprc folder. 

    2, If you are just running SBL on mcu1_0, You would also require to include SciServer to be running on mcu1_0 after SBL finishes. SciServer can be found in pdk_jacinto_08_00_00_37/packages/ti/drv/sciclient/tools/ccsLoadDmsc/j721e/sciserver_testapp_freertos_mcu1_0_release.rprc. 

    So overall this command becomes

    MulticoreImageGen LE 55 csirx_capture_testapp_freertos_mcu2_1_release.appimage 4 sciserver_testapp_freertos_mcu1_0_release.rprc 6 sbl_mcux_0_dummy_app.rprc  7 csirx_capture_testapp_freertos_mcu2_1_release.rprc..

    So can you try above format and regenerate application image for mcu2_1 and try it out?

    Regards,

    Brijesh

  • Hi Brijesh,

    Thank you very much !

    I use the following command to generate the app about can_profile_app of mcu2_1

    MulticoreImageGen LE 55 can_app_profile_mcu2_1_release.appimage 

    4 sciserver_testapp_tirtos_mcu1_0_release.rprc 6 sbl_mcux_0_dummy_app.rprc  7 can_profile_app_tirtos_mcu2_1_release.rprc

    Then,I verified the app can be load to the mcu2_1 successfully by the SD card.

    However, I can't start can_profile_app_mcu_1_0_2_1.appimage which is  the combination of can_profile_app_tirtos_mcu1_0_release.rprc and can_profile_app_tirtos_mcu2_1_release.rprc .

    I use the following command to generate the can_profile_app_mcu_1_0_2_1.appimage .

    The uart log can be seen in the following text file named can_profile_app_mcu_1_0_2_1.

    3051.can_profile_app_mcu_1_0_2_1.txt
    SBL Revision: 01.00.10.01 (Dec  2 2021 - 09:21:20)
    TIFS  ver: 21.5.0--v2021.05 (Terrific Llam
    SCISERVER Board Configuration header population... PASSED
    Sciclient_setBoardConfigHeader... PASSED
    Efuse xlated: VD 2 to 800 mV (OppVid: 0x37, Slave:0x48, Res:0x0)
    Successfully set voltage to 800 mV for Slave:0x48, Res:0x0
    Initlialzing PLLs ...done.
    InitlialzingClocks ...done.
    Initlialzing DDR ...done.
    Initializing GTC ...Begin parsing user application
    Calling Sciclient_procBootRequestProcessor, ProcId 0x20...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x21...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x6...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x7...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x8...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x9...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x3...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x4...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x30...
    Searching for X509 certificate ...not found
    Switching core id 4, proc_id 0x1 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Sciclient_procBootSetProcessorCfg, ProcId 0x1, enabling split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Enabling MCU TCMs after reset for core 4
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Copying 0x40 bytes to 0x41010000
    Copying 0x28 bytes to 0x41010040
    Copying 0x1a300 bytes to 0x41c82000
    Copying 0x5084 bytes to 0x41c9c300
    Copying 0x3120 bytes to 0x41ca1384
    Copying 0x1900 bytes to 0x41ca4500
    Copying 0x200 bytes to 0x41ca8980
    Copying 0x200 bytes to 0x41ca8b80
    Copying 0x200 bytes to 0x41ca8d80
    Copying 0xa30 bytes to 0x41ce2ad8
    Copying 0xe5e0 bytes to 0x700600a0
    Copying 0x4710 bytes to 0x70073b80
    Copying 0x2000 bytes to 0x707ee000
    Setting entry point for core 4 @0x41010000
    Switching core id 6, proc_id 0x6 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
    Sciclient_procBootSetProcessorCfg, ProcId 0x6, enabling split mode...
    Sciclient_pmSetModuleState Off, DevId 0xf6...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x7...
    Enabling MCU TCMs after reset for core 7
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Setting HALT for ProcId 0x7...
    Sciclient_pmSetModuleState On, DevId 0xf6...
    Clearing core_id 7 (lock-step) ATCM @ 0x5d00000
    
    
    
    
    
    
    
    
    
    
    

    So, please help me analyze the reason why the app generated by the MulticoreImageGen  cannot be successfully loaded by SBL.

    Regards

    Tan Yang

  • Hi Tan Yang,

    Can you please include dummp rprc for mcu2_0, 6 sbl_mcux_0_dummy_app.rprc, in your command? This is required, without having mcu2_0, image on mcu2_1 cannot be loaded.

    Regards,

    Brijesh

  • Hi Brijesh,

    I have tried the way you said .

    The results show that can_profile_app_tirtos_mcu1_0_release can run normally from SD card.

    However, can_profile_app_tirtos_mcu2_1_release can't run on mcu2_1,I can't see it's  information on all COM ports.

    I tried the following methods and got the related serial port printing information.

    First:

    ./MulticoreImageGen LE 55 can1_0_2_1_first.appimage 4 can_profile_app_tirtos_mcu1_0_release.rprc 6 sbl_mcux_0_dummy_app.rprc 7 can_profile_app_tirtos_mcu1_0_release

    CAN_Profile_1_0_2_1_first.txt
    SBL Revision: 01.00.10.01 (Dec  2 2021 - 14:02:22)
    TIFS  ver: 21.5.0--v2021.05 (Terrific Llam
    SCISERVER Board Configuration header population... PASSED
    Sciclient_setBoardConfigHeader... PASSED
    Efuse xlated: VD 2 to 800 mV (OppVid: 0x37, Slave:0x48, Res:0x0)
    Successfully set voltage to 800 mV for Slave:0x48, Res:0x0
    Initlialzing PLLs ...done.
    InitlialzingClocks ...done.
    Initlialzing DDR ...done.
    Initializing GTC ...Begin parsing user application
    Calling Sciclient_procBootRequestProcessor, ProcId 0x20...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x21...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x6...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x7...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x8...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x9...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x3...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x4...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x30...
    Searching for X509 certificate ...not found
    Switching core id 4, proc_id 0x1 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Sciclient_procBootSetProcessorCfg, ProcId 0x1, enabling split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Enabling MCU TCMs after reset for core 4
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Copying 0x40 bytes to 0x41010000
    Copying 0x28 bytes to 0x41010040
    Copying 0x1a2e0 bytes to 0x41c82000
    Copying 0x5084 bytes to 0x41c9c2e0
    Copying 0x3120 bytes to 0x41ca1364
    Copying 0x1900 bytes to 0x41ca4500
    Copying 0x200 bytes to 0x41ca8980
    Copying 0x200 bytes to 0x41ca8b80
    Copying 0x200 bytes to 0x41ca8d80
    Copying 0xa30 bytes to 0x41ce2ad8
    Copying 0xe5e0 bytes to 0x700600a0
    Copying 0x4710 bytes to 0x70073b80
    Copying 0x2000 bytes to 0x707ee000
    Setting entry point for core 4 @0x41010000
    Switching core id 6, proc_id 0x6 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
    Sciclient_procBootSetProcessorCfg, ProcId 0x6, enabling split mode...
    Sciclient_pmSetModuleState Off, DevId 0xf5...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
    Enabling MCU TCMs after reset for core 6
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Setting HALT for ProcId 0x6...
    Sciclient_pmSetModuleState On, DevId 0xf5...
    Clearing core_id 6 (lock-step) ATCM @ 0x5c00000
    Clearing core_id 6 (lock-step) BTCM @ 0x5c10000
    Translating coreid 6 local BTCM addr 0x41010000 to SoC MCU BTCM addr 0x5c10000
    Copying 0x1e80 bytes to 0x5c10000
    Translating coreid 6 local BTCM addr 0x41011e80 to SoC MCU BTCM addr 0x5c11e80
    Copying 0x598 bytes to 0x5c11e80
    Translating coreid 6 local BTCM addr 0x41012418 to SoC MCU BTCM addr 0x5c12418
    Copying 0x420 bytes to 0x5c12418
    Translating coreid 6 local BTCM addr 0x41012838 to SoC MCU BTCM addr 0x5c12838
    Copying 0x318 bytes to 0x5c12838
    Translating coreid 6 local BTCM addr 0x41012c50 to SoC MCU BTCM addr 0x5c12c50
    Copying 0x100 bytes to 0x5c12c50
    Copying 0x40 bytes to 0x41c00000
    Setting entry point for core 6 @0x41c00000
    Switching core id 6, proc_id 0x6 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
    Sciclient_procBootSetProcessorCfg, ProcId 0x6, enabling split mode...
    Sciclient_pmSetModuleState Off, DevId 0xf6...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x7...
    Enabling MCU TCMs after reset for core 7
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Setting HALT for ProcId 0x7...
    Sciclient_pmSetModuleState On, DevId 0xf6...
    Clearing core_id 7 (lock-step) ATCM @ 0x5d00000
    Clearing core_id 7 (lock-step) BTCM @ 0x5d10000
    Translating coreid 7 local ATCM addr 0x0 to SoC MCU ATCM addr 0x5d00000
    Copying 0x40 bytes to 0x5d00000
    Translating coreid 7 local BTCM addr 0x41010000 to SoC MCU BTCM addr 0x5d10000
    Copying 0x28 bytes to 0x5d10000
    Copying 0xff40 bytes to 0x7001c6f0
    Copying 0x8a68 bytes to 0x7002c630
    Copying 0x6e78 bytes to 0x70035098
    Copying 0x3388 bytes to 0x7003f800
    Copying 0x200 bytes to 0x70046180
    Copying 0x200 bytes to 0x70046380
    Copying 0x200 bytes to 0x70046580
    Copying 0x7d0 bytes to 0x70046980
    Copying 0x2000 bytes to 0x700fe000
    Setting entry point for core 7 @0x0
    Sciclient_procBootReleaseProcessor, ProcId 0x20...
    Sciclient_procBootReleaseProcessor, ProcId 0x21...
    Sciclient_procBootReleaseProcessor, ProcId 0x1...
    Sciclient_procBootReleaseProcessor, ProcId 0x2...
    Sciclient_procBootReleaseProcessor, ProcId 0x6...
    Sciclient_procBootReleaseProcessor, ProcId 0x7...
    Sciclient_procBootReleaseProcessor, ProcId 0x8...
    Sciclient_procBootReleaseProcessor, ProcId 0x9...
    Sciclient_procBootReleaseProcessor, ProcId 0x3...
    Sciclient_procBootReleaseProcessor, ProcId 0x4...
    Sciclient_procBootReleaseProcessor, ProcId 0x30...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x6...
    Sciclient_procBootSetProcessorCfg, ProcId 0x6, EntryPoint 0x41c00000...
    Sciclient_pmSetModuleClkFreq, DevId 0xf5 @ 1000000000Hz...
    Copying first 128 bytes from app to MCU ATCM @ 0x5c00000 for core 6
    Clearing HALT for ProcId 0x6...
    Sciclient_procBootReleaseProcessor, ProcId 0x6...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x7...
    Sciclient_procBootSetProcessorCfg, ProcId 0x7, EntryPoint 0x0...
    Sciclient_pmSetModuleClkFreq, DevId 0xf6 @ 1000000000Hz...
    Clearing HALT for ProcId 0x7...
    Sciclient_procBootReleaseProcessor, ProcId 0x7...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Sciclient_procBootSetProcessorCfg, ProcId 0x1, EntryPoint 0x41010000...
    Sciclient_pmSetModuleClkFreq, DevId 0xfa @ 1000000000Hz...
    Copying first 128 bytes from app to MCU ATCM @ 0x0 for core 4
    Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
    Skipping Sciclient_procBootSetProcessorCfg for ProcId 0x2, EntryPoint 0xfffffffe...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Starting Sciserver..... PASSED
    CAN Profile App:Variant - Pre Compile being used !!!
    CAN Profile App: Successfully Enabled CAN Transceiver MCU MCAN0!!!
    CAN Profile App: Successfully Enabled CAN Transceiver MCU MCAN1!!!
    CAN Profile App:Will Transmit & Receive (Internal-loopback) 10000 Messages, 2 times
    CAN Profile App:NOTE : Operating in interrupt mode!
    CAN Profile App:Transmit & Receive (Internal-loopback)  10000 packets 2 times
    CAN Profile App:Average of 86.24934 usecs per packet
    CAN Profile App:Average of 11544 packets in 1 second with CPU Load 5.088900%
    CAN Profile App:Packets sent: 20000, Packets recv: 20000 in total time: 3464934 us
    CAN Profile App:Measured Load: Total CPU: 5.436478%, HWI: 3.787126%, SWI:0.023594% TSK: 1.278180%
    CAN Profile App:Message Id Received c00000c0 Message Length is 64
    CAN Profile App:Test completed for 0 instance
    
    CAN Profile App: 8192 bytes used for stack
    CAN Profile App:Profiling completes sucessfully!!!
    

    Second:

    ./MulticoreImageGen LE 55 can1_0_2_1_second.appimage 4 sciserver_testapptirtos_mcu1_0_release.rprc 6 sbl_mcux_0_dummy_app.rprc 7 can_profile_app_tirtos_mcu1_0_release 4 can_profile_app_tirtos_mcu1_0_release.rprc 

    can_profile_1_0_2_1_second.txt
    SBL Revision: 01.00.10.01 (Dec  2 2021 - 14:02:22)
    TIFS  ver: 21.5.0--v2021.05 (Terrific Llam
    SCISERVER Board Configuration header population... PASSED
    Sciclient_setBoardConfigHeader... PASSED
    Efuse xlated: VD 2 to 800 mV (OppVid: 0x37, Slave:0x48, Res:0x0)
    Successfully set voltage to 800 mV for Slave:0x48, Res:0x0
    Initlialzing PLLs ...done.
    InitlialzingClocks ...done.
    Initlialzing DDR ...done.
    Initializing GTC ...Begin parsing user application
    Calling Sciclient_procBootRequestProcessor, ProcId 0x20...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x21...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x6...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x7...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x8...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x9...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x3...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x4...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x30...
    Searching for X509 certificate ...not found
    Switching core id 4, proc_id 0x1 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Sciclient_procBootSetProcessorCfg, ProcId 0x1, enabling split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Enabling MCU TCMs after reset for core 4
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Copying 0x40 bytes to 0x41010000
    Copying 0x4710 bytes to 0x41010100
    Copying 0x500 bytes to 0x41017a10
    Copying 0x28 bytes to 0x41017f10
    Copying 0x10 bytes to 0x41017f38
    Copying 0x165f0 bytes to 0x41c9f780
    Copying 0xe5e0 bytes to 0x41cb5d70
    Copying 0x1700 bytes to 0x41cc9200
    Copying 0x1180 bytes to 0x41cca900
    Setting entry point for core 4 @0x41010000
    Switching core id 6, proc_id 0x6 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
    Sciclient_procBootSetProcessorCfg, ProcId 0x6, enabling split mode...
    Sciclient_pmSetModuleState Off, DevId 0xf5...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
    Enabling MCU TCMs after reset for core 6
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Setting HALT for ProcId 0x6...
    Sciclient_pmSetModuleState On, DevId 0xf5...
    Clearing core_id 6 (lock-step) ATCM @ 0x5c00000
    Clearing core_id 6 (lock-step) BTCM @ 0x5c10000
    Translating coreid 6 local BTCM addr 0x41010000 to SoC MCU BTCM addr 0x5c10000
    Copying 0x1e80 bytes to 0x5c10000
    Translating coreid 6 local BTCM addr 0x41011e80 to SoC MCU BTCM addr 0x5c11e80
    Copying 0x598 bytes to 0x5c11e80
    Translating coreid 6 local BTCM addr 0x41012418 to SoC MCU BTCM addr 0x5c12418
    Copying 0x420 bytes to 0x5c12418
    Translating coreid 6 local BTCM addr 0x41012838 to SoC MCU BTCM addr 0x5c12838
    Copying 0x318 bytes to 0x5c12838
    Translating coreid 6 local BTCM addr 0x41012c50 to SoC MCU BTCM addr 0x5c12c50
    Copying 0x100 bytes to 0x5c12c50
    Copying 0x40 bytes to 0x41c00000
    Setting entry point for core 6 @0x41c00000
    Switching core id 6, proc_id 0x6 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
    Sciclient_procBootSetProcessorCfg, ProcId 0x6, enabling split mode...
    Sciclient_pmSetModuleState Off, DevId 0xf6...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x7...
    Enabling MCU TCMs after reset for core 7
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Setting HALT for ProcId 0x7...
    Sciclient_pmSetModuleState On, DevId 0xf6...
    Clearing core_id 7 (lock-step) ATCM @ 0x5d00000
    Clearing core_id 7 (lock-step) BTCM @ 0x5d10000
    Translating coreid 7 local ATCM addr 0x0 to SoC MCU ATCM addr 0x5d00000
    Copying 0x40 bytes to 0x5d00000
    Translating coreid 7 local BTCM addr 0x41010000 to SoC MCU BTCM addr 0x5d10000
    Copying 0x28 bytes to 0x5d10000
    Copying 0xff40 bytes to 0x7001c6f0
    Copying 0x8a68 bytes to 0x7002c630
    Copying 0x6e78 bytes to 0x70035098
    Copying 0x3388 bytes to 0x7003f800
    Copying 0x200 bytes to 0x70046180
    Copying 0x200 bytes to 0x70046380
    Copying 0x200 bytes to 0x70046580
    Copying 0x7d0 bytes to 0x70046980
    Copying 0x2000 bytes to 0x700fe000
    Setting entry point for core 7 @0x0
    Switching core id 4, proc_id 0x1 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Sciclient_procBootSetProcessorCfg, ProcId 0x1, enabling split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Enabling MCU TCMs after reset for core 4
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Copying 0x40 bytes to 0x41010000
    Copying 0x28 bytes to 0x41010040
    Copying 0x1a2e0 bytes to 0x41c82000
    Copying 0x5084 bytes to 0x41c9c2e0
    Copying 0x3120 bytes to 0x41ca1364
    Copying 0x1900 bytes to 0x41ca4500
    Copying 0x200 bytes to 0x41ca8980
    Copying 0x200 bytes to 0x41ca8b80
    Copying 0x200 bytes to 0x41ca8d80
    Copying 0xa30 bytes to 0x41ce2ad8
    Copying 0xe5e0 bytes to 0x700600a0
    Copying 0x4710 bytes to 0x70073b80
    Copying 0x2000 bytes to 0x707ee000
    Setting entry point for core 4 @0x41010000
    Sciclient_procBootReleaseProcessor, ProcId 0x20...
    Sciclient_procBootReleaseProcessor, ProcId 0x21...
    Sciclient_procBootReleaseProcessor, ProcId 0x1...
    Sciclient_procBootReleaseProcessor, ProcId 0x2...
    Sciclient_procBootReleaseProcessor, ProcId 0x6...
    Sciclient_procBootReleaseProcessor, ProcId 0x7...
    Sciclient_procBootReleaseProcessor, ProcId 0x8...
    Sciclient_procBootReleaseProcessor, ProcId 0x9...
    Sciclient_procBootReleaseProcessor, ProcId 0x3...
    Sciclient_procBootReleaseProcessor, ProcId 0x4...
    Sciclient_procBootReleaseProcessor, ProcId 0x30...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x6...
    Sciclient_procBootSetProcessorCfg, ProcId 0x6, EntryPoint 0x41c00000...
    Sciclient_pmSetModuleClkFreq, DevId 0xf5 @ 1000000000Hz...
    Copying first 128 bytes from app to MCU ATCM @ 0x5c00000 for core 6
    Clearing HALT for ProcId 0x6...
    Sciclient_procBootReleaseProcessor, ProcId 0x6...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x7...
    Sciclient_procBootSetProcessorCfg, ProcId 0x7, EntryPoint 0x0...
    Sciclient_pmSetModuleClkFreq, DevId 0xf6 @ 1000000000Hz...
    Clearing HALT for ProcId 0x7...
    Sciclient_procBootReleaseProcessor, ProcId 0x7...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Sciclient_procBootSetProcessorCfg, ProcId 0x1, EntryPoint 0x41010000...
    Sciclient_pmSetModuleClkFreq, DevId 0xfa @ 1000000000Hz...
    Copying first 128 bytes from app to MCU ATCM @ 0x0 for core 4
    Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
    Skipping Sciclient_procBootSetProcessorCfg for ProcId 0x2, EntryPoint 0xfffffffe...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Starting Sciserver..... PASSED
    CAN Profile App:Variant - Pre Compile being used !!!
    CAN Profile App: Successfully Enabled CAN Transceiver MCU MCAN0!!!
    CAN Profile App: Successfully Enabled CAN Transceiver MCU MCAN1!!!
    CAN Profile App:Will Transmit & Receive (Internal-loopback) 10000 Messages, 2 times
    CAN Profile App:NOTE : Operating in interrupt mode!
    CAN Profile App:Transmit & Receive (Internal-loopback)  10000 packets 2 times
    CAN Profile App:Average of 86.25149 usecs per packet
    CAN Profile App:Average of 11543 packets in 1 second with CPU Load 5.089649%
    CAN Profile App:Packets sent: 20000, Packets recv: 20000 in total time: 3465149 us
    CAN Profile App:Measured Load: Total CPU: 5.437050%, HWI: 3.787929%, SWI:0.023567% TSK: 1.278154%
    CAN Profile App:Message Id Received c00000c0 Message Length is 64
    CAN Profile App:Test completed for 0 instance
    
    CAN Profile App: 8192 bytes used for stack
    CAN Profile App:Profiling completes sucessfully!!!
    
    

  • Hi Tan Yang,

    I am little confused here

    However, can_profile_app_tirtos_mcu2_1_release can't run on mcu2_1,I can't see it's  information on all COM ports.

    Do you still face this issue when you use 

    ./MulticoreImageGen LE 55 can1_0_2_1_first.appimage 4 can_profile_app_tirtos_mcu1_0_release.rprc 6 sbl_mcux_0_dummy_app.rprc 7 can_profile_app_tirtos_mcu1_0_release

    and 

    ./MulticoreImageGen LE 55 can1_0_2_1_second.appimage 4 sciserver_testapptirtos_mcu1_0_release.rprc 6 sbl_mcux_0_dummy_app.rprc 7 can_profile_app_tirtos_mcu1_0_release 4 can_profile_app_tirtos_mcu1_0_release.rprc  ?

     

    Regards,
    Parth

  • Hi Parth Nagpal,

    I move the origin of MAIN_MSRAM_0 from 0x70000000 to 0x70100000 in the file 

    _~\mcusw\mcuss_demos\profiling\can\overrides\j721e\mcu2_1_linker_r5_sysbios.lds

    Then, I make the can_profile_app of mcu2_1 again with the following command.

    make -s can_profile_app BOARD=j721e_evm SOC=j721e BUILD_PROFILE=release CORE=mcu2_1 BUILD_OS_TYPE=tirtos

    After that, I stitch multiple .rprc images into a multicore image, execute the following command in the Linux environment.

    ./MulticoreImageGen LE 55 can1_0_2_1_first.appimage 4 can_profile_app_tirtos_mcu1_0_release.rprc 6 sbl_mcux_0_dummy_app.rprc 7 can_profile_app_tirtos_mcu1_0_release

    Now, the combined appimage of mcu1_0 and mcu2_1 can be loaded successfully by SBL from SD card.

    Thank you and Brijesh!

    Regards

    Tan Yang

  • Cool. Glad to know it is working fine. Closing this thread. 

  • Happy new year ,Brijesh Jadav:

    I am trying to boot the app including mcu1_0.rprc mcu2_0.rprc and mcu2_1.rprc from SD card. I am using the following command to generate the combined app in windows. 

    MulticoreImageGen.exe LE 55 Combined.appimage 4 mcu1_0.rprc 6 mcu_2_0.rprc  7 mcu2_1.rprc

    Then, I copy it to SD card ,name it as app, insert the SD card to the board and power on. However,I can't see the expected information about my app from Tera Term.

    So ,I want to know how to generate the app including mcu1_0.rprc, mcu2_0.rprc , mcu2_1.rprc and  boot it from SD card successfully.

  • Hello Yang,

    Happy New Year to you as well.

    I think you had earlier similar issue, with combined appimage of mcu1_0, mcu2_0 and mcu2_1 and then you were able to get it working after fixing memory map.. Are the same changes applied here also? 

    Can you narrow it down to further which core is not booting, by incremental adding one core at a time in app, and then check memory map of this core?

    You could even try to enable/increase log level in SBL to see what is happening in SBL. One more question, is SciServer integrated with mcu1_0 binary? 

    Regards,

    Brijesh 

  • Hi Brijesh Jadav,

     I have changed the link file of mcu2_1 as you said before. Move the origin of MAIN_MSRAM_0 to 0x70100000 in the file.

    I want to know what is special about the address 0x70100000, why we need to offset the address here?

    I tried to generate the .appimage of mcu1_0.rprc.

    The combined appimage composed of mcu1_0.rprc and the binary file app_remoteswitchcfg_server.xer5f of mcu2_0.

    The combined appimage of mcu1_0.rprc and mcu2_1.rprc.

    And the combined appimage of mcu1_0, mcu2_0 and mcu2_1.

    The result is that as long as app_remoteswitchcfg_server.xer5f of mcu2_0 is added, booting from the SD card will not succeed

    So use the app_remoteswitchcfg_server.xer5f of mcu2_0 in the SD card. Is there anything to pay attention to?

    I upload the map files of mcu1_0, mcu2_0, mcu2_1 and the serial port log when I boot the combined appimage of mcu1_0, mcu2_0 and mcu2_1 from the SD card.

    Please help me analyze the problem , thank you very much.

    Serial_port_log.txt
    SBL Revision: 01.00.10.01 (Dec  2 2021 - 14:02:22)
    TIFS  ver: 21.5.0--v2021.05 (Terrific Llam
    SCISERVER Board Configuration header population... PASSED
    Sciclient_setBoardConfigHeader... PASSED
    Efuse xlated: VD 2 to 800 mV (OppVid: 0x37, Slave:0x48, Res:0x0)
    Successfully set voltage to 800 mV for Slave:0x48, Res:0x0
    Initlialzing PLLs ...done.
    InitlialzingClocks ...done.
    Initlialzing DDR ...done.
    Initializing GTC ...Begin parsing user application
    Calling Sciclient_procBootRequestProcessor, ProcId 0x20...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x21...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x6...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x7...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x8...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x9...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x3...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x4...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x30...
    Searching for X509 certificate ...not found
    Switching core id 4, proc_id 0x1 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Sciclient_procBootSetProcessorCfg, ProcId 0x1, enabling split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x1...
    Enabling MCU TCMs after reset for core 4
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Copying 0x188 bytes to 0x41010000
    Copying 0x468 bytes to 0x70051e00
    Copying 0x318 bytes to 0x70052268
    Copying 0xf8 bytes to 0x70052580
    Copying 0x60200 bytes to 0x97063200
    Copying 0x54380 bytes to 0x970c3400
    Copying 0x441fc bytes to 0x97117780
    Copying 0x30200 bytes to 0x9715b980
    Copying 0xd180 bytes to 0x971a6800
    Copying 0xbb50 bytes to 0x971bf750
    Copying 0x55b0 bytes to 0x971d16c0
    Copying 0x4710 bytes to 0x971d6c70
    Copying 0x3034 bytes to 0x971db380
    Copying 0x1fd0 bytes to 0x971e5190
    Copying 0x8 bytes to 0x971e7178
    Copying 0x1900 bytes to 0x971e7180
    Copying 0x8ec bytes to 0x971ec81c
    Copying 0x66c bytes to 0x971ed108
    Copying 0x5e8 bytes to 0x971ed774
    Copying 0x4cc bytes to 0x971edd5c
    Copying 0x328 bytes to 0x971ee228
    Copying 0x204 bytes to 0x971ee794
    Copying 0x88 bytes to 0x971ee998
    Copying 0x8168 bytes to 0x971eeba8
    Copying 0x2000 bytes to 0x97ffe000
    Setting entry point for core 4 @0x41010000
    Switching core id 6, proc_id 0x6 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
    Sciclient_procBootSetProcessorCfg, ProcId 0x6, enabling split mode...
    Sciclient_pmSetModuleState Off, DevId 0xf5...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
    Enabling MCU TCMs after reset for core 6
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Setting HALT for ProcId 0x6...
    Sciclient_pmSetModuleState On, DevId 0xf5...
    Clearing core_id 6 (lock-step) ATCM @ 0x5c00000
    Clearing core_id 6 (lock-step) BTCM @ 0x5c10000
    Translating coreid 6 local ATCM addr 0x0 to SoC MCU ATCM addr 0x5c00000
    Copying 0x40 bytes to 0x5c00000
    Translating coreid 6 local BTCM addr 0x41010000 to SoC MCU BTCM addr 0x5c10000
    Copying 0x3d8 bytes to 0x5c10000
    Translating coreid 6 local BTCM addr 0x410103d8 to SoC MCU BTCM addr 0x5c103d8
    Copying 0x338 bytes to 0x5c103d8
    Translating coreid 6 local BTCM addr 0x41010710 to SoC MCU BTCM addr 0x5c10710
    Copying 0x318 bytes to 0x5c10710
    Translating coreid 6 local BTCM addr 0x41010a28 to SoC MCU BTCM addr 0x5c10a28
    Copying 0x118 bytes to 0x5c10a28
    Copying 0x8c bytes to 0xa2100000
    Copying 0x73360 bytes to 0xa29c2000
    Copying 0x7d20 bytes to 0xa2a87700
    Copying 0x2d28 bytes to 0xa2a8f420
    Setting entry point for core 6 @0x0
    Switching core id 6, proc_id 0x6 to split mode...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x6...
    Sciclient_procBootSetProcessorCfg, ProcId 0x6, enabling split mode...
    Sciclient_pmSetModuleState Off, DevId 0xf6...
    Calling Sciclient_procBootGetProcessorState, ProcId 0x7...
    Enabling MCU TCMs after reset for core 7
    Sciclient_procBootSetProcessorCfg update TCM enable/disable settings...
    Setting HALT for ProcId 0x7...
    Sciclient_pmSetModuleState On, DevId 0xf6...
    Clearing core_id 7 (lock-step) ATCM @ 0x5d00000
    Clearing core_id 7 (lock-step) BTCM @ 0x5d10000
    Translating coreid 7 local ATCM addr 0x0 to SoC MCU ATCM addr 0x5d00000
    Copying 0x100 bytes to 0x5d00000
    Translating coreid 7 local ATCM addr 0x100 to SoC MCU ATCM addr 0x5d00100
    Copying 0x28 bytes to 0x5d00100
    Copying 0x468 bytes to 0x70112000
    Copying 0x318 bytes to 0x70112468
    Copying 0xf8 bytes to 0x70112780
    Copying 0x60200 bytes to 0x9b063200
    Copying 0x436ec bytes to 0x9b0c3400
    Copying 0x33070 bytes to 0x9b106af0
    Copying 0x30200 bytes to 0x9b139b80
    Copying 0xbff8 bytes to 0x9b176ce0
    Copying 0x56a8 bytes to 0x9b18f798
    Copying 0x555c bytes to 0x9b194e40
    Copying 0x2dd4 bytes to 0x9b1a1680
    Copying 0x8d0 bytes to 0x9b1aa778
    Copying 0x66c bytes to 0x9b1ab048
    Copying 0x5e8 bytes to 0x9b1ab6b4
    Copying 0x534 bytes to 0x9b1abc9c
    Copying 0x34c bytes to 0x9b1ac1d0
    Copying 0x204 bytes to 0x9b1ac760
    Copying 0x1a4 bytes to 0x9b1acb80
    Copying 0x88 bytes to 0x9b1acd24
    Copying 0x48 bytes to 0x9b1acedc
    Copying 0x8 bytes to 0x9b1acf58
    Copying 0x3f68 bytes to 0x9b1acf60
    Copying 0x2000 bytes to 0x9effe000
    Setting entry point for core 7 @0x0
    Sciclient_procBootReleaseProcessor, ProcId 0x20...
    Sciclient_procBootReleaseProcessor, ProcId 0x21...
    Sciclient_procBootReleaseProcessor, ProcId 0x1...
    Sciclient_procBootReleaseProcessor, ProcId 0x2...
    Sciclient_procBootReleaseProcessor, ProcId 0x6...
    Sciclient_procBootReleaseProcessor, ProcId 0x7...
    Sciclient_procBootReleaseProcessor, ProcId 0x8...
    Sciclient_procBootReleaseProcessor, ProcId 0x9...
    Sciclient_procBootReleaseProcessor, ProcId 0x3...
    Sciclient_procBootReleaseProcessor, ProcId 0x4...
    Sciclient_procBootReleaseProcessor, ProcId 0x30...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x6...
    Sciclient_procBootSetProcessorCfg, ProcId 0x6, EntryPoint 0x0...
    Sciclient_pmSetModuleClkFreq, DevId 0xf5 @ 1000000000Hz...
    Clearing HALT for ProcId 0x6...
    Sciclient_procBootReleaseProcessor, ProcId 0x6...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x7...
    Sciclient_procBootSetProcessorCfg, ProcId 0x7, EntryPoint 0x0...
    Sciclient_pmSetModuleClkFreq, DevId 0xf6 @ 1000000000Hz...
    Clearing HALT for ProcId 0x7...
    Sciclient_procBootReleaseProcessor, ProcId 0x7...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    Sciclient_procBootSetProcessorCfg, ProcId 0x1, EntryPoint 0x41010000...
    Sciclient_pmSetModuleClkFreq, DevId 0xfa @ 1000000000Hz...
    Copying first 128 bytes from app to MCU ATCM @ 0x0 for core 4
    Calling Sciclient_procBootRequestProcessor, ProcId 0x2...
    Skipping Sciclient_procBootSetProcessorCfg for ProcId 0x2, EntryPoint 0xfffffffe...
    Calling Sciclient_procBootRequestProcessor, ProcId 0x1...
    
    
    app_remoteswitchcfg_server.xer5f.map.txtmcu1_0.map.txtmcu_2_1.map.txt

  • Hello Tan Yang,

    I want to know what is special about the address 0x70100000, why we need to offset the address here?

    Well, you were using MSMC memory, starting at the offset 0x70000000, for storing some contents. But some initial portion of the MSMC memory, i think around 256KB, is used by the DMSC. So i asked you to move to 0x70100000 offset. 

    Let me check the log and see if i can figure out something. 

    Meanwhile, can you also please check if there is no memory map conflict?

    Regards,

    Brijesh

  • Hello Brijesh Jadav,

    Is the file tifs.bin as the DMSC you mentioned?

    I have changed the link file of mcu2_1 as you said before. Move the origin of MAIN_MSRAM_0 to 0x70100000 in the file.

    In addition, I can’t find other memory mapping conflicts.

    We have verified that our program can run successfully using the debugger.

    However, when I use the previous method to combine mcu1_0.rprc, app_remoteswitchcfg_server.xer5f of mcu2_0, mcu2_1.rprc into a .appimage file and copy it to the boot partition of the SD card.The board cannot successfully load the program from the SD card .

    I want to learn about that is there anything to pay attention to when we use the app_remoteswitchcfg_server.xer5f of mcu2_0 in the SD card.

    Regards,

    Tan Yang

  • Closing this ticket.