TDA4VM: In the stress test, we have observed the opsi write error

Zongsheng Chen

Part Number: TDA4VM

Hi Keerthy,

TDA4VM: An indirect write completion error occurred in the linux OSPI driver - Processors forum - Processors - TI E2E support forums

Can this problem be solved on SDK7.2?

The SBL can be damaged when an write error occurs, so the impact of the problem is very serious.

Best Regards,
Chen Zongsheng

over 3 years ago

0 Keerthy J over 3 years ago

TI__Guru**** 162500 points

Zongsheng Chen said:
The SBL can be damaged when an write error occurs, so the impact of the problem is very serious.

Hi,

Are you using SBL?! I believe you are using the SPL right?

Zongsheng Chen said:
TDA4VM: An indirect write completion error occurred in the linux OSPI driver - Processors forum - Processors - TI E2E support forums

Since this has a work around with delay addition this is still not fixed.

I am tracking this internally.

Are you facing some issues with this? Please let us know.

- Keerthy

0 Zongsheng Chen over 3 years ago in reply to Keerthy J

Prodigy 100 points

Hi Keerthy,

When the "cadence-qspi 47040000.spi: Indirect write completion error (-110)" error occurs, the first four bytes of data in /dev/mtd0 may be overwritten. Which will cause SBL damage and the system cannot boot after restart.

You can make cqspi->wr_delay smaller quickly tested the issue.

Best Regards,
Chen Zongsheng

+1 Keerthy J over 3 years ago in reply to Zongsheng Chen

TI__Guru**** 162500 points

Hi Chen,

Could you please try this patch below:

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 53ba8502b988..c44ec4ffb0dd 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1294,6 +1294,7 @@ static int cqspi_indirect_read_execute(struct cqspi_flash_pdata *f_pdata,
 	reinit_completion(&cqspi->transfer_complete);
 	writel(CQSPI_REG_INDIRECTRD_START_MASK,
 	       reg_base + CQSPI_REG_INDIRECTRD);
+	readl(reg_base + CQSPI_REG_INDIRECTRD); /* Flush posted write. */
 
 	while (remaining > 0) {
 		if (!wait_for_completion_timeout(&cqspi->transfer_complete,
@@ -1432,6 +1433,7 @@ static int cqspi_indirect_write_execute(struct cqspi_flash_pdata *f_pdata,
 	reinit_completion(&cqspi->transfer_complete);
 	writel(CQSPI_REG_INDIRECTWR_START_MASK,
 	       reg_base + CQSPI_REG_INDIRECTWR);
+	readl(reg_base + CQSPI_REG_INDIRECTWR); /* Flush posted write. */
 	/*
 	 * As per 66AK2G02 TRM SPRUHY8F section 11.15.5.3 Indirect Access
 	 * Controller programming sequence, couple of cycles of

Basically flushing the posted write.

Let us know if the above helps fix the failures you are observing.

Best Regards,
Keerthy