Other Parts Discussed in Thread: DP83869
Hi TI team,
A few questions regarding Ethernet on AM6442:
1) MCU+SDK v08.01 docs say DUAL-EMAC driver on ICSSG only supports 100Mbps. Is this correct? Does Enet LLD support 1Gbps?
2) Does TI publish latency benchmarks for Enet LLD via ICSSG configured in switch mode or dual-mac mode?
3) We are considering ICSSG -> RGMII -> DP83869 PHY in 1000BASE-X mode (fiber-optic). Is there any reason 1000BASE-X wouldn't be supported?
4) When using 1000BASE-X fiber-optic, there is the option of forming a non-redundant ring topology by daisy-chaining the TX/RX fibers (upstream device comes in to RX, TX goes out to downstream device). With such a configuration, is it possible to set up the ICSSG in switch mode such that incoming layer 2 packets are cut-through forwarded to the TX of the same port? In MCU+SDK 08.01 documentation, it looks like ICSSG can be configured to cut-through packets from port0 to port1, but I am asking if we can cut-through from port0 RX to port0 TX (one PHY, using only 1 port on PRU instead of 2) without CPU intervention.