Other Parts Discussed in Thread: BQ76952
Hi Experts,
Good day. I have a source code query about the implementation of I2C CRC frame protocol with BQ76952. I pasted the full query from client below.
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I work on project with BQ7695202 with the I2C CRC active by default.
I want to access and write in the dataram register.
I use the Battery management studio to capture I2CCRC frame and to understand precisely the protocole.
I try to write the value 12300 (0x300C) in the calibration register Vcell 1 (0x9180) to test.
In first, I send the following data:
Adress: 0x10
Start register: 0x3E
Data: 80 91 0C 30
In output, I have the I2C frame:
08 Equivalent to 0X10 adresse with shift logical for LSB to indicate Read or write
3E Register
80 LSB register calibration
04 CRC with the 3 previously values.
91 MSB register calibration
FE CRC of the previously value
0C LSB data to write
24 CRC of the previously value
30 MSB data to write
90 CRC of the previously value.
This frame is OK.
To complete the write protocole, I send the folllowing data:
Adress: 0x10
Start register 0x60
Data: B2 06
In output, I have the I2C frame:
08: Equivalent to 0X10 adresse with shift logical for LSB to indicate Read or write.
60: Register
B2: Checksum = (adress bytes + data bytes) and complement.
40: ???
06: frame size (2 for address bytes + 2 for data byte + 1 for checksum size + 1 for frame size)
12: ???
My questions is on the second frame: the data 40 and 12.
It's look like crc value but, I don't undestood how they are computed.
And I don't found this information in the technical datasheet.The majority of the example are for I2C without CRC and for SPI protocol.
Could you indicate me how to compute these bytes? or the technical datasheet explain the process?
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For your guidance.
Thank you.
Regards,
Archie A.
