Part Number: TDA4VM
Hi,
I'm try to run a C API onnx_classification on board.
follow the TI Deep Learning Product User Guide,but get some troubles.IS there some instructions on how to build and run onnxruntime C Api on board?
1.make onnxruntime C api excute file like below.
cd ${PSDKRA_PATH}
git clone github.com/.../onnxruntime
cd onnxruntime
git checkout c8e2e3191b2d506d1260069eb3d3fc7c262ec172
git am ../tidl_j7_xx_xx_xx_xx/ti_dl/onnxrt_EP/0001-Add-TIDL-compilation-execution-providers.patch
cd ..
export PSDK_INSTALL_PATH=$(pwd)
cd targetfs/usr/lib/
ln -s libonnxruntime.so.1.7.0 libonnxruntime.so
ln -s libtbb.so.2 libtbb.so
ln -s libtiff.so.5 libtiff.so
ln -s libwebp.so.7 libwebp.so
ln -s libopencv_highgui.so.4.1 libopencv_highgui.so
ln -s libopencv_imgcodecs.so.4.1 libopencv_imgcodecs.so
ln -s libopencv_core.so.4.1.0 libopencv_core.so
ln -s libopencv_imgproc.so.4.1.0 libopencv_imgproc.so
cd ../../../tidl_j7_xx_xx_xx_xx
make demos DIRECTORIES=onnx
get the board excute file .
2.make sure board has lib
root@j7-evm:/usr/lib# find libonnxruntime.so
libonnxruntime.so
root@j7-evm:/usr/lib# find libtbb.so
libtbb.so
root@j7-evm:/usr/lib# find libtiff.so
libtiff.so
root@j7-evm:/usr/lib# find libwebp.so
libwebp.so
root@j7-evm:/usr/lib# find libopencv_highgui.so
libopencv_highgui.so
root@j7-evm:/usr/lib# find libopencv_imgcodecs.so
libopencv_imgcodecs.so
root@j7-evm:/usr/lib# find libopencv_core.so
libopencv_core.so
root@j7-evm:/usr/lib# find libopencv_imgproc.so
libopencv_imgproc.so
root@j7-evm:/usr/lib# file libonnxruntime.so
libonnxruntime.so: symbolic link to libonnxruntime.so.1.7.0
root@j7-evm:/usr/lib# file libonnxruntime.so.1.7.0
libonnxruntime.so.1.7.0: ELF 64-bit LSB shared object, ARM aarch64, version 1 (SYSV), statically linke d, stripped
root@j7-evm:/usr/lib# file libtbb.so
libtbb.so: ASCII text
root@j7-evm:/usr/lib# file libtiff.so
libtiff.so: symbolic link to libtiff.so.5.5.0
root@j7-evm:/usr/lib# file libtiff.so.5.5.0
libtiff.so.5.5.0: ELF 64-bit LSB shared object, ARM aarch64, version 1 (SYSV), statically linked, stri pped
root@j7-evm:/usr/lib# file libwebp.so
libwebp.so: symbolic link to libwebp.so.7.1.0
root@j7-evm:/usr/lib# file libwebp.so.7.1.0
libwebp.so.7.1.0: ELF 64-bit LSB shared object, ARM aarch64, version 1 (SYSV), statically linked, st ripped
root@j7-evm:/usr/lib# file libopencv_highgui.so.4.1
libopencv_highgui.so.4.1: symbolic link to libopencv_highgui.so.4.1.0
root@j7-evm:/usr/lib# file libopencv_highgui.so.4.1.0
libopencv_highgui.so.4.1.0: ELF 64-bit LSB shared object, ARM aarch64, version 1 (SYSV), statically linked, stripped
3.run app_vision_init.sh
4.run ./tidl_onnx_classification.out
use OrtSessionOptionsAppendExecutionProvider_Tidl run on board cause the system reboot.
root@j7-evm:/mnt# ./tidl_onnx_classification.out
APP: Init ... !!!
MEM: Init ... !!!
MEM: Initialized DMA HEAP (fd=4) !!!
MEM: Init ... Done !!!
IPC: Init ... !!!
IPC: Init ... Done !!!
REMOTE_SERVICE: Init ... !!!
REMOTE_SERVICE: Init ... Done !!!
1378.481732 s: GTC Frequency = 200 MHz
APP: Init ... Done !!!
1378.483656 s: VX_ZONE_INIT:Enabled
1378.483694 s: VX_ZONE_ERROR:Enabled
1378.483700 s: VX_ZONE_WARNING:Enabled
1378.486473 s: VX_ZONE_INIT:[tivxInit:71] Initialization Done !!!
1378.486675 s: VX_ZONE_INIT:[tivxHostInit:48] Initialization Done for HOST !!!
libtidl_onnxrt_EP loaded 0x33c723b0
Parsing ONNX Model
Final number of subgraphs created are : 1, - Offloaded Nodes - 49, Total Nodes - 49
Compile TIDLExecutionProvider_TIDL_0_0
Compiling Sub ONNX Model
0, Conv, 3, 1, data, resnetv15_batchnorm0_fwd
1, Relu, 1, 1, resnetv15_batchnorm0_fwd, resnetv15_relu0_fwd
2, MaxPool, 1, 1, resnetv15_relu0_fwd, resnetv15_pool0_fwd
3, Conv, 3, 1, resnetv15_pool0_fwd, resnetv15_stage1_batchnorm0_fwd
4, Relu, 1, 1, resnetv15_stage1_batchnorm0_fwd, resnetv15_stage1_relu0_fwd
5, Conv, 3, 1, resnetv15_stage1_relu0_fwd, resnetv15_stage1_batchnorm1_fwd
6, Add, 2, 1, resnetv15_pool0_fwd, resnetv15_stage1__plus0
7, Relu, 1, 1, resnetv15_stage1__plus0, resnetv15_stage1_activation0
8, Conv, 3, 1, resnetv15_stage1_activation0, resnetv15_stage1_batchnorm2_fwd
9, Relu, 1, 1, resnetv15_stage1_batchnorm2_fwd, resnetv15_stage1_relu1_fwd
10, Conv, 3, 1, resnetv15_stage1_relu1_fwd, resnetv15_stage1_batchnorm3_fwd
11, Add, 2, 1, resnetv15_stage1_activation0, resnetv15_stage1__plus1
12, Relu, 1, 1, resnetv15_stage1__plus1, resnetv15_stage1_activation1
13, Conv, 3, 1, resnetv15_stage1_activation1, resnetv15_stage2_batchnorm2_fwd
14, Conv, 3, 1, resnetv15_stage1_activation1, resnetv15_stage2_batchnorm0_fwd
15, Relu, 1, 1, resnetv15_stage2_batchnorm0_fwd, resnetv15_stage2_relu0_fwd
16, Conv, 3, 1, resnetv15_stage2_relu0_fwd, resnetv15_stage2_batchnorm1_fwd
17, Add, 2, 1, resnetv15_stage2_batchnorm2_fwd, resnetv15_stage2__plus0
18, Relu, 1, 1, resnetv15_stage2__plus0, resnetv15_stage2_activation0
19, Conv, 3, 1, resnetv15_stage2_activation0, resnetv15_stage2_batchnorm3_fwd
20, Relu, 1, 1, resnetv15_stage2_batchnorm3_fwd, resnetv15_stage2_relu1_fwd
21, Conv, 3, 1, resnetv15_stage2_relu1_fwd, resnetv15_stage2_batchnorm4_fwd
22, Add, 2, 1, resnetv15_stage2_activation0, resnetv15_stage2__plus1
23, Relu, 1, 1, resnetv15_stage2__plus1, resnetv15_stage2_activation1
24, Conv, 3, 1, resnetv15_stage2_activation1, resnetv15_stage3_batchnorm2_fwd
25, Conv, 3, 1, resnetv15_stage2_activation1, resnetv15_stage3_batchnorm0_fwd
26, Relu, 1, 1, resnetv15_stage3_batchnorm0_fwd, resnetv15_stage3_relu0_fwd
27, Conv, 3, 1, resnetv15_stage3_relu0_fwd, resnetv15_stage3_batchnorm1_fwd
28, Add, 2, 1, resnetv15_stage3_batchnorm2_fwd, resnetv15_stage3__plus0
29, Relu, 1, 1, resnetv15_stage3__plus0, resnetv15_stage3_activation0
30, Conv, 3, 1, resnetv15_stage3_activation0, resnetv15_stage3_batchnorm3_fwd
31, Relu, 1, 1, resnetv15_stage3_batchnorm3_fwd, resnetv15_stage3_relu1_fwd
32, Conv, 3, 1, resnetv15_stage3_relu1_fwd, resnetv15_stage3_batchnorm4_fwd
33, Add, 2, 1, resnetv15_stage3_activation0, resnetv15_stage3__plus1
34, Relu, 1, 1, resnetv15_stage3__plus1, resnetv15_stage3_activation1
35, Conv, 3, 1, resnetv15_stage3_activation1, resnetv15_stage4_batchnorm2_fwd
36, Conv, 3, 1, resnetv15_stage3_activation1, resnetv15_stage4_batchnorm0_fwd
37, Relu, 1, 1, resnetv15_stage4_batchnorm0_fwd, resnetv15_stage4_relu0_fwd
38, Conv, 3, 1, resnetv15_stage4_relu0_fwd, resnetv15_stage4_batchnorm1_fwd
39, Add, 2, 1, resnetv15_stage4_batchnorm2_fwd, resnetv15_stage4__plus0
40, Relu, 1, 1, resnetv15_stage4__plus0, resnetv15_stage4_activation0
41, Conv, 3, 1, resnetv15_stage4_activation0, resnetv15_stage4_batchnorm3_fwd
42, Relu, 1, 1, resnetv15_stage4_batchnorm3_fwd, resnetv15_stage4_relu1_fwd
43, Conv, 3, 1, resnetv15_stage4_relu1_fwd, resnetv15_stage4_batchnorm4_fwd
44, Add, 2, 1, resnetv15_stage4_activation0, resnetv15_stage4__plus1
45, Relu, 1, 1, resnetv15_stage4__plus1, resnetv15_stage4_activation1
46, GlobalAveragePool, 1, 1, resnetv15_stage4_activation1, resnetv15_pool1_fwd
47, Flatten, 1, 1, resnetv15_pool1_fwd, flatten_170
48, Gemm, 3, 1, flatten_170, resnetv15_dense0_fwd
[C7x_1 ] 1384.075606 s: TIDL_initDebugTraceParams Done
[C7x_1 ] 1384.075651 s: Alg Alloc for Layer # - 0
[C7x_1 ] 1384.075675 s: Alg Alloc for Layer # - 1
[C7x_1 ] 1384.075717 s: Alg Alloc for Layer # - 2
[C7x_1 ] 1384.075747 s: Alg Alloc for Layer # - 3
[C7x_1 ] 1384.075779 s: Alg Alloc for Layer # - 4
[C7x_1 ] 1384.075810 s: Alg Alloc for Layer # - 5
[C7x_1 ] 1384.075837 s: Alg Alloc for Layer # - 6
[C7x_1 ] 1384.075874 s: Alg Alloc for Layer # - 7
[C7x_1 ] 1384.075923 s: Alg Alloc for Layer # - 8
[C7x_1 ] 1384.075958 s: Alg Alloc for Layer # - 9
[C7x_1 ] 1384.075992 s: Alg Alloc for Layer # - 10
[C7x_1 ] 1384.076022 s: Alg Alloc for Layer # - 11
[C7x_1 ] 1384.076053 s: Alg Alloc for Layer # - 12
[C7x_1 ] 1384.076079 s: Alg Alloc for Layer # - 13
[C7x_1 ] 1384.076112 s: Alg Alloc for Layer # - 14
[C7x_1 ] 1384.076146 s: Alg Alloc for Layer # - 15
[C7x_1 ] 1384.076173 s: Alg Alloc for Layer # - 16
[C7x_1 ] 1384.076205 s: Alg Alloc for Layer # - 17
[C7x_1 ] 1384.076234 s: Alg Alloc for Layer # - 18
[C7x_1 ] 1384.076265 s: Alg Alloc for Layer # - 19
[C7x_1 ] 1384.076292 s: Alg Alloc for Layer # - 20
[C7x_1 ] 1384.076323 s: Alg Alloc for Layer # - 21
[C7x_1 ] 1384.076357 s: Alg Alloc for Layer # - 22
[C7x_1 ] 1384.076386 s: Alg Alloc for Layer # - 23
[C7x_1 ] 1384.076418 s: Alg Alloc for Layer # - 24
[C7x_1 ] 1384.076449 s: Alg Alloc for Layer # - 25
[C7x_1 ] 1384.076481 s: Alg Alloc for Layer # - 26
[C7x_1 ] 1384.076508 s: Alg Alloc for Layer # - 27
[C7x_1 ] 1384.076540 s: Alg Alloc for Layer # - 28
[C7x_1 ] 1384.076574 s: Alg Alloc for Layer # - 29
[C7x_1 ] 1384.076603 s: Alg Alloc for Layer # - 30
[C7x_1 ] 1384.076632 s: Alg Alloc for Layer # - 31
[C7x_1 ] 1384.076660 s: Alg Alloc for Layer # - 32
[C7x_1 ] 1384.076919 s: Alg Init for Layer # - 0
[C7x_1 ] 1384.076945 s: Alg Init for Layer # - 1
[C7x_1 ] 1384.077027 s: Layer Index 1
[C7x_1 ] 1384.077072 s: Alg Init for Layer # - 2
[C7x_1 ] 1384.077140 s: Alg Init for Layer # - 3
[C7x_1 ] 1384.077250 s: Layer Index 3
[C7x_1 ] 1384.077330 s: Alg Init for Layer # - 4
[C7x_1 ] 1384.077448 s: Layer Index 4
[C7x_1 ] 1384.077524 s: Alg Init for Layer # - 5
[C7x_1 ] 1384.077602 s: Alg Init for Layer # - 6
[C7x_1 ] 1384.077718 s: Layer Index 6
[C7x_1 ] 1384.077792 s: Alg Init for Layer # - 7
[C7x_1 ] 1384.077936 s: Layer Index 7
[C7x_1 ] 1384.078012 s: Alg Init for Layer # - 8
[C7x_1 ] 1384.078089 s: Alg Init for Layer # - 9
[C7x_1 ] 1384.078162 s: Layer Index 9
[C7x_1 ] 1384.078201 s: Alg Init for Layer # - 10
[C7x_1 ] 1384.078374 s: Layer Index 10
[C7x_1 ] 1384.078419 s: Alg Init for Layer # - 11
[C7x_1 ] 1384.078709 s: Layer Index 11
[C7x_1 ] 1384.078763 s: Alg Init for Layer # - 12
[C7x_1 ] 1384.078839 s: Alg Init for Layer # - 13
[C7x_1 ] 1384.079131 s: Layer Index 13
[C7x_1 ] 1384.079186 s: Alg Init for Layer # - 14
[C7x_1 ] 1384.079498 s: Layer Index 14
[C7x_1 ] 1384.079551 s: Alg Init for Layer # - 15
[C7x_1 ] 1384.079626 s: Alg Init for Layer # - 16
[C7x_1 ] 1384.079742 s: Layer Index 16
[C7x_1 ] 1384.079785 s: Alg Init for Layer # - 17
[C7x_1 ] 1384.080314 s: Layer Index 17
[C7x_1 ] 1384.080358 s: Alg Init for Layer # - 18
[C7x_1 ] 1384.081310 s: Layer Index 18
[C7x_1 ] 1384.081360 s: Alg Init for Layer # - 19
[C7x_1 ] 1384.081437 s: Alg Init for Layer # - 20
[C7x_1 ] 1384.082362 s: Layer Index 20
[C7x_1 ] 1384.082411 s: Alg Init for Layer # - 21
[C7x_1 ] 1384.083702 s: Layer Index 21
[C7x_1 ] 1384.083749 s: Alg Init for Layer # - 22
[C7x_1 ] 1384.083828 s: Alg Init for Layer # - 23
[C7x_1 ] 1384.084127 s: Layer Index 23
[C7x_1 ] 1384.084172 s: Alg Init for Layer # - 24
[C7x_1 ] 1384.086034 s: Layer Index 24
[C7x_1 ] 1384.086078 s: Alg Init for Layer # - 25
[C7x_1 ] 1384.089656 s: Layer Index 25
[C7x_1 ] 1384.089700 s: Alg Init for Layer # - 26
[C7x_1 ] 1384.089777 s: Alg Init for Layer # - 27
[C7x_1 ] 1384.093294 s: Layer Index 27
[C7x_1 ] 1384.093341 s: Alg Init for Layer # - 28
[C7x_1 ] 1384.097177 s: Layer Index 28
[C7x_1 ] 1384.097224 s: Alg Init for Layer # - 29
[C7x_1 ] 1384.097304 s: Alg Init for Layer # - 30
[C7x_1 ] 1384.097368 s: Alg Init for Layer # - 31
[C7x_1 ] 1384.102269 s: Alg Init for Layer # - 32
[C7x_1 ] 1384.102318 s: VX_ZONE_WARNING:[tivxKernelTIDLCreate:615] All Interrupts DISABLED during TIDL process
Number of inputs = 1
Input 0 : name=data
Input 0 : type=1
Input 0 : num_dims=4
Input 0 : dim 0=1
Input 0 : dim 1=3
Input 0 : dim 2=224
Input 0 : dim 3=224
Output name -- resnetv15_dense0_fwd
[C7x_1 ] 1385.646952 s: Starting Layer # - 1
[C7x_1 ] 1385.647012 s: 0 16.00000 0.00000 255.00000 1
U-Boot SPL 2021.01-dirty (Oct 26 2021 - 17:00:52 +0800)
Model: Texas Instruments K3 J721E SoC
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed -19
Board: J721EX-PM1-SOM rev E2
SYSFW ABI: 3.1 (firmware rev 0x0015 '21.5.0--v2021.05 (Terrific Llam')
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed -19
Trying to boot from MMC1
mmc_load_image_raw_sector: mmc block read error
** Partition 1 not valid on device 0 **
spl_register_fat_device: fat register err - -1
spl_load_image_fat: error reading image tispl.bin, err - -1
spl: no partition table found
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
use the OrtSessionOptionsAppendExecutionProvider_CPU is ok on board.
if (tidl_flag)
{
OrtSessionOptionsAppendExecutionProvider_Tidl(session_options, options);
}
else
{
OrtSessionOptionsAppendExecutionProvider_CPU(session_options, false);
}
IS there some instructions on how to build and run onnxruntime C Api on board?