Hi all,
We are evaluating C6A8147 for a product and the requirement is as below.
4 D1 (NTSC/PAL) channels will be captured by a video decoder chip and it will produce 16 bit HD raw video.
We plan to give this 16 bit video to HDVPSS of C6A8147for de-interlacing.
Our objective is to get de-interlaced 16 bit video and to pass it as HD frame (4D1 combined together) for further processing.
Questions are as follow.
1) Is C6A8147capable of de-interlacing HD (4D1 channels as a single HD frame) ? If I connect 1 D1 camera and 3 cameras are not connected, then 3 channels will be blank and 1 channel will have video data ?
Would this scenario affect de-interlacing logic ? Or it is independent of the video data and would be equally effective in all cases?
2) What is the CPU utilization and performance for de-interlacing an HD channel video ?
3) Which will be more effective out of below two options a) and b) ?
Option a: Capture 4 channels as a single HD, de-interlace HD frame
Option b: Capture 4 channels separately, de-interlace 4 D1 as 4 separate channels, and combine 4 D1 channels together without any additional copy operation/overhead.
What that means is, is it possible in option b to get the video data from a particular location via DMA, de-interlace and put the de-interlaced data back to the same address ?
If yes, then without overhead of copy, we can de-interlace the required connected channel only (instead of de-interlacing all 4 channels eveninf camera is connected to only 1 channel) and save de-interlacer's time and bandwidth as and when needed.
Please suggest which option is more suitable from de-interlacer's performance point of view.
Thanks,
Sweta
