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DM368 RTC reset after power cycle

Hongfeng Wang
Genius 3925 points
Other Parts Discussed in Thread: TPS65023

I have seen similar problem asked many times, but I still don't understand it very well.I have to admit the PRTCSS module is very confusing to me.

Our DM368 is powered by TPS65023, it has a super cap onboard as backup supply. We are trying to use normal mode: the PWRST and PWRCNTON are both connected to 1.35V, which I confirmed stays on when main power is removed. Now after the power up, the RTC goes back to zero every time. My understanding is that if both PWRST and PWRCNTON are high, the RTC module should not be reset.

Please help me if you have experience with such problem, thanks!

  • 0
    TI__Genius 9510 points

     

    Is the PWCTRO0 pin connected to the DM365 Reset Pin (as shown in the diagram on pg 13, in the PRTCSS userguide)?

    If so, can you confirm that the PWCTRO0 pin doesn't go low

    According to the User Guide

    When the PWCTRO0 pin is in logic level 0, then the PRTCSS submodules will be in reset and the

    DM36x device will not be able to access the PRTCSS registers.

  • 0 in reply to Marcus Cooksey
    Genius 3925 points

    Thanks for your reply, Marcus.

    The part you quoted is exactly what confuses me most:

    The PWCTRO0 is an output of PRTCSS module, so the output of one module will cause reset of itself?

    On my board PWCTRO0 is connected to reset pin of DM365, I want the watchdog to be able to reset the CPU. How can I achieve both?

     

  • 0 in reply to Hongfeng Wang
    TI__Genius 9510 points

     

    Their is a specific WDT associated with the RTCSS, which must be cleared or else the RTCSS will reset

    So when the CPU  WDT reset occurs you'll be required to clear the WEN bit in the RTC control register

    (RTC_CTRL) within 16 sec.

     

     

     

  • 0 in reply to Marcus Cooksey
    Genius 3925 points

    Thanks for your reply, but my previous question was not answered.

    I confirmed when main power is down, the PWCTRO0 does go low, so that explains the RTC reset.

    How do I keep it high, a pull up? Currently it's connected to input of level shifter, whose output is connected to CPU reset.

    Thanks!

  • 0 in reply to Hongfeng Wang
    TI__Genius 9510 points

    Let me go back and answer your previous questions.

     

     

     

     

     

     

    In normal mode the, DM365 CPU controls the state of the PWCTRO0 pin during the reset sequence.  

    The state of the PWCTRO0 output pin affects the RTCSS reset, regardless of whether it's connected to the DM365 reset pin or not.  Apparently there must be some internal logic in the RTCSS that triggers reset based on this pin.

    So if you observed PWCTRO0 going low then that means the RTCSS WDT timer is expired, and resulted in the CPU setting the PWCTRO1 pin to 0. 

    To avoid this you must (almost immediately during power up sequence) clear the RTCSS WDT.  This should address the issue with RTCSS being reset upon CPU reset.

    To reset the CPU via WDT use the CPU WDT (difference from the RTCSS WDT) as described in the ARM SS User Guide

     

    http://focus.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=sprufg5a&fileType=pdf