Hi,
the TRM says that the I2C block has "Compliance with Philips I2C specification version 2.1"
The v2.1 spec adds a feature called clock streching by an I2C slave device
http://www.nxp.com/acrobat_download2/literature/9398/39340011.pdf
1.3 Version 2.1 - 2000 Version 2.1 of the I 2C-bus specification includes the following minor modifications: · After a repeated START condition in Hs-mode, it is possible to stretch the clock signal SCLH (see Section 13.2 and Figs 22, 25 and 32).
"After a repeated START condition and after each acknowledge bit (A) or not-acknowledge bit (A), the active master disables its current-source pull-up circuit. This enables other devices to delay the serial transfer by stretching the LOW period of the SCLH signal. The active master re-enables its current-source pull-up circuit again when all devices have released and the SCLH signal reaches a HIGH level, and so speeds up the last part of the SCLH signal’s rise time." I wanted to confirm that our HS master is in fact behaving like the above statement, so that an I2C slave device can stretch the clock.
Thanks, --Gunter