Watchdog connection on the EVM

Robert F.

Hi,

please can someone confirm the watchdog connection from EVM816x_Schematics_revb.pdf works ok when enabled by SW5? Unfortunately I do not have the EVM board and I can't test it by myself. Thank you very much.

- Robert

From tms320c6a8167 datasheet: WD_OUT - Drives H (during PORn reset) / Drives L (after PORn and Warm reset are deasserted and during Warm reset L)

The connection in schematic looks to me like a loop:

During POR the WD_OUT output goes H ... through U36 - output is L ... through U34 - output is L -> PORn = L => WD_OUT = H

Please correct me.

over 14 years ago

0 Kevin_Chen over 12 years ago

Intellectual 405 points

I also have this problem, right now, we donot consider to connect watchdog output to porz, but we still need figure out this problem, and I also notice that Ti did some modification on EVM board http://processors.wiki.ti.com/index.php/TI81XX_PSP_WDT_Driver_User_Guide,

so my question is, when the WD_OUT pin is pulled down as the modification, the porz can be asserted only when WD_OUT is high, is that reasonable, cause WD_OUT should active low when it is asserted(count overflow) ?

0 Pavel Botev over 12 years ago in reply to Kevin_Chen

TI__Guru**** 170625 points

Hi Kevin,

There are two silicon bugs related to the WDT in DM816x device.

http://www.ti.com/lit/er/sprz329d/sprz329d.pdf

Advisory 2.1.65 - Watchdog Timer (WDT): Watchdog Timer Generates Reset When Enabled For First Time After Power-On Reset

Revisions Affected: 2.1, 2.0

Advisory 1.1.37 - Watchdog Timer (WDT): Default Timeout Period of 2 ms is Too Short
Revisions Affected: 1.1, 1.0

Pavel

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Watchdog connection on the EVM