TDA4VM: Could MCU3_0 use mcu_timerIO to capture signal

Hi Shaobo Liu,

Could you please help me understand what exactly is this timerIO signal? What does it capture? 

Regards,

Brijesh

Hi Brijesh,

As shown below， we need to capture all signal edge timestamp to extract the object distance and echo status.

We have 12 ultrasonic sensors so we need 12 timerIO to capture all of them simultaneously.

Hello Shaobo Liu,

As i understand, you want to capture timestamp on every edge, rising and falling both, of the incoming single. Please confirm if this is correct understanding. 

12 timerIO is not possible. But instead of timerIO, can we use GPIO to trigger DMA to capture timestamp? On every GPIO input edge, we can trigger DMA to capture timestamp from one of the timer like GTC and store it in some memory location.. This is possible. 

Regards,

Brijesh

Hi Brijesh

   Your understanding is quite right.

    I did some test with reference to the link below （GPIO trigger DMA to capture timestamp）.

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1061801/faq-tda4vm-gpio-dma-trigger-in-tda4-and-test-in-sdk7-1?tisearch=e2e-sitesearch&keymatch=timer%252520triger%252520DMA#

   It works well, but how to use 12 gpios to trigger DMA,  could GPIOMUX and L2G support 12 requests to DMA ?

Hi Shaobo,

Yes, this is the code i was talking about and yes, it can support 12 GPIOs. But requires some changes in the resource allocation. We would require to allocate more number of DMA channels for the core that you are using and also GPIO DMA interrupt for this core.. 

So, yes, this is possible. 

Regards,

Brijesh

Hi Brijesh,

     Thanks very much, I will try it.

      And another question about sending pwm. There only 6  EPWM  Modules, could MCU3_0 access PRU_ICSSG_PWM module?

Hi Brijesh,

  How many  DMA Blkcpy channels are assigned to MCU3_0, only one channel?

  I find that the first Udma_chOpen  could be success, but the next Udma_chOpen will be fail.

The following is the error log：

[MCU3_0] 19.576660 s: chIdx:0 UDMA channel open sucess!
[MCU3_0] 19.577693 s: [UDMA]
[MCU3_0] 19.577727 s: [Error] RM Alloc Blkcpy Ch failed!!!
[MCU3_0] 19.577761 s: [UDMA]
[MCU3_0] 19.577777 s: [Error] Channel resource allocation failed!!
[MCU3_0] 19.577820 s: [Error]: UDMA channel open failed!!
[MCU3_0] 19.577854 s: ---------Error:-8

Hi,

Yes, there is only one Block Copy channel assigned to mcu3_0. If you want 12 block copy channels, we would have to change it in resource manager. 

Which release are you using? I will make the UDMA channels changes in the RM based on the release you are using and share it..

Regards,

Brijesh

Hi, Brijech

    We are using    'Processor SDK RTOS J721E 08_00_00'  right now.

Hi shaobo liu,

ok, one more question, please confirm that you using Linux and SPL boot mode.

Regards,

Brijesh

Hi  Brijesh,

    Yes, we are using Linux and SPL boot mode.

Hi  Brijesh

     Maybe the GPIOMUX RM also need to change to 12 for MCU3_0 .

Hi  Brijesh

   Are there any reference documents about modifying RM?

Hi  Brijesh

     I think linux-sdk/board-support/k3-image-gen-2021.09a/soc/j721e/evm/ rm-cfg.c  is resource configuration file, but I don`t know which resasg_entry is the DMA BLKCPY configuration.

Hi Shaobo Liu,

Yes, this is correct file, i will share the changes today to try it out.

Regards,

Brijesh

Hi Shaobo Liu,

Can you please copy attached file in PSDKLA\board-support\k3-image-gen-2021.05\soc\j721e\evm folder, regenerate sysfw.itb file by running "make sysfw-image" command from the PSDKLA top level folder and try using generated sysfw.itb from board-support/k3-image-gen-2021.05 folder?

Regards,

Brijesh

Hi Brijesh

  It`s very clear , I'll follow the process to make sysfw-image.

  I didn't see the attachment， didn't you upload it?

Hi Shaobo Liu,

Sorry, missed to include attachment.

/cfs-file/__key/communityserver-discussions-components-files/791/2330.rm_2D00_cfg.c

Rgds,

Brijesh

Hi Brijesh

    As we has change to Processor SDK RTOS J721E 08_01_00, so I revised the linux-sdk/board-support/k3-image-gen-2021.09a/soc/j721e/evm/rm_cfg.c  with reference to 2330.rm_2D00_cfg.c.

 First, I can successfully register the 5 DMA channels, but the 6th  fails,.The following is the failed log:

[MCU3_0] 16.838369 s: numBlkCopyCh=14
[MCU3_0] 16.838413 s: blkCopyChFlag[offset]=0x3fff
[MCU3_0] 16.838448 s: bitMask=0x1
[MCU3_0] 16.838478 s: chNum=28
[MCU3_0] 16.840041 s: chIdx:0 UDMA channel open sucess!

...

[MCU3_0] 16.849246 s: numBlkCopyCh=14
[MCU3_0] 16.849305 s: blkCopyChFlag[offset]=0x3ff0
[MCU3_0] 16.849339 s: bitMask=0x1
[MCU3_0] 16.849363 s: blkCopyChFlag[offset]=0x3ff0
[MCU3_0] 16.849393 s: bitMask=0x2
[MCU3_0] 16.849417 s: blkCopyChFlag[offset]=0x3ff0
[MCU3_0] 16.849447 s: bitMask=0x4
[MCU3_0] 16.849471 s: blkCopyChFlag[offset]=0x3ff0
[MCU3_0] 16.849501 s: bitMask=0x8
[MCU3_0] 16.849525 s: blkCopyChFlag[offset]=0x3ff0
[MCU3_0] 16.849555 s: bitMask=0x10
[MCU3_0] 16.849582 s: chNum=32
[MCU3_0] 16.850858 s: chIdx:4 UDMA channel open sucess!
[MCU3_0] 16.852108 s: numBlkCopyCh=14
[MCU3_0] 16.852166 s: blkCopyChFlag[offset]=0x3fe0
[MCU3_0] 16.852203 s: bitMask=0x1
[MCU3_0] 16.852228 s: blkCopyChFlag[offset]=0x3fe0
[MCU3_0] 16.852257 s: bitMask=0x2
[MCU3_0] 16.852281 s: blkCopyChFlag[offset]=0x3fe0
[MCU3_0] 16.852309 s: bitMask=0x4
[MCU3_0] 16.852333 s: blkCopyChFlag[offset]=0x3fe0
[MCU3_0] 16.852362 s: bitMask=0x8
[MCU3_0] 16.852385 s: blkCopyChFlag[offset]=0x3fe0
[MCU3_0] 16.852414 s: bitMask=0x10
[MCU3_0] 16.852438 s: blkCopyChFlag[offset]=0x3fe0
[MCU3_0] 16.852466 s: bitMask=0x20
[MCU3_0] 16.852490 s: chNum=33
[MCU3_0] 16.852858 s: [UDMA]
[MCU3_0] 16.852892 s: [Error] CQ ring alloc failed!!!
[MCU3_0] 16.852941 s: [UDMA]
[MCU3_0] 16.852966 s: [Error] Channel resource allocation failed!!
[MCU3_0] 16.853015 s: [Error]: UDMA channel open failed!!

CQ ring alloc failed.

Here is my modified rm_cfg.c: (I has also change the GPIOMUX )

8688.rm-cfg.c

Hi  Brijesh

  I think I already know how to fix it.

  It can be fixed by modify the RINGACC num_resource

679 {
680 .start_resource = 642,
681 .num_resource = 28,
682 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
683 RESASG_SUBTYPE_RA_GP),
684 .host_id = HOST_ID_MAIN_1_R5_0,
685 },

Hi Brijesh

  How to stop the current DMA transmission  and then start the next DMA transmission efficiently ?

Hi Shaobo Liu,

You could use Udma_chDisable to disable the channel or you could use Udma_chPause and Udma_chResume to pause and to resume the channel respectively. 

Regards,

Brijesh

I found that this Udma_chDisable  takes a long time to complete. 

Can the next transmission start from the first byte of the dest buf if I use Udma_chPause and Udma_chResume .

I found that this Udma_chDisable  takes a long time to complete. 

Can the next transmission start from the first byte of the dest buf if I use Udma_chPause and Udma_chResume .