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IPC Attach is not syncing

I am attempting to get some code running on a 6472 which uses core 0 and 2, and core 0 is not getting past the IPC_Attach call.

Below is the basic pseudo code of what I have:

core0:

main()

{

IPC_Start()

do{

status = IPC_Attach(slaveID);

}while(status <0)

PLL_init()

GPIO_init()

I2C_init()

DDR2_init()

Bios_start()

}

 

Core2:

main()

{

IPC_Start()

SRIO_init()

BIOS_Start()

}

Task1()

{

status = Ipc_attach(masterID);
     while(status < 0)
     {
         Task_sleep(1);
         status = Ipc_attach(masterID);
}

Notify_registerEvent()

do
 {
         status = HeapBufMP_open("MsgHeap", &heapHandle);
}
 while (status < 0);

 do {
         status = MessageQ_open(QName, &remoteQueueId);
 } while (status < 0)

...

}

Task2()

{

do
 {
         status = HeapBufMP_open("MsgHeap", &heapHandle);
}
 while (status < 0);

 do {
         status = MessageQ_open(QName, &remoteQueueId);
 } while (status < 0)

...

}

  • Did you make sure that you did not set in your .cfg file to sync all processors?  Make sure you didn't do this:

        Ipc.procSync = Ipc.ProcSync_ALL;

    The default is 'Ipc.ProcSync_PAIR' which is to sync a pair of processors.  The code above looks like it should work with this.

    If, you're already doing ProcSync_PAIR, then make sure you are calling Ipc_attach(remoteProcId) on both processors you are trying to attach. Make sure Task1 is being executed on core2.

    Judah

  • I do have Ipc.ProcSync_PAIR set in both .cfg files. Task1 is executing on core2, attempting to attach to core0, and core0 is attempting to attach to core2 in main.


    On the cases where core0 does not hang, I have been getting this exception:

                1 Exception_handler: EFR=0x2, NRP=0x81fae4, mode=supervisor
                2 Internal exception: IERR=0x18
                3 Opcode exception
                4 Resource conflict exception
                5 A0 =  00000000, A1 =  0000000c
                6 A2 =  00283194, A3 =  02c82000
                7 A4 =  00868e30, A5 =  00010000
                8 A6 =  00000000, A7 =  008662c8
                9 A8 =  00000000, A9 =  0086c3a4
               10 A10 = 00853994, A11 = 00853984
               11 A12 = 00000000, A13 = 00000000
               12 A14 = 00000000, A15 = 00000000
               13 A16 = 00876638, A17 = 00000000
               14 A18 = 00868c40, A19 = 00000590
               15 A20 = 00866210, A21 = 02199fa0
               16 A22 = fffffffe, A23 = ffffffff
               17 A24 = bc7f42bf, A25 = fffffffe
               18 A26 = 99fa0080, A27 = fffffffd
               19 A28 = 33f40100, A29 = 00000020
               20 A30 = 008691e8, A31 = 00000000
               21 B0 =  00000001, B1 =  00f00598
               22 B2 =  00000001, B3 =  0024069a
               23 B4 =  008691d8, B5 =  02c82070
               24 B6 =  00868c40, B7 =  02c82000
               25 B8 =  00000008, B9 =  00251b50
               26 B10 = 00246574, B11 = 002464cc
               27 B12 = 00000000, B13 = 00000000
               28 B14 = 0087fa40, B15 = 00f004e8
               29 B16 = 00000001, B17 = 00000001
               30 B18 = 00251b80, B19 = ffffff02
               31 B20 = 00251914, B21 = 00251958
               32 B22 = 00000008, B23 = e96fe6a9
               33 B24 = ffffffff, B25 = ffffffff
               34 B26 = ffffffff, B27 = 00000100
               35 B28 = 00000001, B29 = 00000000
               36 B30 = 0000056d, B31 = 02c80500
               37 NTSR = 0001000f
               38 ITSR = 0000000f
               39 IRP  = 002412e8
               40 SSR  = 00000000
               41 AMR  = 00000000
               42 RILC = 00000000
               43 ILC  = 00000000
               44 Exception abort!

  • You're getting an internal resource conflict exception.  I'm not sure what is causing this.  Somtimes, if you have assembly code and two instructions are writing to the same register in the same cycle, you will get this exceptiohn.  The printout should give you some clues into debugging this.

    NRP is where the exception was taken.  This means that typically the exception happened around this address (usually a 2-5 cycles before it).

    B3 is also useful because it tells you, what your return address is.

    With this information, you will need to back trace to see what may have caused the exception.

    Judah

  • I discovered my problem: code sections are overlapping between my two executables. The problem is I don't know how this is happenning. Core0 is using Shared L2 for code and Core2 should only be usingShare L2 for the IPC Shared region. Somehow Core2 is getting its _c_int00 located into Shared L2 and overwriting Core0 code. The rest of Core2 is correctly using Local L2 for code.

    Linker.cmd:

    SECTIONS

    {

    .text:_c_int00: ALIGN 1024

    }

    Any clue how my _c_int00 code is making it into SL2?

  • Can you please attach your complete linker .cmd file?   It looks like that section is not being explicitly placed (usually with a "> DDR" or some such.   If section isn't placed then the linker will guess and place it for you.   If you use the linker -w flag, it will complain saying "placed without directive" or some such.  Are you getting a warning?   Can you zip up and attach the complete linker.cmd file?


    Thanks,
    -Karl-

  • Thanks for the clue Karl. In my linker file I only had the align directive. Once I added the > LL2RAM statement _above_ the align statement it solved my problems. At first I was confiused because I didn't think that order mattered in linker.cmd files, it looks like it does.

    Thanks!