AMIC110: AMIC110 McSPI single channel (Master)

Anil Garg

Part Number: AMIC110

Hi,

I am using AMIC110 CUSTUM board to SPI interface with EEPROM . During interfacing my observations are :

1. If I configure SCLK pin as output via disabling the CONF_<module>_<pin>_RXACTIVE bit then I can able to transmit data properly but I am not able read data into the SPI Buffer.

2. If I configure SCLK pin as input or output via enabling the CONF_<module>_<pin>_RXACTIVE bit then I can able to transmit and receive data properly into the SPI Buffer.

I further like to understand the above interpretation.

Thanks,

Anil Garg

over 4 years ago

0 PaulM over 4 years ago

TI__Mastermind 29675 points

Anil

For timing purposes, the SPI CLK generated by the AMIC110 is "looped back" at the pad in order to provide the clock for the receiver circuit.. The clock RX must be enabled for this to work. The Sysconflig/pinmux tool should automatically enable the clock RX for any SPI selections.

--Paul

0 Anil Garg over 4 years ago in reply to PaulM

Intellectual 510 points

Thanks Paul for reply. As i am understanding that its a design flow of processor. because SPI driver never claim to configure SCLK pin as input or output mode(Both). Please confirm, May i correct or wrong?

0 PaulM over 4 years ago in reply to Anil Garg

TI__Mastermind 29675 points

It is a requirement of the design that RX is enabled for the output clock. This is the same requirement for some other interfaces.

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AMIC110: AMIC110 McSPI single channel (Master)