DRA821U: Ethernet CPSW2G, CPSW5G Switch Configuration

Any update on this information, please?

Thanks!

Hi,

Swapna yendrapalli said:

How to configure(pinmux, switch) cpsw2g in RMII mode with phy DP83822I ? . Where is the pinmux setting handled in QNX/RTOS, please? In QNX hardware_init we saw settings for other drivers but not cpsw2g. PDK has some configurations but it appears to use PDK we need RTOS image running?

The CPSW2G pinmux configuration is handled at the bootloader level. So depending on which bootloader you are using ( SPL+UBOOT or SBL), both of them does the needed configuration. The current driver is implemented to support RGMII mode. Supporting RMII mode will required some updates.

Swapna yendrapalli said:

ow to configure(pinmux, switch) cpsw5g in RMII mode with phy DP83822I?

The CPSW5G pinmux configuration is done by the EthFW image which uses the PDK board configuration to do this.

See EthFW documentation here: https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-j7200/latest/exports/docs/ethfw/docs/user_guide/index.html 

Swapna yendrapalli said:

• It looks like we have to use FreeRTOS on R5F to bring up the cpsw5g switch. Any pointers and examples to access this switch from userspace on QNX (Ex: Setting up VLAN, Reading Link Status)?
  • it looks like when we build ethfw we generate rj7200-main-r5f0_0-fw,j7200-main-r5f0_1-fw. Do we need to use both for 5 port ethernet switch?
  • How to reduce the size of r5f2_0 (currently 4.7MiB )

• Wondering if TI has plans to support accessing cpsw5g on QNX A72. If so could you please let us know the timeline?

The PSDK QNX 8.1 release does provide support for the QNX CPSW5G virtual Ethernet driver to use the EthFW running on the R5 that control the CPSW5G Switch. See https://www.ti.com/tool/download/PROCESSOR-SDK-QNX-J7200/

Check documentation:https://software-dl.ti.com/jacinto7/esd/processor-sdk-qnx-j7200/08_01_00_05/exports/docs/qnx_sdk_components_j7200.html#cpsw5g-devnp-driver 

Regards.

Thanks Praveen!

Please comment on follow-up questions in BLUE 

• cpsw2g : I can change the switch configuration to RMII mode. Please advise if there are any changes needed for PHY DP838221?
• cpsw5g:
  • how to configure(pinmux, switch) cpsw5g in RMII mode with phy DP83822I?

    The CPSW5G pinmux configuration is done by the EthFW image which uses the PDK board configuration to do this. See EthFW documentation here: https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-j7200/latest/exports/docs/ethfw/docs/user_guide/index.html

            
  • Could you please point to the files to change pinmux config, RMII mode and use PHY DP838221

• Wondering if TI has plans to support accessing cpsw5g on QNX A72. If so could you please let us know the timeline?
  
  • I was wondering if A72 can directly access the cpsw5g switch without loading the free RTOS image?
• It looks like we have to use FreeRTOS on R5F to bring up the cpsw5g switch. Any pointers and examples to access this switch from userspace on QNX (Ex: Setting up VLAN, Reading Link Status)?
  • it looks like when we build ethfw we generate rj7200-main-r5f0_0-fw,j7200-main-r5f0_1-fw. Do we need to use both for 5 port ethernet switch?
  • How to reduce the size of r5f2_0 ( currently 4.7MiB )

Hi Swapna.

Regarding first & last 2 questions, I will request my colleagues from EthFW team to answer them.

On:

Swapna yendrapalli said:

I was wondering if A72 can directly access the cpsw5g switch without loading the free RTOS image?

Yes, In the SoC, A72 can directly access the CPSW5G switch, but the current TI SDK software offering only provide the CPSW5G switch software (EthFW) to be running only on R5. There is no plan to implement a  QNX A72 native driver for CPSW5G.

Swapna yendrapalli said:

It looks like we have to use FreeRTOS on R5F to bring up the cpsw5g switch. Any pointers and examples to access this switch from userspace on QNX (Ex: Setting up VLAN, Reading Link Status)?

The complete CPSW5G virtual driver source code is provided as for the PSDK QNX release and feel free to look into it. TI is not aware of any example to access the switch from userspace on QNX. Suggest contacting QNX directly on this.

Thanks.

Thank You Praveen!

I will wait for your input to configure pinmux , switch, and phy DP83822I for cpsw2g and cpsw5g in RMII mode before closing this ticket.

Hi EthFW Team ,

Our custom boards based on this processor will be in-house soon. Could you please provide an application note on how to configure the switch ( cpsw2g + cpsw5g) in RMII mode, needed pinmux  and Phy DP83822I configuration details.

We are using tisdk 8.1 for development

Thanks for your support!

Hi Praveen Rao

Can you please suggest QNX point of contact for the same?

Thanks

Bharat Gebise said:

Can you please suggest QNX point of contact for the same?

Is this regarding the query "pointers and examples to access this switch from userspace on QNX (Ex: Setting up VLAN, Reading Link Status)". If yes, suggest to contact your QNX representative directly or check on qnx.com.

Thanks. 

Bharat, 

Not sure if you got your boards back and if you still need help on pinmux and PHY driver support in ethfw. Please give an update of current status and then I will reassign to the ethfw to help as needed. 

Jian

Hi Jian, as we are following Linux-related questions on another thread. you can ignore the QNX-related question by Bharat. thanks.