Hi sir,
I am using Beagleboard-x15 with ti-processor-sdk-linux-am57xx-evm-06.01.00.08 and u-boot 2019.1 and Linux 4.19.59 using,
Actually Beagle board x-15 of p16 connector is connected our custom fpga board from fpga to rugged camera(1080p30) connected.(Beagle-->custom fpga(I2C3)-->camera)
From beagle board x15 we are able to communicating FPGA device through i2c3 and getting Device ID of FPGA.
Actually FPGA device i am taken like OV490 device.
DTS File:
&vin3a {
vin3a_ep: endpoint {
bus-type = <0>;
hsync-active = <1>;
vsync-active = <1>;
pclk-sample = <1>;
bus-width = <16>;
channels = <0>;
remote-endpoint = <&cam>;
slave-mode;
};
};
&vip2 {
status = "okay";
};
&i2c3 {
status = "okay";
clock-frequency = <400000>;
ov490@3C {
compatible = "ovti,ov490";
reg = <0x3C>;
port {
cam: endpoint {
bus-type = <0>;
hsync-active = <1>;
vsync-active = <1>;
pclk-sample = <1>;
bus-width = <16>;
channels = <0>;
remote-endpoint = <&vin3a_ep>;
};
};
};
};
OV490.C code
// SPDX-License-Identifier: GPL-2.0
/*
* OmniVision OV490 Camera Driver
*
* Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
* Author: Nikhil Devshatwar <nikhil.nd@ti.com>
*/
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/v4l2-mediabus.h>
#include <linux/videodev2.h>
#include <linux/mutex.h>
#include <linux/delay.h>
#include <media/soc_camera.h>
#include <media/v4l2-async.h>
#include <media/v4l2-common.h>
#include <linux/gpio/consumer.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_graph.h>
#include <media/v4l2-fwnode.h>
#include <media/v4l2-event.h>
#include <media/v4l2-subdev.h>
/* Register definitions */
#define OV490_DEFAULT_SLAVE_ID 0x3c
#define OV490_REG_SYS_CARAVEL 0x3000
#define OV490_REG_SLAVE_ID 0x3100
#define OV490_PID 0x300a
#define OV490_VER 0x300b
#define OV490_BANK_HIGH 0xfffd
#define OV490_BANK_LOW 0xfffe
#define OV490_MIPI_TX_LANE_CTRL2 0x8029202D
#define OV490_MIPI_TX_LANE_CTRL0 0x80292015
#define OV490_SC_RESET1 0x80800011
#define OV490_FW_VER_HIGH 0x80800102
#define OV490_FW_VER_LOW 0x80800103
#define OV490_IMAGE0_CTRL 0x8082000a
#define OV490_IMAGE0_BYTE_INVERT BIT(7)
#define OV490_IMAGE0_BYTE_SEQUENCE GEN_MASK(6, 4)
#define OV490_IMAGE0_BYTE_SEQUENCE_1 BIT(4)
#define OV490_IMAGE0_FORMAT_SELECT GEN_MASK(3, 0)
#define OV490_IMAGE0_FORMAT_PURE_RAW12 0x0
#define OV490_IMAGE0_FORMAT_3X12_RAW 0x2
#define OV490_IMAGE0_FORMAT_2X12_RAW 0x3
#define OV490_IMAGE0_FORMAT_20_COMBINED_RAW 0x4
#define OV490_IMAGE0_FORMAT_16_COMPRESSED_RAW 0x5
#define OV490_IMAGE0_FORMAT_12_COMPRESSED_RAW 0x6
#define OV490_IMAGE0_FORMAT_2X12_COMPRESSED_RAW 0x7
#define OV490_IMAGE0_FORMAT_12_SELECTED_RAW 0x8
#define OV490_IMAGE0_FORMAT_12_YUV422 0xf
/* IDs */
#define OV490_VERSION_REG 0x0490
#define OV490_VERSION(pid, ver) (((pid) << 8) | ((ver) & 0xff))
#define OV490_MAX_WIDTH 1920
#define OV490_MAX_HEIGHT 1080
#define MAX_NUM_GPIOS 10
/* Host Command Flow */
#define OV490_STATUS_ADDR (0x80195ffc)
#define OV490_HOST_CMD_PARA_ADDR (0x80195000)
#define OV490_HOST_CMD_RESULT_ADDR (0x80195000)
#define OV490_HOST_INT_ADDR (0x808000c0)
#define OV490_STATUS_FINISH (0x99)
#define OV490_STATUS_ERROR (0x55)
/* Host Command List */
#define OV490_CMD_BRIGHTNESS_SET (0xf1)
#define OV490_CMD_SATURATION_SET (0xf3)
#define OV490_CMD_HUE_SET (0xf5)
#define OV490_CMD_FRAMERATE_SET (0xf7)
#define OV490_CMD_GAMMA_SET (0xf9)
#define OV490_CMD_SHARPNESS_SET (0xfb)
#define OV490_CMD_CONTRAST_SET (0xfd)
#define OV490_CMD_GROUPWRITE_SET (0xe1)
#define OV490_CMD_STREAMING_CTRL (0xe2)
#define OV490_CMD_CONTEXT_SWITCH_CONFIG (0xe3)
#define OV490_CMD_CONTEXT_SWITCH_CTRL (0xe4)
#define OV490_CMD_MULT_CMD (0xe5)
#define OV490_CMD_GPIO_SET (0xe6)
#define OV490_CMD_GPIO_GET (0xe7)
#define OV490_CMD_FORMAT_SET (0xe8)
#define OV490_CMD_TEMP_GET (0xe9)
#define OV490_CMD_EXPOSURE_GAIN_SET (0xea)
#define OV490_CMD_AWBGAIN_SET (0xeb)
#define OV490_CMD_DENOISE_SET (0xec)
#define OV490_CMD_TONECURVE_SET (0xed)
#define OV490_CMD_COMB_WEIGHT_SET (0xee)
#define OV490_CMD_AEC_WEIGHT_SET (0xd2)
#define OV490_CMD_AWB_ROI_SET (0xd3)
#define OV490_CMD_TONEMAPPING_ROI_SET (0xd4)
#define OV490_CMD_STAT_ROI_SET (0xd5)
#define OV490_CMD_TESTPATTERN_SET (0xd6)
#define OV490_CMD_MTF_SET (0xd7)
#define OV490_CMD_LENC_SET (0xd8)
#define OV490_CMD_BLC_SET (0xd9)
#define OV490_CMD_GROUPWRITE_LAUNCH (0xda)
#define OV490_CMD_EMBLINE_CTRL (0xdb)
#define OV490_CMD_MIRRFLIP_CTRL (0xdc)
#define OV490_CMD_EXTRA_VTS_SET (0xde)
#define OV490_CMD_SNR_REG_ACCESS (0xc1)
#define OV490_CMD_POSTAWBGAIN_SET (0xc2)
#define OV490_CMD_CROP_SET (0xc3)
#define OV490_CMD_FRAMESYNC (0xc4)
#define OV490_CMD_BANDING_SET (0xc5)
#define OV490_CMD_TOPEMB_SET (0xc7)
#define OV490_CMD_FWREG_ACCESS (0x35)
#define OV490_CMD_FADE_CTRL (0x37)
#define OV490_CMD_INIT_CTRL (0x39)
#define OV490_CMD_RESET_CTRL (0x3a)
#define DEBUG 1
/*
* = fvco / pixel_width * num_lanes
* = 804,000,000 / 16 bits * 4 lanes
*/
#define OV490_PIXEL_RATE_PER_LANE 50250000
static u8 ov490_init_param[] = {
0x31, /* [3:0]input port, [7:4] input format */
0x01, /* [3:0]output port, [7:4] output format */
0x05, /* in width: 1288 */
0x08,
0x04, /* in height:1080 */
0x40,
0x05, /* out width: 1288 */
0x08,
0x04, /* out height:1080 */
0x40,
0x00,
};
struct ov490_color_format {
u32 code;
u32 colorspace;
u32 coplaner;
u32 fourcc;
};
struct ov490_priv {
struct v4l2_subdev subdev;
struct v4l2_async_subdev asd;
const struct ov490_color_format *cfmt;
int width;
int height;
int num_lanes;
struct regmap *regmap;
struct gpio_descs *mux_gpios;
struct v4l2_ctrl_handler handler;
struct v4l2_ctrl *pixel_rate;
};
struct ov490_dev {
struct i2c_client *i2c_client;
struct v4l2_subdev sd;
struct media_pad pad;
struct v4l2_fwnode_endpoint ep; /* the parsed DT endpoint info */
struct clk *xclk; /* system clock to OV5640 */
u32 xclk_freq;
//struct regulator_bulk_data supplies[OV5640_NUM_SUPPLIES];
struct gpio_desc *reset_gpio;
struct gpio_desc *pwdn_gpio;
bool upside_down;
/* lock to protect all members below */
struct mutex lock;
int power_count;
struct v4l2_mbus_framefmt fmt;
bool pending_fmt_change;
//const struct ov5640_mode_info *current_mode;
//const struct ov5640_mode_info *last_mode;
//enum ov5640_frame_rate current_fr;
struct v4l2_fract frame_interval;
u64 pixel_rate;
//struct ov5640_ctrls ctrls;
u32 prev_sysclk, prev_hts;
u32 ae_low, ae_high, ae_target;
bool pending_mode_change;
bool streaming;
};
/* Main access control */
DEFINE_MUTEX(ov490_lock);
static int ov490_init_gpios(struct i2c_client *client);
/*
* supported color format list
*/
static const struct ov490_color_format ov490_cfmts[] = {
{
.code = MEDIA_BUS_FMT_UYVY8_2X8,//MEDIA_BUS_FMT_UYVY8_1X16,//
.colorspace = V4L2_COLORSPACE_SMPTE170M,
.coplaner = 0,
.fourcc = V4L2_PIX_FMT_UYVY,//V4L2_PIX_FMT_SGBRG8,
},
};
static struct ov490_priv *to_ov490(const struct i2c_client *client)
{
return container_of(i2c_get_clientdata(client), struct ov490_priv,
subdev);
}
static struct v4l2_subdev *ctrl_to_sd(struct v4l2_ctrl *ctrl)
{
return &container_of(ctrl->handler, struct ov490_priv, handler)->subdev;
}
static int ov490_reg_write32(struct regmap *map, u32 reg, u8 val)
{
u8 bank_high = (reg >> 24) & 0xff;
u8 bank_low = (reg >> 16) & 0xff;
u16 reg_addr = reg & 0xffff;
int ret = 0;
/* For writing a register with 32 bit address, First set the bank
* address by writing to two BANK address registers. Then access
* the register using 16LSB bits.
*/
ret = regmap_write(map, OV490_BANK_HIGH, bank_high);
if (!ret)
ret = regmap_write(map, OV490_BANK_LOW, bank_low);
if (!ret)
ret = regmap_write(map, reg_addr, val);
return ret;
}
static int ov490_reg_read32(struct regmap *map, u32 reg, u8 *val)
{
u8 bank_high = (reg >> 24) & 0xff;
u8 bank_low = (reg >> 16) & 0xff;
u16 reg_addr = reg & 0xffff;
int ret = 0;
u32 tval = 0;
/*
* For reading a register with 32 bit address, First set the bank
* address by writing to two BANK address registers. Then access
* the register using 16LSB bits.
*/
ret = regmap_write(map, OV490_BANK_HIGH, bank_high);
if (!ret)
ret = regmap_write(map, OV490_BANK_LOW, bank_low);
if (!ret)
ret = regmap_read(map, reg_addr, &tval);
*val = (u8)tval;
return ret;
}
static int ov490_init_slave_id(struct ov490_dev *sensor)
{
struct i2c_client *client = sensor->i2c_client;
struct i2c_msg msg;
u8 buf[3];
int ret;
dev_info(&client->dev, "ov490_init_slave_id start!\n");
dev_err(&client->dev, "%s: client->addr= %x\n", __func__,client->addr );
if (client->addr == OV490_DEFAULT_SLAVE_ID)
return 0;
buf[0] = OV490_REG_SLAVE_ID >> 8;
buf[1] = OV490_REG_SLAVE_ID & 0xff;
buf[2] = client->addr << 1;
msg.addr = OV490_DEFAULT_SLAVE_ID;
msg.flags = 0;
msg.buf = buf;
msg.len = sizeof(buf);
ret = i2c_transfer(client->adapter, &msg, 1);
if (ret < 0) {
dev_err(&client->dev, "%s: failed with %d\n", __func__, ret);
return ret;
}
dev_info(&client->dev, "ov490_init_slave_id over!\n");
return 0;
}
static int ov490_cispl_read_reg(struct ov490_dev *sensor, u16 reg, u16 *val)
{
struct i2c_client *client = sensor->i2c_client;
struct i2c_msg msg[1];
u8 buf[2];
int ret;
buf[0] = reg & 0xff;
msg[0].addr = client->addr;
msg[0].flags = client->flags | I2C_M_RD;
msg[0].buf = buf;
msg[0].len = 2;
ret = i2c_transfer(client->adapter, msg, 1);
if (ret < 0) {
dev_err(&client->dev, "%s: error: reg=%x\n",
__func__, reg);
return ret;
}
*val = buf[0]<<8 | buf[1];;
// *val = buf[0];
return 0;
}
static int ov490_host_control_set(struct regmap *map, u8 host_cmd,
u8 *param, u16 number)
{
int i, ret;
u8 status = 0;
/* Host reset OV490_status_register */
ret = ov490_reg_write32(map, OV490_STATUS_ADDR, 0);
if (ret)
return ret;
for (i = 0; i < number; i++) {
ret = ov490_reg_write32(map, OV490_HOST_CMD_PARA_ADDR + i,
*(param + i));
if (ret)
return ret;
}
ret = ov490_reg_write32(map, OV490_HOST_INT_ADDR, host_cmd);
if (ret)
return ret;
for (i = 500; i && status != OV490_STATUS_FINISH; i--) {
ret = ov490_reg_read32(map, OV490_STATUS_ADDR, &status);
if (ret)
return ret;
usleep_range(500, 1000);
}
if (!i)
return -ETIMEDOUT;
return 0;
}
static int __maybe_unused ov490_host_control_get(struct regmap *map,
u8 host_cmd, u8 *param,
u16 number)
{
int i, ret;
u8 status = 0;
/* Host reset OV490_status_register */
ret = ov490_reg_write32(map, OV490_STATUS_ADDR, 0);
if (ret)
return ret;
ret = ov490_reg_write32(map, OV490_HOST_INT_ADDR, host_cmd);
if (ret)
return ret;
for (i = 500; i && status != OV490_STATUS_FINISH; i--) {
ret = ov490_reg_read32(map, OV490_STATUS_ADDR, &status);
if (ret)
return ret;
usleep_range(500, 1000);
}
if (!i)
return -ETIMEDOUT;
for (i = 0; i < number; i++) {
ret = ov490_reg_read32(map, OV490_HOST_CMD_PARA_ADDR + i,
(param + i));
if (ret)
return ret;
}
return 0;
}
static int ov490_get_fw_version(struct regmap *map, u16 *id)
{
u8 hi, lo;
int ret;
ret = ov490_reg_read32(map, OV490_FW_VER_HIGH, &hi);
if (ret)
return ret;
ret = ov490_reg_read32(map, OV490_FW_VER_LOW, &lo);
if (ret)
return ret;
*id = hi << 8 | lo;
return 0;
}
/* Start/Stop streaming from the device */
static int ov490_s_stream(struct v4l2_subdev *sd, int enable)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct ov490_priv *priv = to_ov490(client);
struct regmap *map = priv->regmap;
int ret, val;
u8 streaming;
/* mutex_lock(&ov490_lock);
ret = ov490_init_gpios(client);
if (ret) {
dev_err(&client->dev, "Failed to request gpios");
goto unlock;
}
if (!enable) {
streaming = 0;
/* Stop Streaming /
ret = ov490_host_control_set(map, OV490_CMD_STREAMING_CTRL,
&streaming, 1);
if (ret)
goto unlock;
ret = ov490_reg_write32(map, OV490_MIPI_TX_LANE_CTRL0, 0xa0);
if (ret)
goto unlock;
/* Put MIPI_TX in reset
ret = ov490_reg_write32(map, OV490_SC_RESET1, 0x80);
goto unlock;
}
/* Take MIPI_TX out of reset
ret = ov490_reg_write32(map, OV490_SC_RESET1, 0x00);
if (ret)
goto unlock;
ret = ov490_reg_write32(map, OV490_MIPI_TX_LANE_CTRL0, 0x80);
if (ret)
goto unlock;
/* Initialize slave
ret = ov490_host_control_set(map, OV490_CMD_INIT_CTRL, ov490_init_param,
ARRAY_SIZE(ov490_init_param));
if (ret)
goto unlock;
ret = ov490_reg_write32(map, OV490_IMAGE0_CTRL,
OV490_IMAGE0_BYTE_INVERT |
OV490_IMAGE0_BYTE_SEQUENCE_1 |
OV490_IMAGE0_FORMAT_3X12_RAW);
if (ret)
goto unlock;
/* Set number of data lane to use
val = priv->num_lanes == 2 ? 0x03 : priv->num_lanes == 4 ? 0x0F : 0x0F;
ret = ov490_reg_write32(map, OV490_MIPI_TX_LANE_CTRL2, val);
if (ret)
goto unlock;
/* Start Streaming
streaming = 0x1;
ret = ov490_host_control_set(map, OV490_CMD_STREAMING_CTRL,
&streaming, 1);
unlock:
mutex_unlock(&ov490_lock);
*/
return ret;
}
static int ov490_get_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *fmt)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct ov490_priv *priv = to_ov490(client);
struct v4l2_mbus_framefmt *mf = &fmt->format;
mf->width = priv->width;
mf->height = priv->height;
mf->code = priv->cfmt->code;
mf->colorspace = priv->cfmt->colorspace;
mf->field = V4L2_FIELD_NONE;
return 0;
}
/* Fixed format - no configurability */
static int ov490_set_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *fmt)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct ov490_priv *priv = to_ov490(client);
struct v4l2_mbus_framefmt *mf = &fmt->format;
mf->width = priv->width;
mf->height = priv->height;
mf->code = priv->cfmt->code;
mf->colorspace = priv->cfmt->colorspace;
mf->field = V4L2_FIELD_NONE;
return 0;
}
static int ov490_enum_code(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_mbus_code_enum *code)
{
struct i2c_client *client = v4l2_get_subdevdata(sd);
struct ov490_priv *priv = to_ov490(client);
if (code->index >= ARRAY_SIZE(ov490_cfmts))
return -EINVAL;
code->code = ov490_cfmts[0].code;
dev_info(&client->dev, "enum code set!");
return 0;
}
static int ov490_enum_size(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_frame_size_enum *fse)
{
int cam_width[] = { OV490_MAX_WIDTH };
int cam_height[] = { OV490_MAX_HEIGHT };
if (fse->index >= ARRAY_SIZE(cam_width))
return -EINVAL;
fse->min_width = cam_width[fse->index];
fse->max_width = fse->min_width;
fse->min_height = cam_height[fse->index];
fse->max_height = fse->min_height;
return 0;
}
static int ov490_s_ctrl(struct v4l2_ctrl *ctrl)
{
struct v4l2_subdev *sd = ctrl_to_sd(ctrl);
struct i2c_client *client = v4l2_get_subdevdata(sd);
/* If the board has programmable pixel clock, set it here */
if (ctrl->id == V4L2_CID_PIXEL_RATE)
dev_info(&client->dev, "Pixel rate set to %d\n",
ctrl->val);
return 0;
}
static int ov490_init_gpios(struct i2c_client *client)
{
struct ov490_priv *priv = to_ov490(client);
int ret = 0;
/* Request the gpio lines and set the values
* then release them so that other drivers can use them
* This allows changing common board muxes which are
* controlled by multiple drivers
*/
priv->mux_gpios = gpiod_get_array(&client->dev, "mux", GPIOD_OUT_HIGH);
if (IS_ERR(priv->mux_gpios))
goto done;
gpiod_put_array(priv->mux_gpios);
done:
return ret;
}
static int ov490_video_probe(struct i2c_client *client)
{
struct ov490_priv *priv = i2c_get_clientdata(client);
u32 pid, ver;
int ret;
u16 version;
/* check and show product ID and manufacturer ID */
/* ret = regmap_read(priv->regmap, OV490_PID, &pid);
if (ret)
return ret;
ret = regmap_read(priv->regmap, OV490_VER, &ver);
if (ret)
return ret;
if (OV490_VERSION(pid, ver) != OV490_VERSION_REG) {
dev_err(&client->dev, "Product ID error %02x:%02x\n", pid, ver);
return -ENODEV;
}
dev_info(&client->dev, "ov490 Product ID %02x Manufacturer ID %02x\n",
pid, ver);
ret = ov490_get_fw_version(priv->regmap, &version);
if (ret)
return ret;
*/
dev_info(&client->dev, "lte80 driver registered");
return 0;
}
static const struct v4l2_subdev_video_ops ov490_video_ops = {
.s_stream = ov490_s_stream,
};
static const struct v4l2_subdev_core_ops ov490_core_ops = {
.log_status = v4l2_ctrl_subdev_log_status,
.subscribe_event = v4l2_ctrl_subdev_subscribe_event,
.unsubscribe_event = v4l2_event_subdev_unsubscribe,
};
static const struct v4l2_subdev_pad_ops ov490_pad_ops = {
.enum_mbus_code = ov490_enum_code,
.enum_frame_size = ov490_enum_size,
.get_fmt = ov490_get_fmt,
.set_fmt = ov490_set_fmt,
};
static const struct v4l2_subdev_ops ov490_subdev_ops = {
.video = &ov490_video_ops,
.core = &ov490_core_ops,
.pad = &ov490_pad_ops,
};
static const struct v4l2_ctrl_ops ov490_ctrl_ops = {
.s_ctrl = ov490_s_ctrl,
};
static const struct regmap_config ov490_regmap_config = {
.reg_bits = 16,
.val_bits = 8,
};
/*
* i2c_driver function
*/
static int ov490_of_probe(struct i2c_client *client,
struct device_node *node)
{
struct ov490_priv *priv = to_ov490(client);
struct v4l2_fwnode_endpoint endpoint = {};
struct device_node *ep;
int num_lanes = 0;
ep = of_graph_get_next_endpoint(node, NULL);
if (ep) {
v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &endpoint);
if (endpoint.bus_type == V4L2_MBUS_PARALLEL)
{
dev_info(&client->dev, "parallel bus found!\n");
}
else
{
dev_err(&client->dev, "Endpoint bus is not CSI bus!");
}
}
dev_info(&client->dev, "Using %d data lanes\n", priv->num_lanes);
return 0;
}
static int ov490_check_chip_id(struct ov490_dev *sensor)
{
struct i2c_client *client = sensor->i2c_client;
int ret = 0;
u16 chip_id;
dev_info(&client->dev, "ov490_check_chip_id start!\n");
ov490_init_slave_id(sensor);
ret = ov490_cispl_read_reg(sensor, OV490_REG_SYS_CARAVEL, &chip_id);
if (ret) {
dev_err(&client->dev, "%s: failed to read chip identifier\n",
__func__);
// goto power_off;
}
if (chip_id != 0x5640) {
dev_err(&client->dev, "%s: wrong chip identifier, expected 0x5640, got 0x%x\n",
__func__, chip_id);
ret = -ENXIO;
}
dev_info(&client->dev, "ov490_check_chip_id over!\n");
//power_off:
// ov5640_set_power_off(sensor);
// return ret;
}
static int ov490_probe(struct i2c_client *client,
const struct i2c_device_id *did)
{
struct device_node *node = client->dev.of_node;
struct v4l2_ctrl_handler *hdl;
struct ov490_priv *priv;
struct ov490_dev *sensor;
struct v4l2_subdev *sd;
int ret = 0;
priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
i2c_set_clientdata(client, priv);
dev_info(&client->dev, "i2c_set_clientdata over!\n");
//priv->num_lanes = 4;
priv->cfmt = &ov490_cfmts[0];
priv->width = OV490_MAX_WIDTH;
priv->height = OV490_MAX_HEIGHT;
/* priv->regmap = devm_regmap_init_i2c(client, &ov490_regmap_config);
if (IS_ERR(priv->regmap))
return PTR_ERR(priv->regmap);*/
ret = ov490_video_probe(client);
if (ret)
goto err;
dev_info(&client->dev, "ov490_video_probe over!\n");
ret = ov490_of_probe(client, node);
if (ret)
goto err;
dev_info(&client->dev, "ov490_of_probe over!\n");
sd = &priv->subdev;
v4l2_i2c_subdev_init(sd, client, &ov490_subdev_ops);
dev_info(&client->dev, "v4l2_i2c_subdev_init over!\n");
//dev_info(&client->dev, "ov490_check_chip_id!\n");
//ret = ov490_check_chip_id(sensor);
hdl = &priv->handler;
sd->ctrl_handler = hdl;
v4l2_ctrl_handler_init(hdl, 1);
/* priv->pixel_rate =
v4l2_ctrl_new_std(hdl, &ov490_ctrl_ops,
V4L2_CID_PIXEL_RATE, 1, INT_MAX, 1,
OV490_PIXEL_RATE_PER_LANE * priv->num_lanes);
if (hdl->error) {
dev_err(&client->dev, "Failed to add controls");
ret = hdl->error;
goto err;
}
ret = ov490_init_gpios(client);
if (ret) {
dev_err(&client->dev, "Failed to request gpios");
goto err;
}
*/
sd->dev = &client->dev;
ret = v4l2_async_register_subdev(sd);
err:
mutex_destroy(&sensor->lock);
return ret;
}
static int ov490_remove(struct i2c_client *client)
{
struct ov490_priv *priv = i2c_get_clientdata(client);
v4l2_device_unregister_subdev(&priv->subdev);
v4l2_ctrl_handler_free(&priv->handler);
return 0;
}
static const struct i2c_device_id ov490_id[] = {
{ "ov490", 0 },
{ }
};
MODULE_DEVICE_TABLE(i2c, ov490_id);
static const struct of_device_id ov490_dt_id[] = {
{
.compatible = "ovti,ov490",
},
{
}
};
MODULE_DEVICE_TABLE(of, ov490_dt_id);
static struct i2c_driver ov490_i2c_driver = {
.driver = {
.name = "ov490",
.of_match_table = ov490_dt_id,
},
.probe = ov490_probe,
.remove = ov490_remove,
.id_table = ov490_id,
};
module_i2c_driver(ov490_i2c_driver);
MODULE_DESCRIPTION("SoC Camera driver for OmniVision OV490");
MODULE_AUTHOR("Nikhil Devshatwar <nikhil.nd@ti.com>");
MODULE_LICENSE("GPL v2");
Output:
Arago Project http://arago-project.org am57xx-evm ttyS2
Arago 2019.07 am57xx-evm ttyS2
am57xx-evm login: root
root@am57xx-evm:~# sudo dmesg | grep ov490
[ 8.328911] ov490 2-003c: i2c_set_clientdata over!
[ 8.340746] ov490 2-003c: lte80 driver registered
[ 8.359068] ov490 2-003c: ov490_video_probe over!
[ 8.365763] ov490 2-003c: parallel bus found!
[ 8.372281] ov490 2-003c: Using 0 data lanes
[ 8.376655] ov490 2-003c: ov490_of_probe over!
[ 8.384039] ov490 2-003c: v4l2_i2c_subdev_init over!
[ 9.627478] vin3a: Port A: Using subdev ov490 2-003c for capture
[ 9.641777] ov490 2-003c: enum code set!
[ 9.645740] vin3a: subdev ov490 2-003c: code: 2006 idx: 0
root@am57xx-evm:~# sudo dmesg | grep vip
[ 9.592717] vin3: vip_set_slice_path:
[ 9.592723] vin3: vip_set_slice_path: DATA_PATH_SELECT(0000010C): 80008000
[ 9.593058] vin4: vip_set_slice_path:
[ 9.593065] vin4: vip_set_slice_path: DATA_PATH_SELECT(00000110): 80008000
[ 9.593092] vip 48990000.vip: loading firmware vpdma-1b8.bin
[ 9.621819] vip 48990000.vip: VPDMA firmware loaded
[ 9.627472] vin3a: vip_async_bound
[ 9.658593] vin3a: vip_async_complete
[ 12.214022] vin3a-0: vip_open
[ 12.214041] vin3a: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:UYVY size: 1920x1080
[ 12.214068] vin3a-0: vip_init_stream: stream instance 0x00000000ed8b7000
[ 12.214308] vin3a-0: vip_release
[ 12.214317] vin3a-0: vip_release_stream: stream instance 0xa9166ef0ed8b7000
[ 12.214322] vin3a: vip_release_port: port instance 0xa9166ef0ec8c3440
root@am57xx-evm:~# sudo dmesg | grep vpe
[ 8.710381] vpe 489d0000.vpe: loading firmware vpdma-1b8.bin
[ 8.846213] vpe 489d0000.vpe: Device registered as /dev/video0
root@am57xx-evm:~# v4l2-ctl -d /dev/video1 --all
Driver Info:
Driver name : vip
Card type : vip
Bus info : platform:vip2:vin3a:stream0
Driver version : 4.19.59
Capabilities : 0x85200001
Video Capture
Read/Write
Streaming
Extended Pix Format
Device Capabilities
Device Caps : 0x05200001
Video Capture
Read/Write
Streaming
Extended Pix Format
Priority: 2
Video input : 0 (camera 1: ok)
Video Standard = 0x00ffb0ff
PAL-B/B1/G/H/I/D/D1/K
NTSC-M/M-JP/M-KR
SECAM-B/D/G/H/K/K1/L/Lc
Format Video Capture:
Width/Height : 1920/1080
Pixel Format : 'UYVY' (UYVY 4:2:2)
Field : None
Bytes per Line : 3840
Size Image : 4147200
Colorspace : SMPTE 170M
Transfer Function : Default (maps to Rec. 709)
YCbCr/HSV Encoding: Default (maps to ITU-R 601)
Quantization : Default (maps to Limited Range)
Flags :
Crop Capability Video Capture:
Bounds : Left 0, Top 0, Width 1920, Height 1080
Default : Left 0, Top 0, Width 1920, Height 1080
Pixel Aspect: 1/1
Crop Capability Video Output:
Bounds : Left 0, Top 0, Width 1920, Height 1080
Default : Left 0, Top 0, Width 1920, Height 1080
Pixel Aspect: 1/1
Selection Video Capture: crop, Left 0, Top 0, Width 1920, Height 1080, Flags:
Selection Video Capture: crop_default, Left 0, Top 0, Width 1920, Height 1080, Flags:
Selection Video Capture: crop_bounds, Left 0, Top 0, Width 1920, Height 1080, Flags:
Selection Video Capture: compose, Left 0, Top 0, Width 1920, Height 1080, Flags:
Selection Video Capture: compose_default, Left 0, Top 0, Width 1920, Height 1080, Flags:
Selection Video Capture: compose_bounds, Left 0, Top 0, Width 1920, Height 1080, Flags:
Selection Video Output: crop, Left 0, Top 0, Width 1920, Height 1080, Flags:
Selection Video Output: crop_default, Left 0, Top 0, Width 1920, Height 1080, Flags:
Selection Video Output: crop_bounds, Left 0, Top 0, Width 1920, Height 1080, Flags:
Selection Video Output: compose, Left 0, Top 0, Width 1920, Height 1080, Flags:
Selection Video Output: compose_default, Left 0, Top 0, Width 1920, Height 1080, Flags:
Selection Video Output: compose_bounds, Left 0, Top 0, Width 1920, Height 1080, Flags:
Streaming Parameters Video Capture:
Capabilities : timeperframe
Frames per second: 30.000 (30/1)
Read buffers : 4
root@am57xx-evm:~# cat /proc/interrupts | grep vip
root@am57xx-evm:~#
root@am57xx-evm:~# /etc/init.d/weston stop
Stopping Weston
root@am57xx-evm:~# devmem2 0x48995530
/dev/mem opened.
Memory mapped at address 0xb6f66000.
Read at address 0x48995530 (0xb6f66530): 0x00000000
root@am57xx-evm:~# devmem2 0x48995504
/dev/mem opened.
Memory mapped at address 0xb6fc7000.
Read at address 0x48995504 (0xb6fc7504): 0x000000C0
root@am57xx-evm:~# gst-launch-1.0 -v -e videotestsrc num-buffers=500 ! queue ! 'video/x-raw, format=(string)NV12, width=(int)1920, height=(int)1080, framerate=(fraction)22/1' ! queue ! ducatih264enc ! queue ! h264parse ! queue ! ducatih264dec ! queue ! kmssink
Setting pipeline to PAUSED ...
[ 102.410513] omap-iommu 55082000.mmu: 55082000.mmu: version 2.1
Pipeline is PREROLLING ...
/GstPipeline:pipeline0/GstKMSSink:kmssink0: display-width = 1440
/GstPipeline:pipeline0/GstKMSSink:kmssink0: display-height = 900
/GstPipeline:pipeline0/GstVideoTestSrc:videotestsrc0.GstPad:src: caps = video/x-raw, format=(string)NV12, width=(int)1920, height=(int)1080, framerate=(fraction)22/1, multiview-mode=(string)mono, pixel-aspect-ratio=(fraction)1/1, interlace-mode=(string)progressive
/GstPipeline:pipeline0/GstQueue:queue0.GstPad:src: caps = video/x-raw, format=(string)NV12, width=(int)1920, height=(int)1080, framerate=(fraction)22/1, multiview-mode=(string)mono, pixel-aspect-ratio=(fraction)1/1, interlace-mode=(string)progressive
/GstPipeline:pipeline0/GstCapsFilter:capsfilter0.GstPad:src: caps = video/x-raw, format=(string)NV12, width=(int)1920, height=(int)1080, framerate=(fraction)22/1, multiview-mode=(string)mono, pixel-aspect-ratio=(fraction)1/1, interlace-mode=(string)progressive
/GstPipeline:pipeline0/GstQueue:queue1.GstPad:sink: caps = video/x-raw, format=(string)NV12, width=(int)1920, height=(int)1080, framerate=(fraction)22/1, multiview-mode=(string)mono, pixel-aspect-ratio=(fraction)1/1, interlace-mode=(string)progressive
/GstPipeline:pipeline0/GstQueue:queue1.GstPad:src: caps = video/x-raw, format=(string)NV12, width=(int)1920, height=(int)1080, framerate=(fraction)22/1, multiview-mode=(string)mono, pixel-aspect-ratio=(fraction)1/1, interlace-mode=(string)progressive
/GstPipeline:pipeline0/GstCapsFilter:capsfilter0.GstPad:sink: caps = video/x-raw, format=(string)NV12, width=(int)1920, height=(int)1080, framerate=(fraction)22/1, multiview-mode=(string)mono, pixel-aspect-ratio=(fraction)1/1, interlace-mode=(string)progressive
/GstPipeline:pipeline0/GstDucatiH264Enc:ducatih264enc0.GstPad:src: caps = video/x-h264, alignment=(string)au, stream-format=(string)byte-stream, width=(int)1920, height=(int)1080, pixel-aspect-ratio=(fraction)1/1, framerate=(fraction)22/1, interlace-mode=(string)progressive, colorimetry=(string)bt709, chroma-site=(string)mpeg2, multiview-mode=(string)mono, multiview-flags=(GstVideoMultiviewFlagsSet)0:ffffffff:/right-view-first/left-flipped/left-flopped/right-flipped/right-flopped/half-aspect/mixed-mono
/GstPipeline:pipeline0/GstQueue:queue2.GstPad:sink: caps = video/x-h264, alignment=(string)au, stream-format=(string)byte-stream, width=(int)1920, height=(int)1080, pixel-aspect-ratio=(fraction)1/1, framerate=(fraction)22/1, interlace-mode=(string)progressive, colorimetry=(string)bt709, chroma-site=(string)mpeg2, multiview-mode=(string)mono, multiview-flags=(GstVideoMultiviewFlagsSet)0:ffffffff:/right-view-first/left-flipped/left-flopped/right-flipped/right-flopped/half-aspect/mixed-mono
/GstPipeline:pipeline0/GstDucatiH264Enc:ducatih264enc0.GstPad:sink: caps = video/x-raw, format=(string)NV12, width=(int)1920, height=(int)1080, framerate=(fraction)22/1, multiview-mode=(string)mono, pixel-aspect-ratio=(fraction)1/1, interlace-mode=(string)progressive
/GstPipeline:pipeline0/GstQueue:queue0.GstPad:sink: caps = video/x-raw, format=(string)NV12, width=(int)1920, height=(int)1080, framerate=(fraction)22/1, multiview-mode=(string)mono, pixel-aspect-ratio=(fraction)1/1, interlace-mode=(string)progressive
/GstPipeline:pipeline0/GstDucatiH264Enc:ducatih264enc0.GstPad:src: caps = video/x-h264, width=(int)1920, height=(int)1080, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, stream-format=(string)byte-stream, align=(string)au, num-reorder-frames=(int)3, profile=(string)high, level=(string)4
/GstPipeline:pipeline0/GstQueue:queue2.GstPad:src: caps = video/x-h264, width=(int)1920, height=(int)1080, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, stream-format=(string)byte-stream, align=(string)au, num-reorder-frames=(int)3, profile=(string)high, level=(string)4
/GstPipeline:pipeline0/GstH264Parse:h264parse0.GstPad:sink: caps = video/x-h264, width=(int)1920, height=(int)1080, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, stream-format=(string)byte-stream, align=(string)au, num-reorder-frames=(int)3, profile=(string)high, level=(string)4
/GstPipeline:pipeline0/GstQueue:queue2.GstPad:sink: caps = video/x-h264, width=(int)1920, height=(int)1080, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, stream-format=(string)byte-stream, align=(string)au, num-reorder-frames=(int)3, profile=(string)high, level=(string)4
/GstPipeline:pipeline0/GstH264Parse:h264parse0.GstPad:src: caps = video/x-h264, width=(int)1920, height=(int)1088, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, stream-format=(string)byte-stream, align=(string)au, num-reorder-frames=(int)3, profile=(string)high, level=(string)4, interlace-mode=(string)progressive, chroma-format=(string)4:2:0, bit-depth-luma=(uint)8, bit-depth-chroma=(uint)8, parsed=(boolean)true, alignment=(string)au
/GstPipeline:pipeline0/GstQueue:queue3.GstPad:sink: caps = video/x-h264, width=(int)1920, height=(int)1088, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, stream-format=(string)byte-stream, align=(string)au, num-reorder-frames=(int)3, profile=(string)high, level=(string)4, interlace-mode=(string)progressive, chroma-format=(string)4:2:0, bit-depth-luma=(uint)8, bit-depth-chroma=(uint)8, parsed=(boolean)true, alignment=(string)au
/GstPipeline:pipeline0/GstQueue:queue3.GstPad:src: caps = video/x-h264, width=(int)1920, height=(int)1088, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, stream-format=(string)byte-stream, align=(string)au, num-reorder-frames=(int)3, profile=(string)high, level=(string)4, interlace-mode=(string)progressive, chroma-format=(string)4:2:0, bit-depth-luma=(uint)8, bit-depth-chroma=(uint)8, parsed=(boolean)true, alignment=(string)au
/GstPipeline:pipeline0/GstDucatiH264Dec:ducatih264dec0.GstPad:src: caps = video/x-raw, format=(string)NV12, width=(int)2048, height=(int)1184, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, drm_mem=(boolean)true
/GstPipeline:pipeline0/GstQueue:queue4.GstPad:sink: caps = video/x-raw, format=(string)NV12, width=(int)2048, height=(int)1184, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, drm_mem=(boolean)true
/GstPipeline:pipeline0/GstDucatiH264Dec:ducatih264dec0.GstPad:sink: caps = video/x-h264, width=(int)1920, height=(int)1088, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, stream-format=(string)byte-stream, align=(string)au, num-reorder-frames=(int)3, profile=(string)high, level=(string)4, interlace-mode=(string)progressive, chroma-format=(string)4:2:0, bit-depth-luma=(uint)8, bit-depth-chroma=(uint)8, parsed=(boolean)true, alignment=(string)au
/GstPipeline:pipeline0/GstQueue:queue4.GstPad:src: caps = video/x-raw, format=(string)NV12, width=(int)2048, height=(int)1184, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, drm_mem=(boolean)true
/GstPipeline:pipeline0/GstKMSSink:kmssink0.GstPad:sink: caps = video/x-raw, format=(string)NV12, width=(int)2048, height=(int)1184, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, drm_mem=(boolean)true
/GstPipeline:pipeline0/GstDucatiH264Dec:ducatih264dec0.GstPad:src: caps = video/x-raw, format=(string)NV12, width=(int)2048, height=(int)1184, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, drm_mem=(boolean)true, max-ref-frames=(int)7
/GstPipeline:pipeline0/GstQueue:queue4.GstPad:src: caps = video/x-raw, format=(string)NV12, width=(int)2048, height=(int)1184, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, drm_mem=(boolean)true, max-ref-frames=(int)7
/GstPipeline:pipeline0/GstKMSSink:kmssink0.GstPad:sink: caps = video/x-raw, format=(string)NV12, width=(int)2048, height=(int)1184, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, drm_mem=(boolean)true, max-ref-frames=(int)7
/GstPipeline:pipeline0/GstQueue:queue4.GstPad:sink: caps = video/x-raw, format=(string)NV12, width=(int)2048, height=(int)1184, framerate=(fraction)22/1, pixel-aspect-ratio=(fraction)1/1, drm_mem=(boolean)true, max-ref-frames=(int)7
Pipeline is PREROLLED ...
Setting pipeline to PLAYING ...
New clock: GstSystemClock
Got EOS from element "pipeline0".
Execution ended after 0:00:22.558612620
Setting pipeline to PAUSED ...
Setting pipeline to READY ...
Setting pipeline to NULL ...
Freeing pipeline ...
root@am57xx-evm:~# devmem2 0x48995530
/dev/mem opened.
Memory mapped at address 0xb6f95000.
Read at address 0x48995530 (0xb6f95530): 0x00000000
root@am57xx-evm:~# devmem2 0x48995504
/dev/mem opened.
Memory mapped at address 0xb6f09000.
Read at address 0x48995504 (0xb6f09504): 0x000000C0
root@am57xx-evm:~# gst-launch-1.0 -v -e videotestsrc num-buffers=500 ! queue ! 'video/x-raw, format=(string)YUY2, width=(int)1920, height=(int)1080, framerate=(fraction)22/1' ! queue ! ducatih264enc ! queue ! h264parse ! queue ! ducatih264dec ! queue ! kmssink[ 129.344542] NET: Registered protocol family 15
[ 129.428564] Initializing XFRM netlink socket
WARNING: erroneous pipeline: could not link queue1 to ducatih264enc0
root@am57xx-evm:~# gst-launch-1.0 v4l2src device=/dev/video1 num-buffers=1000 io-mode=4 ! 'video/x-raw, format=(string)YUY2, width=(int)1920, height=(int)1080, framerate=30/1' ! queue ! vpe ! queue ! kmssink
Setting pipeline to PAUSED ...
Pipeline is live and does not need PREROLL ...
Setting pipeline to PLAYING ...
New clock: GstSystemClock
^Chandling interrupt.
Interrupt: Stopping pipeline ...
Execution ended after 0:00:50.966324252
Setting pipeline to PAUSED ...
Setting pipeline to READY ...
(gst-launch-1.0:1198): GStreamer-CRITICAL **: 16:10:55.926: gst_mini_object_unref: assertion 'GST_MINI_OBJECT_REFCOUNT_VALUE (mini_object) > 0' failed
Setting pipeline to NULL ...
Freeing pipeline ...
root@am57xx-evm:~# devmem2 0x48995530
/dev/mem opened.
Memory mapped at address 0xb6ff4000.
Read at address 0x48995530 (0xb6ff4530): 0x00000000
root@am57xx-evm:~# devmem2 0x48995504
/dev/mem opened.
Memory mapped at address 0xb6fad000.
Read at address 0x48995504 (0xb6fad504): 0x004038C4
root@am57xx-evm:~# cat /proc/interrupts | grep vip
root@am57xx-evm:~# sudo dmesg | grep vpe
[ 8.710381] vpe 489d0000.vpe: loading firmware vpdma-1b8.bin
[ 8.846213] vpe 489d0000.vpe: Device registered as /dev/video0
root@am57xx-evm:~# sudo dmesg | grep vip
[ 9.592717] vin3: vip_set_slice_path:
[ 9.592723] vin3: vip_set_slice_path: DATA_PATH_SELECT(0000010C): 80008000
[ 9.593058] vin4: vip_set_slice_path:
[ 9.593065] vin4: vip_set_slice_path: DATA_PATH_SELECT(00000110): 80008000
[ 9.593092] vip 48990000.vip: loading firmware vpdma-1b8.bin
[ 9.621819] vip 48990000.vip: VPDMA firmware loaded
[ 9.627472] vin3a: vip_async_bound
[ 9.658593] vin3a: vip_async_complete
[ 12.214022] vin3a-0: vip_open
[ 12.214041] vin3a: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:UYVY size: 1920x1080
[ 12.214068] vin3a-0: vip_init_stream: stream instance 0x00000000ed8b7000
[ 12.214308] vin3a-0: vip_release
[ 12.214317] vin3a-0: vip_release_stream: stream instance 0xa9166ef0ed8b7000
[ 12.214322] vin3a: vip_release_port: port instance 0xa9166ef0ec8c3440
[ 88.708578] vin3a-0: vip_open
[ 88.708598] vin3a: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:UYVY size: 1920x1080
[ 88.708628] vin3a-0: vip_init_stream: stream instance 0x00000000ed8b7000
[ 88.709714] vin3a-0: vip_release
[ 88.709723] vin3a-0: vip_release_stream: stream instance 0xa9166ef0ed8b7000
[ 88.709729] vin3a: vip_release_port: port instance 0xa9166ef0ec8c3440
[ 148.862310] vin3a-0: vip_open
[ 148.862330] vin3a: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:UYVY size: 1920x1080
[ 148.862367] vin3a-0: vip_init_stream: stream instance 0x00000000ed8b7000
[ 148.862639] vin3a-0: vip_release
[ 148.862649] vin3a-0: vip_release_stream: stream instance 0xa9166ef0ed8b7000
[ 148.862655] vin3a: vip_release_port: port instance 0xa9166ef0ec8c3440
[ 149.813597] vin3a-0: vip_open
[ 149.813616] vin3a: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:UYVY size: 1920x1080
[ 149.813650] vin3a-0: vip_init_stream: stream instance 0x00000000ed8b7000
[ 149.818488] vin3a-0: vip_enum_framesizes: index: 0 code: 2006 W:[1920,1920] H:[1080,1080]
[ 149.818533] vin3a-0: vip_enum_framesizes: index: 0 code: 2006 W:[1920,1920] H:[1080,1080]
[ 149.818571] vin3a-0: vip_enum_framesizes: index: 0 code: 2006 W:[1920,1920] H:[1080,1080]
[ 149.818608] vin3a-0: vip_enum_framesizes: index: 0 code: 2006 W:[1920,1920] H:[1080,1080]
[ 149.818645] vin3a-0: vip_enum_framesizes: index: 0 code: 2006 W:[1920,1920] H:[1080,1080]
[ 149.818681] vin3a-0: vip_enum_framesizes: index: 0 code: 2006 W:[1920,1920] H:[1080,1080]
[ 149.818716] vin3a-0: vip_enum_framesizes: index: 0 code: 2006 W:[1920,1920] H:[1080,1080]
[ 149.839205] vin3: vip_set_slice_path:
[ 149.839214] vin3: vip_set_slice_path: DATA_PATH_SELECT(0000010C): 80008000
[ 149.839217] vin3: vip_set_slice_path:
[ 149.839222] vin3: vip_set_slice_path: DATA_PATH_SELECT(0000010C): 40008000
[ 149.839499] vin3a-0: vip_load_vpdma_list_fifo: start_dma vb2 buf idx:0
[ 149.840618] vin3a-0: vip_load_vpdma_list_fifo: start_dma vb2 buf idx:1
[ 200.794708] vin3a-0: vip_stop_streaming:
[ 200.794717] vin3: vip_set_slice_path:
[ 200.794726] vin3: vip_set_slice_path: DATA_PATH_SELECT(0000010C): 80008000
[ 200.794732] vin3: vip_set_slice_path:
[ 200.794739] vin3: vip_set_slice_path: DATA_PATH_SELECT(0000010C): 40008000
[ 200.804834] vin3a-0: vip_release
[ 200.804848] vin3a-0: vip_release_stream: stream instance 0xa9166ef0ed8b7000
[ 200.804855] vin3a: vip_release_port: port instance 0xa9166ef0ec8c3440
root@am57xx-evm:~# sudo dmesg | grep vin3a
[ 9.627472] vin3a: vip_async_bound
[ 9.627478] vin3a: Port A: Using subdev ov490 2-003c for capture
[ 9.645740] vin3a: subdev ov490 2-003c: code: 2006 idx: 0
[ 9.645746] vin3a: matched fourcc: UYVY: code: 2006 idx: 0
[ 9.645751] vin3a: matched fourcc: YUYV: code: 2006 idx: 1
[ 9.645756] vin3a: matched fourcc: VYUY: code: 2006 idx: 2
[ 9.645760] vin3a: matched fourcc: YVYU: code: 2006 idx: 3
[ 9.645765] vin3a: matched fourcc: RGB3: code: 2006 idx: 4
[ 9.645769] vin3a: matched fourcc: RGB4: code: 2006 idx: 5
[ 9.645773] vin3a: matched fourcc: BGR3: code: 2006 idx: 6
[ 9.645777] vin3a: matched fourcc: BGR4: code: 2006 idx: 7
[ 9.653946] vin3a-0: device registered as video1
[ 9.658593] vin3a: vip_async_complete
[ 12.214022] vin3a-0: vip_open
[ 12.214041] vin3a: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:UYVY size: 1920x1080
[ 12.214052] vin3a: calc_format_size: fourcc:UYVY size: 1920x1080 bpl:3840 img_size:4147200
[ 12.214057] vin3a-0: init_stream fourcc:UYVY size: 1920x1080 bpl:3840 img_size:4147200
[ 12.214062] vin3a-0: init_stream vpdma data type: 0x27
[ 12.214068] vin3a-0: vip_init_stream: stream instance 0x00000000ed8b7000
[ 12.214308] vin3a-0: vip_release
[ 12.214317] vin3a-0: vip_release_stream: stream instance 0xa9166ef0ed8b7000
[ 12.214322] vin3a: vip_release_port: port instance 0xa9166ef0ec8c3440
[ 88.708578] vin3a-0: vip_open
[ 88.708598] vin3a: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:UYVY size: 1920x1080
[ 88.708610] vin3a: calc_format_size: fourcc:UYVY size: 1920x1080 bpl:3840 img_size:4147200
[ 88.708616] vin3a-0: init_stream fourcc:UYVY size: 1920x1080 bpl:3840 img_size:4147200
[ 88.708621] vin3a-0: init_stream vpdma data type: 0x27
[ 88.708628] vin3a-0: vip_init_stream: stream instance 0x00000000ed8b7000
[ 88.709111] vin3a-0: g_std: 0xffb0ff
[ 88.709174] vin3a-0: g_fmt fourcc:UYVY code: 2006 size: 1920x1080 bpl:3840 img_size:4147200
[ 88.709179] vin3a-0: g_fmt vpdma data type: 0x27
[ 88.709208] vin3a-0: enum_fmt index:0
[ 88.709213] vin3a-0: enum_fmt fourcc:UYVY
[ 88.709714] vin3a-0: vip_release
[ 88.709723] vin3a-0: vip_release_stream: stream instance 0xa9166ef0ed8b7000
[ 88.709729] vin3a: vip_release_port: port instance 0xa9166ef0ec8c3440
[ 148.862310] vin3a-0: vip_open
[ 148.862330] vin3a: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:UYVY size: 1920x1080
[ 148.862343] vin3a: calc_format_size: fourcc:UYVY size: 1920x1080 bpl:3840 img_size:4147200
[ 148.862350] vin3a-0: init_stream fourcc:UYVY size: 1920x1080 bpl:3840 img_size:4147200
[ 148.862355] vin3a-0: init_stream vpdma data type: 0x27
[ 148.862367] vin3a-0: vip_init_stream: stream instance 0x00000000ed8b7000
[ 148.862639] vin3a-0: vip_release
[ 148.862649] vin3a-0: vip_release_stream: stream instance 0xa9166ef0ed8b7000
[ 148.862655] vin3a: vip_release_port: port instance 0xa9166ef0ec8c3440
[ 149.813597] vin3a-0: vip_open
[ 149.813616] vin3a: vip_init_port: g_mbus_fmt subdev mbus_code: 2006 fourcc:UYVY size: 1920x1080
[ 149.813629] vin3a: calc_format_size: fourcc:UYVY size: 1920x1080 bpl:3840 img_size:4147200
[ 149.813637] vin3a-0: init_stream fourcc:UYVY size: 1920x1080 bpl:3840 img_size:4147200
[ 149.813642] vin3a-0: init_stream vpdma data type: 0x27
[ 149.813650] vin3a-0: vip_init_stream: stream instance 0x00000000ed8b7000
[ 149.813932] vin3a-0: g_std: 0xffb0ff
[ 149.818187] vin3a-0: enum_fmt index:0
[ 149.818195] vin3a-0: enum_fmt fourcc:UYVY
[ 149.818207] vin3a-0: enum_fmt index:1
[ 149.818212] vin3a-0: enum_fmt fourcc:YUYV
[ 149.818230] vin3a-0: enum_fmt index:2
[ 149.818236] vin3a-0: enum_fmt fourcc:VYUY
[ 149.818257] vin3a-0: enum_fmt index:3
[ 149.818262] vin3a-0: enum_fmt fourcc:YVYU
[ 149.818381] vin3a-0: enum_fmt index:4
[ 149.818387] vin3a-0: enum_fmt fourcc:RGB3
[ 149.818398] vin3a-0: enum_fmt index:5
[ 149.818403] vin3a-0: enum_fmt fourcc:RGB4
[ 149.818412] vin3a-0: enum_fmt index:6
[ 149.818417] vin3a-0: enum_fmt fourcc:BGR3
[ 149.818426] vin3a-0: enum_fmt index:7
[ 149.818431] vin3a-0: enum_fmt fourcc:BGR4
[ 149.818440] vin3a-0: enum_fmt index:8
[ 149.818488] vin3a-0: vip_enum_framesizes: index: 0 code: 2006 W:[1920,1920] H:[1080,1080]
[ 149.818533] vin3a-0: vip_enum_framesizes: index: 0 code: 2006 W:[1920,1920] H:[1080,1080]
[ 149.818571] vin3a-0: vip_enum_framesizes: index: 0 code: 2006 W:[1920,1920] H:[1080,1080]
[ 149.818608] vin3a-0: vip_enum_framesizes: index: 0 code: 2006 W:[1920,1920] H:[1080,1080]
[ 149.818645] vin3a-0: vip_enum_framesizes: index: 0 code: 2006 W:[1920,1920] H:[1080,1080]
[ 149.818681] vin3a-0: vip_enum_framesizes: index: 0 code: 2006 W:[1920,1920] H:[1080,1080]
[ 149.818716] vin3a-0: vip_enum_framesizes: index: 0 code: 2006 W:[1920,1920] H:[1080,1080]
[ 149.818974] vin3a-0: s_fmt input fourcc:YUYV size: 1920x1080 bpl:3840 img_size:0
[ 149.818982] vin3a-0: try_fmt fourcc:YUYV size: 1920x1080
[ 149.818990] vin3a-0: try_fmt loop:0 fourcc:YUYV size: 1920x1080
[ 149.818996] vin3a-0: try_fmt loop:0 found new larger: 1920x1080
[ 149.819002] vin3a-0: try_fmt loop:0 found at least larger: 1920x1080
[ 149.819008] vin3a-0: try_fmt loop:0 found new best: 1920x1080
[ 149.819013] vin3a-0: try_fmt loop:0 found direct match: 1920x1080
[ 149.819021] vin3a: calc_format_size: fourcc:YUYV size: 1920x1080 bpl:3840 img_size:4147200
[ 149.819027] vin3a-0: s_fmt try_fmt fourcc:YUYV size: 1920x1080 bpl:3840 img_size:4147200
[ 149.819034] vin3a-0: s_fmt fourcc:YUYV size: 1920x1080 bpl:3840 img_size:4147200
[ 149.819041] vin3a-0: s_fmt pix_to_mbus mbus_code: 2006 size: 1920x1080
[ 149.819047] vin3a-0: s_fmt subdev fmt mbus_code: 2006 size: 1920x1080
[ 149.819052] vin3a-0: s_fmt vpdma data type: 0x07
[ 149.823562] vin3a-0: get 5 buffer(s) of size 4147200 each.
[ 149.839499] vin3a-0: vip_load_vpdma_list_fifo: start_dma vb2 buf idx:0
[ 149.840618] vin3a-0: vip_load_vpdma_list_fifo: start_dma vb2 buf idx:1
[ 200.794708] vin3a-0: vip_stop_streaming:
[ 200.794750] vin3a-0: Clear channel no: 38
[ 200.804834] vin3a-0: vip_release
[ 200.804848] vin3a-0: vip_release_stream: stream instance 0xa9166ef0ed8b7000
[ 200.804855] vin3a: vip_release_port: port instance 0xa9166ef0ec8c3440
root@am57xx-evm:~#
Not Generating interrupts and Parse config registers getting values of
root@am57xx-evm:~# devmem2 0x48995530
/dev/mem opened.
Memory mapped at address 0xb6ff4000.
Read at address 0x48995530 (0xb6ff4530): 0x00000000
root@am57xx-evm:~# devmem2 0x48995504
/dev/mem opened.
Memory mapped at address 0xb6fad000.
Read at address 0x48995504 (0xb6fad504): 0x004038C4
How to capture and display into the hdmi port ?
I am using for test monitor it's working : gst-launch-1.0 -v -e videotestsrc num-buffers=500 ! queue ! 'video/x-raw, format=(string)YUY2, width=(int)1920, height=(int)1080, framerate=(fraction)22/1' ! queue ! ducatih264enc ! queue ! h264parse ! queue ! ducatih264dec ! queue ! kmssink
For camera Data:gst-launch-1.0 v4l2src device=/dev/video1 num-buffers=1000 io-mode=4 ! 'video/x-raw, format=(string)YUY2, width=(int)1920, height=(int)1080, framerate=30/1' ! queue ! vpe ! queue ! kmssink
Anything we missed in the list please check in the serial terminal data and suggest for displaying video on the monitor?
Thanking you sir,
Regards,
Ramachandra
