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AM6548: serial port enumeration number

Part Number: AM6548
Other Parts Discussed in Thread: PCA9554

Hi Ti,

We are using SDK7_1_00_18 on our customized EVM board and we found tty serial port number starts from ttyS1.

Below are the kernel log.

[ 0.000000] 000: printk: bootconsole [ns16550a0] enabled
[ 0.000000] 000: Reserved memory: created DMA memory pool at 0x00000000a0000000, size 1 MiB
[ 0.000000] 000: OF: reserved mem: initialized node r5f-dma-memory@a0000000, compatible id shared-dma-pool
[ 0.000000] 000: Reserved memory: created DMA memory pool at 0x00000000a0100000, size 15 MiB
[ 0.000000] 000: OF: reserved mem: initialized node r5f-memory@a0100000, compatible id shared-dma-pool
[ 0.000000] 000: Reserved memory: created DMA memory pool at 0x00000000a1000000, size 1 MiB
[ 0.000000] 000: OF: reserved mem: initialized node r5f-dma-memory@a1000000, compatible id shared-dma-pool
[ 0.000000] 000: Reserved memory: created DMA memory pool at 0x00000000a1100000, size 15 MiB
[ 0.000000] 000: OF: reserved mem: initialized node r5f-memory@a1100000, compatible id shared-dma-pool
[ 0.000000] 000: cma: Reserved 24 MiB at 0x00000000be800000
[ 0.000000] 000: On node 0 totalpages: 110080
[ 0.000000] 000: DMA zone: 4096 pages used for memmap
[ 0.000000] 000: DMA zone: 0 pages reserved
[ 0.000000] 000: DMA zone: 247296 pages, LIFO batch:63
[ 0.000000] 000: DMA32 zone: 18446744073709414400 pages, LIFO batch:63
[ 0.000000] 000: psci: probing for conduit method from DT.
[ 0.000000] 000: psci: PSCIv1.1 detected in firmware.
[ 0.000000] 000: psci: Using standard PSCI v0.2 function IDs
[ 0.000000] 000: psci: Trusted OS migration not required
[ 0.000000] 000: psci: SMC Calling Convention v1.0
[ 0.000000] 000: percpu: Embedded 17 pages/cpu s32576 r8192 d28864 u69632
[ 0.000000] 000: pcpu-alloc: s32576 r8192 d28864 u69632 alloc=17*4096
[ 0.000000] 000:
[ 0.000000] 000: pcpu-alloc:
[ 0.000000] 000: [0]
[ 0.000000] 000: 0
[ 0.000000] 000: [0]
[ 0.000000] 000: 1
[ 0.000000] 000: [0]
[ 0.000000] 000: 2
[ 0.000000] 000: [0]
[ 0.000000] 000: 3
[ 0.000000] 000:
[ 0.000000] 000: Detected VIPT I-cache on CPU0
[ 0.000000] 000: CPU features: detected: ARM erratum 845719
[ 0.000000] 000: CPU features: detected: GIC system register CPU interface
[ 0.000000] 000: Built 1 zonelists, mobility grouping on. Total pages: 105984
[ 0.000000] 000: Kernel command line: console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000 isolcpus=1-3 mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),57216k@8m(ospi.rootfs),128k(ospi.phypattern) root=PARTUUID=82b8b557-02 rw rootfstype=ext4 rootwait
[ 0.000000] 000: Dentry cache hash table entries: 65536 (order: 8, 1048576 bytes, linear)
[ 0.000000] 000: Inode-cache hash table entries: 32768 (order: 6, 262144 bytes, linear)
[ 0.000000] 000: mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] 000: Memory: 930464K/440320K available (8382K kernel code, 612K rwdata, 3080K rodata, 1344K init, 417K bss, 18446744073709036896K reserved, 24576K cma-reserved)
[ 0.000000] 000: SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[ 0.000000] 000: rcu: Preemptible hierarchical RCU implementation.
[ 0.000000] 000: rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=4.
[ 0.000000] 000: rcu: RCU priority boosting: priority 1 delay 500 ms.
[ 0.000000] 000: rcu: RCU_SOFTIRQ processing moved to rcuc kthreads.
[ 0.000000] 000: No expedited grace period (rcu_normal_after_boot).
[ 0.000000] 000: Tasks RCU enabled.
[ 0.000000] 000: rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[ 0.000000] 000: rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
[ 0.000000] 000: NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[ 0.000000] 000: GICv3: GIC: Using split EOI/Deactivate mode
[ 0.000000] 000: GICv3: 960 SPIs implemented
[ 0.000000] 000: GICv3: 0 Extended SPIs implemented
[ 0.000000] 000: GICv3: Distributor has no Range Selector support
[ 0.000000] 000: GICv3: 16 PPIs implemented
[ 0.000000] 000: GICv3: no VLPI support, no direct LPI support
[ 0.000000] 000: GICv3: CPU0: found redistributor 0 region 0:0x0000000001880000
[ 0.000000] 000: ITS [mem 0x01820000-0x0182ffff]
[ 0.000000] 000: GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS
[ 0.000000] 000: ITS@0x0000000001820000: Devices Table too large, reduce ids 20->19
[ 0.000000] 000: ITS@0x0000000001820000: allocated 524288 Devices @bc400000 (flat, esz 8, psz 64K, shr 0)
[ 0.000000] 000: ITS: using cache flushing for cmd queue
[ 0.000000] 000: GICv3: using LPI property table @0x00000000bcc30000
[ 0.000000] 000: GIC: using cache flushing for LPI property table
[ 0.000000] 000: GICv3: CPU0: using allocated LPI pending table @0x00000000bcc40000
[ 0.000000] 000: random: get_random_bytes called from start_kernel+0x2bc/0x440 with crng_init=0
[ 0.000000] 000: arch_timer: cp15 timer(s) running at 200.00MHz (phys).
[ 0.000000] 000: clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2e2049d3e8, max_idle_ns: 440795210634 ns
[ 0.000001] 000: sched_clock: 56 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
[ 0.008991] 000: Console: colour dummy device 80x25
[ 0.014032] 000: Calibrating delay loop (skipped), value calculated using timer frequency..
[ 0.022667] 000: 400.00 BogoMIPS (lpj=800000)
[ 0.027125] 000: pid_max: default: 32768 minimum: 301
[ 0.032401] 000: LSM: Security Framework initializing
[ 0.037629] 000: Mount-cache hash table entries: 1024 (order: 1, 8192 bytes, linear)
[ 0.045560] 000: Mountpoint-cache hash table entries: 1024 (order: 1, 8192 bytes, linear)
[ 0.055550] 000: ASID allocator initialised with 32768 entries
[ 0.061642] 000: rcu: Hierarchical SRCU implementation.
[ 0.067496] 000: Platform MSI: gic-its@1820000 domain created
[ 0.073619] 000: PCI/MSI: /bus@100000/interrupt-controller@1800000/gic-its@1820000 domain created
[ 0.083070] 000: smp: Bringing up secondary CPUs ...
[ 0.089316] 001: Detected VIPT I-cache on CPU1
[ 0.093895] 001: GICv3: CPU1: found redistributor 1 region 0:0x00000000018a0000
[ 0.101379] 001: GICv3: CPU1: using allocated LPI pending table @0x00000000bcc50000
[ 0.109246] 001: CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
[ 0.117684] 002: Detected VIPT I-cache on CPU2
[ 0.122277] 002: GICv3: CPU2: found redistributor 100 region 0:0x00000000018c0000
[ 0.129950] 002: GICv3: CPU2: using allocated LPI pending table @0x00000000bcc60000
[ 0.137833] 002: CPU2: Booted secondary processor 0x0000000100 [0x410fd034]
[ 0.146220] 003: Detected VIPT I-cache on CPU3
[ 0.150790] 003: GICv3: CPU3: found redistributor 101 region 0:0x00000000018e0000
[ 0.158455] 003: GICv3: CPU3: using allocated LPI pending table @0x00000000bcc70000
[ 0.166316] 003: CPU3: Booted secondary processor 0x0000000101 [0x410fd034]
[ 0.173574] 000: smp: Brought up 1 node, 4 CPUs
[ 0.178243] 000: SMP: Total of 4 processors activated.
[ 0.183520] 000: CPU features: detected: 32-bit EL0 Support
[ 0.189244] 000: CPU features: detected: CRC32 instructions
[ 0.204319] 000: CPU: All CPU(s) started at EL2
[ 0.209000] 000: alternatives: patching kernel code
[ 0.214953] 000: devtmpfs: initialized
[ 0.229269] 000: clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
[ 0.239743] 000: futex hash table entries: 1024 (order: 5, 131072 bytes, linear)
[ 0.248398] 000: pinctrl core: initialized pinctrl subsystem
[ 0.255127] 000: NET: Registered protocol family 16
[ 0.262034] 000: DMA: preallocated 256 KiB pool for atomic allocations
[ 0.269468] 000: hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[ 0.296133] 000: HugeTLB registered 1.00 GiB page size, pre-allocated 0 pages
[ 0.303487] 000: HugeTLB registered 32.0 MiB page size, pre-allocated 0 pages
[ 0.310820] 000: HugeTLB registered 2.00 MiB page size, pre-allocated 0 pages
[ 0.318154] 000: HugeTLB registered 64.0 KiB page size, pre-allocated 0 pages
[ 0.326849] 000: cryptd: max_cpu_qlen set to 1000
[ 0.336868] 000: iommu: Default domain type: Translated
[ 0.342724] 000: SCSI subsystem initialized
[ 0.347687] 000: pps_core: LinuxPPS API ver. 1 registered
[ 0.353563] 000: pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 0.363405] 000: PTP clock support registered
[ 0.367905] 000: EDAC MC: Ver: 3.0.0
[ 0.372668] 000: FPGA manager framework
[ 0.377526] 000: clocksource: Switched to clocksource arch_sys_counter
[ 0.384518] 000: VFS: Disk quotas dquot_6.6.0
[ 0.389053] 000: VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[ 0.402655] 000: thermal_sys: Registered thermal governor 'step_wise'
[ 0.409273] 000: thermal_sys: Registered thermal governor 'power_allocator'
[ 0.416910] 000: NET: Registered protocol family 2
[ 0.422591] 000: tcp_listen_portaddr_hash hash table entries: 256 (order: 2, 16384 bytes, linear)
[ 0.431816] 000: TCP established hash table entries: 4096 (order: 3, 32768 bytes, linear)
[ 0.440255] 000: TCP bind hash table entries: 4096 (order: 5, 229376 bytes, linear)
[ 0.448335] 000: TCP: Hash tables configured (established 4096 bind 4096)
[ 0.455482] 000: UDP hash table entries: 256 (order: 3, 32768 bytes, linear)
[ 0.462781] 000: UDP-Lite hash table entries: 256 (order: 3, 32768 bytes, linear)
[ 0.470674] 000: NET: Registered protocol family 1
[ 0.476100] 000: RPC: Registered named UNIX socket transport module.
[ 0.482647] 000: RPC: Registered udp transport module.
[ 0.487925] 000: RPC: Registered tcp transport module.
[ 0.493194] 000: RPC: Registered tcp NFSv4.1 backchannel transport module.
[ 0.500245] 000: PCI: CLS 0 bytes, default 64
[ 0.505831] 000: hw perfevents: enabled with armv8_pmuv3 PMU driver, 7 counters available
[ 0.519296] 000: Initialise system trusted keyrings
[ 0.524522] 000: workingset: timestamp_bits=46 max_order=18 bucket_order=0
[ 0.538334] 000: squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 0.545504] 000: NFS: Registering the id_resolver key type
[ 0.551171] 000: Key type id_resolver registered
[ 0.555958] 000: Key type id_legacy registered
[ 0.560532] 000: nfs4filelayout_init: NFSv4 File Layout Driver Registering...
[ 0.568048] 000: 9p: Installing v9fs 9p2000 file system support
[ 0.587858] 000: Key type asymmetric registered
[ 0.592515] 000: Asymmetric key parser 'x509' registered
[ 0.598026] 000: Block layer SCSI generic (bsg) driver version 0.4 loaded (major 245)
[ 0.606087] 000: io scheduler mq-deadline registered
[ 0.611197] 000: io scheduler kyber registered
[ 0.618242] 000: pinctrl-single 4301c000.pinmux: 70 pins, size 280
[ 0.625217] 000: pinctrl-single 11c000.pinmux: 185 pins, size 740
[ 0.631780] 000: pinctrl-single 11c2e8.pinmux: 9 pins, size 36
[ 0.643262] 000: k3-ringacc 2b800000.ringacc: Failed to get MSI domain
[ 0.650103] 000: k3-ringacc 3c000000.ringacc: Failed to get MSI domain
[ 0.660757] 000: Serial: 8250/16550 driver, 10 ports, IRQ sharing enabled
[ 0.680002] 000: brd: module loaded
[ 0.693130] 000: loop: module loaded
[ 0.700766] 000: libphy: Fixed MDIO Bus: probed
[ 0.706068] 000: tun: Universal TUN/TAP device driver, 1.6
[ 0.712383] 000: igbvf: Intel(R) Gigabit Virtual Function Network Driver - version 2.4.0-k
[ 0.720873] 000: igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
[ 0.727440] 000: sky2: driver version 1.30
[ 0.732858] 000: VFIO - User Level meta-driver version: 0.3
[ 0.739080] 000: i2c /dev entries driver
[ 0.744208] 000: sdhci: Secure Digital Host Controller Interface driver
[ 0.751017] 000: sdhci: Copyright(c) Pierre Ossman
[ 0.756468] 000: sdhci-pltfm: SDHCI platform and OF driver helper
[ 0.764010] 000: ti-sci bus@100000:bus@28380000:bus@42040000:dmsc: invalid resource
[ 0.772784] 000: optee: probing for conduit method from DT.
[ 0.778539] 000: optee: revision 3.8 (199fca17)
[ 0.783730] 000: optee: initialized driver
[ 0.788672] 000: NET: Registered protocol family 17
[ 0.793931] 000: 9pnet: Installing 9P2000 support
[ 0.798844] 000: Key type dns_resolver registered
[ 0.804151] 000: registered taskstats version 1
[ 0.808816] 000: Loading compiled-in X.509 certificates
[ 0.000000] 000: Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[ 0.829003] 000: k3-ringacc 2b800000.ringacc: Failed to get MSI domain
[ 0.835953] 000: k3-ringacc 3c000000.ringacc: Failed to get MSI domain
[ 0.847050] 000: ti-sci bus@100000:bus@28380000:bus@42040000:dmsc: invalid resource
[ 0.855339] 000: ti-sci bus@100000:bus@28380000:bus@42040000:dmsc: ABI: 3.1 (firmware rev 0x0015 '21.5.0--v2021.05 (Terrific Llam')
[ 0.916589] 000: random: fast init done
[ 0.928868] 000: omap_i2c 42120000.i2c: bus 0 rev0.12 at 100 kHz
[ 0.935877] 000: omap_i2c 40b00000.i2c: bus 1 rev0.12 at 100 kHz
[ 0.942993] 000: omap_i2c 2000000.i2c: bus 2 rev0.12 at 100 kHz
[ 0.977372] 000: rtc-s35390a 3-0030: registered as rtc0
[ 0.982795] 000: omap_i2c 2010000.i2c: bus 3 rev0.12 at 100 kHz
[ 0.989563] 000: omap_i2c 2020000.i2c: bus 4 rev0.12 at 100 kHz
[ 0.996268] 000: omap_i2c 2030000.i2c: bus 5 rev0.12 at 100 kHz
[ 1.003137] 000: ti-sci-intr bus@100000:bus@28380000:bus@42040000:interrupt-controller2: Interrupt Router 156 domain created
[ 1.014896] 000: ti-sci-intr bus@100000:interrupt-controller0: Interrupt Router 100 domain created
[ 1.024285] 000: ti-sci-intr bus@100000:navss@30800000:interrupt-controller1: Interrupt Router 182 domain created
[ 1.035160] 000: ti-sci-inta 33d00000.interrupt-controller: Interrupt Aggregator domain 179 created
[ 1.048901] 000: k3-ringacc 2b800000.ringacc: Ring Accelerator probed rings:286, gp-rings[96,32] sci-dev-id:195
[ 1.059290] 000: k3-ringacc 2b800000.ringacc: dma-ring-reset-quirk: disabled
[ 1.066527] 000: k3-ringacc 2b800000.ringacc: RA Proxy rev. 66348100, num_proxies:64
[ 1.077726] 000: k3-ringacc 3c000000.ringacc: Ring Accelerator probed rings:818, gp-rings[304,100] sci-dev-id:187
[ 1.088289] 000: k3-ringacc 3c000000.ringacc: dma-ring-reset-quirk: disabled
[ 1.095525] 000: k3-ringacc 3c000000.ringacc: RA Proxy rev. 66348100, num_proxies:64
[ 1.104263] 000: 40a00000.serial: ttyS1 at MMIO 0x40a00000 (irq = 8, base_baud = 6000000) is a 8250
[ 1.114483] 000: 2800000.serial: ttyS2 at MMIO 0x2800000 (irq = 19, base_baud = 3000000) is a 8250
[ 1.123740] 000: printk: console [ttyS2] enabled
[ 1.123740] 000: printk: console [ttyS2] enabled
[ 1.133105] 000: printk: bootconsole [ns16550a0] disabled
[ 1.133105] 000: printk: bootconsole [ns16550a0] disabled
[ 1.144853] 000: omap8250 2810000.serial: unable to register 8250 port
[ 1.144866] 000: omap8250 2810000.serial: PM domain pd:147 will not be powered off
[ 1.153603] 000: 2820000.serial: ttyS4 at MMIO 0x2820000 (irq = 21, base_baud = 3000000) is a 8250
[ 1.217541] 000: davinci_mdio 46000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
[ 1.217559] 000: libphy: 46000f00.mdio: probed
[ 1.219491] 000: davinci_mdio 46000f00.mdio: phy[3]: device 46000f00.mdio:03, driver TI DP83822
[ 1.219527] 000: am65-cpsw-nuss 46000000.ethernet: initializing am65 cpsw nuss version 0x6BA00102, cpsw version 0x6BA80102 Ports: 2 quirks:00000000
[ 1.220008] 000: am65-cpsw-nuss 46000000.ethernet: Failed to request tx dma channel -517
[ 1.243096] 000: am65-cpts 310d0000.cpts: CPTS ver 0x4e8a010b, freq:200000000, add_val:4 pps:0
[ 1.243646] 000: thermal thermal_zone1: failed to read out thermal zone (-22)
[ 1.243675] 000: thermal thermal_zone2: failed to read out thermal zone (-22)
[ 1.244518] 000: mmc0: CQHCI version 5.10
[ 1.305357] 000: mmc0: SDHCI controller on 4f80000.sdhci [4f80000.sdhci] using ADMA 64-bit
[ 1.306400] 000: mmc1: CQHCI version 5.10
[ 1.377220] 000: mmc0: new HS200 MMC card at address 0001
[ 1.383323] 000: mmcblk0: mmc0:0001 IS004G 3.64 GiB
[ 1.383664] 000: mmcblk0boot0: mmc0:0001 IS004G partition 1 2.00 MiB
[ 1.384007] 000: mmcblk0boot1: mmc0:0001 IS004G partition 2 2.00 MiB
[ 1.384257] 000: mmcblk0rpmb: mmc0:0001 IS004G partition 3 512 KiB, chardev (241:0)
[ 1.398303] 000: mmcblk0: p1 p2 < p5 p6 > p3
[ 2.316136] 000: mmc1: SDHCI controller on 4fa0000.sdhci [4fa0000.sdhci] using ADMA 64-bit
[ 2.337043] 000: omap-mailbox 31f80000.mailbox: omap mailbox rev 0x66fc7100
[ 2.337482] 000: omap-mailbox 31f81000.mailbox: omap mailbox rev 0x66fc7100
[ 2.346167] 000: ti-udma 285c0000.dma-controller: Channels: 28 (tchan: 14, rchan: 14, gp-rflow: 16)
[ 2.352087] 000: ti-udma 31150000.dma-controller: Channels: 119 (tchan: 53, rchan: 66, gp-rflow: 64)
[ 2.368511] 000: 2810000.serial: ttyS3 at MMIO 0x2810000 (irq = 20, base_baud = 3000000) is a 8250
[ 2.375876] 000: mmc1: new high speed SDHC card at address e624
[ 2.384884] 000: mmcblk1: mmc1:e624 SU16G 14.8 GiB
[ 2.388671] 000: mmcblk1: p1 p2
[ 2.415006] 000: spi-nor spi9.0: unrecognized JEDEC id bytes: 00 00 00 00 00 00
[ 2.415032] 000: spi-nor: probe of spi9.0 failed with error -2
[ 2.453535] 000: davinci_mdio 46000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
[ 2.453547] 000: libphy: 46000f00.mdio: probed
[ 2.455492] 000: davinci_mdio 46000f00.mdio: phy[3]: device 46000f00.mdio:03, driver TI DP83822
[ 2.455526] 000: am65-cpsw-nuss 46000000.ethernet: initializing am65 cpsw nuss version 0x6BA00102, cpsw version 0x6BA80102 Ports: 2 quirks:00000000
[ 2.457203] 000: am65-cpsw-nuss 46000000.ethernet: set new flow-id-base 48
[ 2.461786] 000: am65-cpsw-nuss 46000000.ethernet: initialized cpsw ale version 57.4
[ 2.461793] 000: am65-cpsw-nuss 46000000.ethernet: ALE Table size 64
[ 2.479536] 000: am65-cpsw-nuss 46000000.ethernet: CPTS ver 0x4e8a010b, freq:200000000, add_val:4 pps:0
[ 2.495868] 000: debugfs: Directory 'pd:121' with parent 'pm_genpd' already present!
[ 2.495928] 000: debugfs: Directory 'pd:120' with parent 'pm_genpd' already present!
[ 2.499426] 000: rtc-s35390a 3-0030: setting system clock to 2000-01-07T22:26:44 UTC (947284004)
[ 2.555190] 000: EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null)
[ 2.555261] 000: VFS: Mounted root (ext4 filesystem) on device 179:98.
[ 2.559502] 000: devtmpfs: mounted
[ 2.560483] 000: Freeing unused kernel memory: 1344K
[ 2.560613] 000: Run /sbin/init as init process
[ 2.909813] 000: systemd[1]: System time before build time, advancing clock.
[ 2.998863] 000: NET: Registered protocol family 10
[ 2.999922] 000: Segment Routing with IPv6
[ 3.032608] 000: systemd[1]: systemd 243-51-gfab6f01+ running in system mode. (+PAM -AUDIT -SELINUX +IMA -APPARMOR +SMACK +SYSVINIT +UTMP -LIBCRYPTSETUP -GCRYPT -GNUTLS +ACL +XZ -LZ4 -SECCOMP +BLKID -ELFUTILS +KMOD -IDN2 -IDN -PCRE2 default-hierarchy=hybrid)
[ 3.033117] 000: systemd[1]: Detected architecture arm64.

But after check with serial.h, it seems tty should start from ttyS0.

#define SERIAL_PORT_DFNS \
/* UART CLK PORT IRQ FLAGS */ \
{ 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
{ 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
{ 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
{ 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */

Is there any other setting or config related to this tty number?

Attached our dts setting.

// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/
*/

/dts-v1/;

#include "k3-am654.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/net/ti-dp83867.h>

/ {
compatible = "ti,am654-evm", "ti,am654";
model = "Texas Instruments AM654 Base Board";

aliases {
//Eric- ethernet1 = &pruss2_emac0;
//Eric- ethernet2 = &pruss2_emac1;
ethernet1 = &pruss1_emac0; //Ethernet port 0
ethernet2 = &pruss1_emac1; //EtherCAT port 1
ethernet3 = &pruss2_emac0; //Ethernet port 1
};

chosen {
stdout-path = "serial2:115200n8";
bootargs = "earlycon=ns16550a,mmio32,0x02800000";
};

memory@80000000 {
device_type = "memory";
#if 0
/* 4G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
<0x00000008 0x80000000 0x00000000 0x80000000>;
#endif
/* 1G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
};

reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;

secure_ddr: secure_ddr@9e800000 {
reg = <0 0x9e800000 0 0x01800000>; /* for OP-TEE */
alignment = <0x1000>;
no-map;
};

mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
compatible = "shared-dma-pool";
reg = <0 0xa0000000 0 0x100000>;
no-map;
};

mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
compatible = "shared-dma-pool";
reg = <0 0xa0100000 0 0xf00000>;
no-map;
};

mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
compatible = "shared-dma-pool";
reg = <0 0xa1000000 0 0x100000>;
no-map;
};

mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
compatible = "shared-dma-pool";
reg = <0 0xa1100000 0 0xf00000>;
no-map;
};

rtos_ipc_memory_region: ipc-memories@a2000000 {
reg = <0x00 0xa2000000 0x00 0x00200000>;
alignment = <0x1000>;
no-map;
};
};

eeprom_gpio: eeprom_gpio {
compatible = "eeprom-gpio";
eeprom-gpio = <&wkup_gpio0 7 GPIO_ACTIVE_HIGH>;
};

clk_ov5640_fixed: fixed-clock-ov5640 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};

leds {
pinctrl-names = "default";
pinctrl-0 = <&ledgpio0_pins_default &ledgpio1_pins_default &ledgpio2_pins_default>;

compatible = "gpio-leds";

led1 {
label = "LED-RUN";
gpios = <&main_gpio0 27 GPIO_ACTIVE_HIGH>;
};

led2 {
label = "LED-ERR";
gpios = <&main_gpio1 70 GPIO_ACTIVE_HIGH>;
};

led3 {
label = "LED-BUS";
gpios = <&main_gpio1 48 GPIO_ACTIVE_HIGH>;
};

led4 {
label = "LED-232TX";
gpios = <&main_gpio1 21 GPIO_ACTIVE_HIGH>;
};

led5 {
label = "LED-232RX";
gpios = <&main_gpio1 45 GPIO_ACTIVE_HIGH>;
};

led6 {
label = "LED-485TX";
gpios = <&main_gpio1 87 GPIO_ACTIVE_HIGH>;
};

led7 {
label = "LED-485RX";
gpios = <&main_gpio1 46 GPIO_ACTIVE_HIGH>;
};

led8 {
label = "LED-SD";
gpios = <&main_gpio1 47 GPIO_ACTIVE_HIGH>;
};
};

//Eric+{
/* Dual Ethernet application node on PRU-ICSSG1 */
pruss1_eth: pruss1_eth {
compatible = "ti,am654-icssg-prueth";
pinctrl-names = "default";
pinctrl-0 = <&ethernet0_pins_default>;
sram = <&msmc_ram>;
prus = <&pru1_0>, <&rtu1_0>, <&tx_pru1_0>,
<&pru1_1>, <&rtu1_1>, <&tx_pru1_1>;
firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

ti,pruss-gp-mux-sel = <2>, /* MII mode */
<2>,
<2>,
<2>, /* MII mode */
<2>,
<2>;
mii-g-rt = <&icssg1_mii_g_rt>;
mii-rt = <&icssg1_mii_rt>;
dma-coherent;
dmas = <&main_udmap 0xc200>, /* egress slice 0 */
<&main_udmap 0xc201>, /* egress slice 0 */
<&main_udmap 0xc202>, /* egress slice 0 */
<&main_udmap 0xc203>, /* egress slice 0 */
<&main_udmap 0xc204>, /* egress slice 1 */
<&main_udmap 0xc205>, /* egress slice 1 */
<&main_udmap 0xc206>, /* egress slice 1 */
<&main_udmap 0xc207>, /* egress slice 1 */

<&main_udmap 0x4200>, /* ingress slice 0 */
<&main_udmap 0x4201>, /* ingress slice 1 */
<&main_udmap 0x4202>, /* mgmnt rsp slice 0 */
<&main_udmap 0x4203>; /* mgmnt rsp slice 1 */
dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
"tx1-0", "tx1-1", "tx1-2", "tx1-3",
"rx0", "rx1",
"rxmgm0", "rxmgm1";

pruss1_emac0: ethernet-mii0 {
phy-handle = <&pruss1_eth0_phy>;
phy-mode = "rgmii-rxid";
interrupts-extended = <&icssg1_intc 24>;
syscon-rgmii-delay = <&scm_conf 0x4110>;
iep = <&icssg1_iep0>;
/* Filled in by bootloader */
local-mac-address = [00 00 00 00 00 00];
};

pruss1_emac1: ethernet-mii1 {
phy-handle = <&pruss1_eth1_phy>;
phy-mode = "rgmii-rxid";
interrupts-extended = <&icssg1_intc 25>;
syscon-rgmii-delay = <&scm_conf 0x4114>;
/* Filled in by bootloader */
local-mac-address = [00 00 00 00 00 00];
};
};
//Eric+}

/* Single Ethernet application node on PRU-ICSSG2 */
pruss2_eth: pruss2_eth {
compatible = "ti,am654-icssg-prueth";
pinctrl-names = "default";
//Eric- pinctrl-0 = <&icssg2_rgmii_pins_default>;
pinctrl-0 = <&ethernet1_pins_default>;
sram = <&msmc_ram>;
prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>,
<&pru2_1>, <&rtu2_1>, <&tx_pru2_1>;
firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",
"ti-pruss/am65x-sr2-txpru0-prueth-fw.elf",
"ti-pruss/am65x-sr2-pru1-prueth-fw.elf",
"ti-pruss/am65x-sr2-rtu1-prueth-fw.elf",
"ti-pruss/am65x-sr2-txpru1-prueth-fw.elf";

ti,pruss-gp-mux-sel = <2>, /* MII mode */
<2>,
<2>,
<2>, /* MII mode */
<2>,
<2>;
mii-g-rt = <&icssg2_mii_g_rt>;
mii-rt = <&icssg2_mii_rt>;
dma-coherent;
dmas = <&main_udmap 0xc300>, /* egress slice 0 */
<&main_udmap 0xc301>, /* egress slice 0 */
<&main_udmap 0xc302>, /* egress slice 0 */
<&main_udmap 0xc303>, /* egress slice 0 */
<&main_udmap 0xc304>, /* egress slice 1 */
<&main_udmap 0xc305>, /* egress slice 1 */
<&main_udmap 0xc306>, /* egress slice 1 */
<&main_udmap 0xc307>, /* egress slice 1 */

<&main_udmap 0x4300>, /* ingress slice 0 */
<&main_udmap 0x4301>, /* ingress slice 1 */
<&main_udmap 0x4302>, /* mgmnt rsp slice 0 */
<&main_udmap 0x4303>; /* mgmnt rsp slice 1 */
dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
"tx1-0", "tx1-1", "tx1-2", "tx1-3",
"rx0", "rx1",
"rxmgm0", "rxmgm1";

pruss2_emac0: ethernet-mii0 {
phy-handle = <&pruss2_eth0_phy>;
phy-mode = "rgmii-rxid";
interrupts-extended = <&icssg2_intc 24>;
syscon-rgmii-delay = <&scm_conf 0x4120>;
iep = <&icssg2_iep0>;
/* Filled in by bootloader */
local-mac-address = [00 00 00 00 00 00];
};
};

vdd_mmc1_sd: fixedregulator-sd {
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
enable-active-high;
//Eric- gpios = <&pca9554 4 GPIO_ACTIVE_HIGH>;
};

};

&wkup_pmx0 {
pinctrl-names = "default";
pinctrl-0 = <&eepromgpio_pins_default &iovolctrl_pins_default &i2c0switch_pins_default>;

phy2ax58100_pins_default: phy2ax58100_pins_default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x0058, PIN_INPUT, 1) /* (N4) MCU_RGMII1_TX_CTL.MCU_RMII1_CRS_DV */
AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 1) /* (N5) MCU_RGMII1_RX_CTL.MCU_RMII1_RX_ER */
AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 1) /* (M4) MCU_RGMII1_TD1.MCU_RMII1_TXD1 */
AM65X_WKUP_IOPAD(0x006c, PIN_OUTPUT, 1) /* (M5) MCU_RGMII1_TD0.MCU_RMII1_TXD0 */
AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 1) /* (M6) MCU_RGMII1_RD1.MCU_RMII1_RXD1 */
AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 1) /* (L6) MCU_RGMII1_RD0.MCU_RMII1_RXD0 */
AM65X_WKUP_IOPAD(0x0070, PIN_OUTPUT, 1) /* (N1) MCU_RGMII1_TXC.MCU_RMII1_TX_EN */
AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 1) /* (M1) MCU_RGMII1_RXC.MCU_RMII1_REF_CLK */
>;
};

mcan0_pins_default: mcan0_pins_default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x00ac, PIN_INPUT, 0) /* (W2) MCU_MCAN0_RX */
AM65X_WKUP_IOPAD(0x00a8, PIN_OUTPUT, 0) /* (W1) MCU_MCAN0_TX */
>;
};

phy2ax58100_mdio2_pins_default: phy2ax58100_mdio2_pins_default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */
AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
>;
};

eepromgpio_pins_default: eepromgpio_pins_default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x00cc, PIN_INPUT, 7) /* (AC1) WKUP_GPIO0_7 */
>;
};

iovolctrl_pins_default: iovolctrl_pins_default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x00c8, PIN_OUTPUT, 7) /* (AC2) WKUP_GPIO0_6 */
>;
};

i2c0switch_pins_default: i2c0switch_pins_default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x00D8, PIN_OUTPUT, 7) /* (AB3) WKUP_GPIO0_10 */
>;
};
};

&main_pmx0 {
pinctrl-names = "default";
pinctrl-0 = <&gpio0_pins_default &gpio1_pins_default &mygpmc3_pins_default>;

gpio1_pins_default: gpio1_pins_default {
pinctrl-single,pins = <
//AM65X_IOPAD(0x01d4, PIN_OUTPUT, 7) /* (AG12) SPI1_CS1.GPIO1_21 */ /* RS232-TX-LED */
AM65X_IOPAD(0x01ec, PIN_OUTPUT, 7) /* (AG11) UART0_CTSn.GPIO1_27 */
AM65X_IOPAD(0x01f0, PIN_INPUT, 7) /* (AD11) UART0_RTSn.GPIO1_28 */
AM65X_IOPAD(0x01f4, PIN_INPUT, 1) /* (V24) PRG0_PRU0_GPO0.GPIO1_29 */
AM65X_IOPAD(0x01f8, PIN_INPUT, 1) /* (W25) PRG0_PRU0_GPO1.GPIO1_30 */
AM65X_IOPAD(0x01fc, PIN_INPUT, 1) /* (W24) PRG0_PRU0_GPO2.GPIO1_31 */
AM65X_IOPAD(0x0200, PIN_INPUT, 1) /* (AA27) PRG0_PRU0_GPO3.GPIO1_32 */
AM65X_IOPAD(0x0204, PIN_INPUT, 1) /* (Y24) PRG0_PRU0_GPO4.GPIO1_33 */
AM65X_IOPAD(0x0208, PIN_INPUT, 1) /* (V28) PRG0_PRU0_GPO5.GPIO1_34 */
AM65X_IOPAD(0x020c, PIN_INPUT, 1) /* (Y25) PRG0_PRU0_GPO6.GPIO1_35 */
AM65X_IOPAD(0x0210, PIN_INPUT, 1) /* (U27) PRG0_PRU0_GPO7.GPIO1_36 */
AM65X_IOPAD(0x0214, PIN_INPUT, 7) /* (V27) PRG0_PRU0_GPO8.GPIO1_37 */
AM65X_IOPAD(0x0218, PIN_INPUT, 7) /* (V26) PRG0_PRU0_GPO9.GPIO1_38 */
AM65X_IOPAD(0x021c, PIN_INPUT, 7) /* (U25) PRG0_PRU0_GPO10.GPIO1_39 */
AM65X_IOPAD(0x0220, PIN_INPUT, 7) /* (AB25) PRG0_PRU0_GPO11.GPIO1_40 */
AM65X_IOPAD(0x0224, PIN_INPUT, 7) /* (AD27) PRG0_PRU0_GPO12.GPIO1_41 */
AM65X_IOPAD(0x0228, PIN_INPUT, 7) /* (AC26) PRG0_PRU0_GPO13.GPIO1_42 */
AM65X_IOPAD(0x022c, PIN_INPUT, 7) /* (AD26) PRG0_PRU0_GPO14.GPIO1_43 */
AM65X_IOPAD(0x0230, PIN_INPUT, 7) /* (AA24) PRG0_PRU0_GPO15.GPIO1_44 */
//AM65X_IOPAD(0x0234, PIN_OUTPUT, 7) /* (AD28) PRG0_PRU0_GPO16.GPIO1_45 */ /* RS232-RX-LED */
//AM65X_IOPAD(0x0238, PIN_OUTPUT, 7) /* (U26) PRG0_PRU0_GPO17.GPIO1_46 */ /* RS485-RX-LED */
//AM65X_IOPAD(0x023c, PIN_OUTPUT, 7) /* (V25) PRG0_PRU0_GPO18.GPIO1_47 */ /* SD-CARD-READY-LED */
//AM65X_IOPAD(0x0240, PIN_OUTPUT, 7) /* (U24) PRG0_PRU0_GPO19.GPIO1_48 */ /* BUSFAULT-LED */
AM65X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (AB28) PRG0_PRU1_GPO0.GPIO1_49 */
AM65X_IOPAD(0x0248, PIN_OUTPUT, 0) /* (AC28) PRG0_PRU1_GPO1.GPIO1_50 */
AM65X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (AC27) PRG0_PRU1_GPO2.GPIO1_51 */
AM65X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (AB26) PRG0_PRU1_GPO3.GPIO1_52 */
AM65X_IOPAD(0x0284, PIN_INPUT, 7) /* (AC24) PRG0_PRU1_GPO16.GPIO1_65 */
AM65X_IOPAD(0x028c, PIN_INPUT, 7) /* (Y26) PRG0_PRU1_GPO18.GPIO1_67 */
AM65X_IOPAD(0x0290, PIN_INPUT, 7) /* (W26) PRG0_PRU1_GPO19.GPIO1_68 */
AM65X_IOPAD(0x0294, PIN_INPUT, 7) /* (AE26) PRG0_MDIO0_MDIO.GPIO1_69 */
//AM65X_IOPAD(0x0298, PIN_OUTPUT, 7) /* (AE28) PRG0_MDIO0_MDC.GPIO1_70 */ /* ERROR-LED */
AM65X_IOPAD(0x01d0, PIN_OUTPUT_PULLDOWN, 7) /* (AD12) SPI1_CS0.GPIO1_20 */
>;
};

ledgpio1_pins_default: ledgpio1_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x01d4, PIN_OUTPUT, 7) /* (AG12) GPIO1_21 */ /* RS232-TX-LED */
AM65X_IOPAD(0x0234, PIN_OUTPUT, 7) /* (AD28) GPIO1_45 */ /* RS232-RX-LED */
AM65X_IOPAD(0x0238, PIN_OUTPUT, 7) /* (U26) GPIO1_46 */ /* RS485-RX-LED */
AM65X_IOPAD(0x023c, PIN_OUTPUT, 7) /* (V25) GPIO1_47 */ /* SD-CARD-READY-LED */
AM65X_IOPAD(0x0240, PIN_OUTPUT, 7) /* (U24) GPIO1_48 */ /* BUSFAULT-LED */
AM65X_IOPAD(0x0298, PIN_OUTPUT, 7) /* (AE28) GPIO1_70 */ /* ERROR-LED */
>;
};

gpio0_pins_default: gpio0_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0040, PIN_OUTPUT, 7) /* (R28) GPMC0_CLK.GPIO0_16 */ /*ETH1-PHY-RESET*/
AM65X_IOPAD(0x0058, PIN_INPUT, 7) /* (R26) GPMC0_WAIT0.GPIO0_22 */
AM65X_IOPAD(0x0060, PIN_OUTPUT, 7) /* (T25) GPMC0_WPn.GPIO0_24 */
AM65X_IOPAD(0x0064, PIN_OUTPUT, 7) /* (T24) GPMC0_DIR.GPIO0_25 */
AM65X_IOPAD(0x0068, PIN_INPUT, 7) /* (R24) GPMC0_CSn0.GPIO0_26 */
//AM65X_IOPAD(0x006c, PIN_OUTPUT | PIN_INPUT, 7) /* (T23) GPMC0_CSn1.GPIO0_27 */ /* RUN-LED */
AM65X_IOPAD(0x0070, PIN_INPUT, 7) /* (R25) GPMC0_CSn2.GPIO0_28 */
AM65X_IOPAD(0x0074, PIN_INPUT, 7) /* (T27) GPMC0_CSn3.GPIO0_29 */
AM65X_IOPAD(0x00ac, PIN_INPUT, 1) /* (AH15) PRG2_PRU1_GPO0.GPIO0_43 */
AM65X_IOPAD(0x00b0, PIN_INPUT, 1) /* (AC16) PRG2_PRU1_GPO1.GPIO0_44 */
AM65X_IOPAD(0x00b4, PIN_INPUT, 1) /* (AD17) PRG2_PRU1_GPO2.GPIO0_45 */
AM65X_IOPAD(0x00b8, PIN_INPUT, 1) /* (AH14) PRG2_PRU1_GPO3.GPIO0_46 */
AM65X_IOPAD(0x0108, PIN_OUTPUT, 7) /* (AH25) PRG1_PRU0_GPO10.GPIO0_66 */ /*ETH0-PHY-RESET*/
AM65X_IOPAD(0x0124, PIN_OUTPUT, 7) /* (AH26) PRG1_PRU0_GPO17.GPIO0_73 */ /*ECAT2-PHY-RST*/
>;
};

ledgpio0_pins_default: ledgpio0_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x006c, PIN_OUTPUT | PIN_INPUT, 7) /* (T23) GPIO0_27 */ /* RUN-LED */
>;
};

mygpmc3_pins_default: mygpmc3_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x00bc, PIN_OUTPUT, 3) /* (AG14) PRG2_PRU1_GPO4.GPMC0_A8 */
AM65X_IOPAD(0x00c0, PIN_OUTPUT, 3) /* (AG15) PRG2_PRU1_GPO5.GPMC0_A7 */
AM65X_IOPAD(0x00c4, PIN_OUTPUT, 3) /* (AC17) PRG2_PRU1_GPO6.GPMC0_A6 */
AM65X_IOPAD(0x00cc, PIN_OUTPUT, 3) /* (AD15) PRG2_PRU1_GPO8.GPMC0_A4 */
AM65X_IOPAD(0x00d0, PIN_OUTPUT, 3) /* (AF14) PRG2_PRU1_GPO9.GPMC0_A3 */
AM65X_IOPAD(0x00d4, PIN_OUTPUT, 3) /* (AC15) PRG2_PRU1_GPO10.GPMC0_A2 */
AM65X_IOPAD(0x00d8, PIN_OUTPUT, 3) /* (AD14) PRG2_PRU1_GPO11.GPMC0_A1 */
AM65X_IOPAD(0x003c, PIN_INPUT, 0) /* (R27) GPMC0_AD15 */
AM65X_IOPAD(0x0038, PIN_INPUT, 0) /* (P24) GPMC0_AD14 */
AM65X_IOPAD(0x0034, PIN_INPUT, 0) /* (N25) GPMC0_AD13 */
AM65X_IOPAD(0x0030, PIN_INPUT, 0) /* (N26) GPMC0_AD12 */
AM65X_IOPAD(0x002c, PIN_INPUT, 0) /* (P27) GPMC0_AD11 */
AM65X_IOPAD(0x0028, PIN_INPUT, 0) /* (P28) GPMC0_AD10 */
AM65X_IOPAD(0x0024, PIN_INPUT, 0) /* (M26) GPMC0_AD9 */
AM65X_IOPAD(0x0020, PIN_INPUT, 0) /* (N23) GPMC0_AD8 */
AM65X_IOPAD(0x001c, PIN_INPUT, 0) /* (M25) GPMC0_AD7 */
AM65X_IOPAD(0x0018, PIN_INPUT, 0) /* (N28) GPMC0_AD6 */
AM65X_IOPAD(0x0014, PIN_INPUT, 0) /* (N27) GPMC0_AD5 */
AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (N24) GPMC0_AD4 */
AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (M24) GPMC0_AD3 */
AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (M28) GPMC0_AD2 */
AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (M23) GPMC0_AD1 */
AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (M27) GPMC0_AD0 */
AM65X_IOPAD(0x0054, PIN_OUTPUT, 0) /* (P23) GPMC0_BE1n */
AM65X_IOPAD(0x0048, PIN_OUTPUT, 0) /* (P26) GPMC0_OEn_REn */
AM65X_IOPAD(0x004c, PIN_OUTPUT, 0) /* (U28) GPMC0_WEn */
>;
};

main_mmc0_pins_default: main-mmc0-pins-default {
pinctrl-single,pins = <
AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */
AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */
AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */
AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */
AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */
AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */
AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */
AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */
AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */
AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0) /* (D25) MMC0_DAT7 */
AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
>;
};

main_mmc1_pins_default: main-mmc1-pins-default {
pinctrl-single,pins = <
AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */
AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */
AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0) /* (D28) MMC1_DAT0 */
AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0) /* (E27) MMC1_DAT1 */
AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0) /* (D26) MMC1_DAT2 */
AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0) /* (D27) MMC1_DAT3 */
AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0) /* (B24) MMC1_SDCD */
AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */
>;
};

icssg1_mdio_pins_default: icssg1_mdio_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0180, PIN_INPUT, 0) /* (AD18) PRG1_MDIO0_MDIO */
AM65X_IOPAD(0x0184, PIN_OUTPUT, 0) /* (AH18) PRG1_MDIO0_MDC */
>;
};

ethernet0_pins_default: ethernet0_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x00e0, PIN_INPUT, 2) /* (AE22) PRG1_PRU0_GPO0.PRG1_RGMII1_RD0 */
AM65X_IOPAD(0x00e4, PIN_INPUT, 2) /* (AG24) PRG1_PRU0_GPO1.PRG1_RGMII1_RD1 */
AM65X_IOPAD(0x00e8, PIN_INPUT, 2) /* (AF23) PRG1_PRU0_GPO2.PRG1_RGMII1_RD2 */
AM65X_IOPAD(0x00ec, PIN_INPUT, 2) /* (AD21) PRG1_PRU0_GPO3.PRG1_RGMII1_RD3 */
AM65X_IOPAD(0x0110, PIN_OUTPUT, 2) /* (AH20) PRG1_PRU0_GPO12.PRG1_RGMII1_TD0 */
AM65X_IOPAD(0x0114, PIN_OUTPUT, 2) /* (AH21) PRG1_PRU0_GPO13.PRG1_RGMII1_TD1 */
AM65X_IOPAD(0x0118, PIN_OUTPUT, 2) /* (AG20) PRG1_PRU0_GPO14.PRG1_RGMII1_TD2 */
AM65X_IOPAD(0x011c, PIN_OUTPUT, 2) /* (AD19) PRG1_PRU0_GPO15.PRG1_RGMII1_TD3 */
AM65X_IOPAD(0x0120, PIN_INPUT, 2) /* (AD20) PRG1_PRU0_GPO16.PRG1_RGMII1_TXC */
AM65X_IOPAD(0x010c, PIN_OUTPUT, 2) /* (AF21) PRG1_PRU0_GPO11.PRG1_RGMII1_TX_CTL */
AM65X_IOPAD(0x00f8, PIN_INPUT, 2) /* (AF22) PRG1_PRU0_GPO6.PRG1_RGMII1_RXC */
AM65X_IOPAD(0x00f0, PIN_INPUT, 2) /* (AG23) PRG1_PRU0_GPO4.PRG1_RGMII1_RX_CTL */

//ethercat1_pins_default
AM65X_IOPAD(0x0130, PIN_INPUT, 2) /* (AH24) PRG1_PRU1_GPO0.PRG1_RGMII2_RD0 */
AM65X_IOPAD(0x0134, PIN_INPUT, 2) /* (AH23) PRG1_PRU1_GPO1.PRG1_RGMII2_RD1 */
AM65X_IOPAD(0x0138, PIN_INPUT, 2) /* (AG21) PRG1_PRU1_GPO2.PRG1_RGMII2_RD2 */
AM65X_IOPAD(0x013c, PIN_INPUT, 2) /* (AH22) PRG1_PRU1_GPO3.PRG1_RGMII2_RD3 */
AM65X_IOPAD(0x0160, PIN_OUTPUT, 2) /* (AE20) PRG1_PRU1_GPO12.PRG1_RGMII2_TD0 */
AM65X_IOPAD(0x0164, PIN_OUTPUT, 2) /* (AF19) PRG1_PRU1_GPO13.PRG1_RGMII2_TD1 */
AM65X_IOPAD(0x0168, PIN_OUTPUT, 2) /* (AH19) PRG1_PRU1_GPO14.PRG1_RGMII2_TD2 */
AM65X_IOPAD(0x016c, PIN_OUTPUT, 2) /* (AG19) PRG1_PRU1_GPO15.PRG1_RGMII2_TD3 */
AM65X_IOPAD(0x0170, PIN_INPUT, 2) /* (AE19) PRG1_PRU1_GPO16.PRG1_RGMII2_TXC */
AM65X_IOPAD(0x015c, PIN_OUTPUT, 2) /* (AC20) PRG1_PRU1_GPO11.PRG1_RGMII2_TX_CTL */
AM65X_IOPAD(0x0148, PIN_INPUT, 2) /* (AG22) PRG1_PRU1_GPO6.PRG1_RGMII2_RXC */
AM65X_IOPAD(0x0140, PIN_INPUT, 2) /* (AE21) PRG1_PRU1_GPO4.PRG1_RGMII2_RX_CTL */
>;
};

icssg2_mdio_pins_default: icssg2_mdio_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0094, PIN_INPUT, 2) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */
AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */
>;
};

ethernet1_pins_default: ethernet1_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */
AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */
AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */
AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */
AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */
AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */
AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */
AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */
AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */
AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */
AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */
AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */
>;
};

main_spi0_pins_default: main-spi0-pins-default {
pinctrl-single,pins = <
AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */
AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */
AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */
AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */
AM65X_IOPAD(0x01c0, PIN_OUTPUT, 0) /* (AF13) SPI0_CS1 */
>;
};

myspi2_pins_default: myspi2_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x01d8, PIN_INPUT, 0) /* (AH12) SPI1_CLK */
AM65X_IOPAD(0x01dc, PIN_INPUT, 0) /* (AE12) SPI1_D0 */
AM65X_IOPAD(0x01e0, PIN_INPUT, 0) /* (AF12) SPI1_D1 */
//AM65X_IOPAD(0x01d0, PIN_OUTPUT, 0) /* (AD12) SPI1_CS0 */
>;
};

main_uart0_pins_default: main-uart0-pins-default {
pinctrl-single,pins = <
AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) GPIO1_25 UART0_RXD */
AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) GPIO1_26 UART0_TXD */
>;
};

rs232_pins_default: rs232_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0288, PIN_INPUT, 6) /* (Y27) GPIO1_66 RS232-RXD */
AM65X_IOPAD(0x0260, PIN_OUTPUT, 6) /* (W28) GPIO1_56 RS232-TXD */
>;
};

rs485_pins_default: rs485_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0174, PIN_INPUT, 6) /* (AE23) GPIO0_93 RS485-RXD */
AM65X_IOPAD(0x014c, PIN_OUTPUT, 6) /* (AD23) GPIO0_83 RS485-TXD */
AM65X_IOPAD(0x017c, PIN_OUTPUT_PULLDOWN, 7) /* (AC21) GPIO0_95 RS485-DIR */
>;
};

usb0_pins_default: usb0_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
>;
};

usb20_host_pins_default: usb20_host_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
>;
};
};

&main_pmx1 {
pinctrl-names = "default";
pinctrl-0 = <&gpio2_pins_default>;

main_i2c0_pins_default: main-i2c0-pins-default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
>;
};

main_i2c1_pins_default: main-i2c1-pins-default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
>;
};

gpio2_pins_default: gpio2_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0010, PIN_INPUT, 7) /* (D21) ECAP0_IN_APWM_OUT.GPIO1_86 */
//AM65X_IOPAD(0x0014, PIN_OUTPUT, 7) /* (A22) EXT_REFCLK1.GPIO1_87 */ /* RS485-TX-LED */
AM65X_IOPAD(0x0018, PIN_INPUT, 7) /* (B22) TIMER_IO0.GPIO1_88 */
AM65X_IOPAD(0x001c, PIN_INPUT, 7) /* (C23) TIMER_IO1.GPIO1_89 */
>;
};

ledgpio2_pins_default: ledgpio2_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0014, PIN_OUTPUT, 7) /* (A22) GPIO1_87 */ /* RS485-TX-LED */
>;
};
};

&wkup_uart0 {
/* Wakeup UART is used by System firmware */
status = "disabled";
};

&main_uart0 {
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};

//Eric+{
&main_uart2 {
pinctrl-names = "default";
power-domains = <&k3_pds 148 TI_SCI_PD_SHARED>;
pinctrl-0 = <&rs232_pins_default>;
status = "okay";
};

&main_uart1 {
pinctrl-names = "default";
pinctrl-0 = <&rs485_pins_default>;
power-domains = <&k3_pds 147 TI_SCI_PD_SHARED>;
rts-gpios = <&main_gpio0 95 GPIO_ACTIVE_HIGH>;
rs485-rts-active-high;
rs485-rts-delay = <0 0>;
linux,rs485-enabled-at-boot-time;
status = "okay";
};
//Eric+}

&main_i2c0 {
status = "okay";

pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <100000>;

#if 0
rx8130:rtc@32{
compatible = "epson,rx8130-legacy";
reg = <0x32>;
};
#endif

eeprom: eeprom@50 {
compatible = "atmel,24c16";
reg = <0x50>;
pagesize = <16>;
};
};

&main_i2c1 {
status = "okay";

pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <100000>;

s35390a:rtc@30{
compatible = "sii,s35390a";
reg = <0x30>;
};
};

&main_spi0 {
pinctrl-names = "default";
pinctrl-0 = <&main_spi0_pins_default>;
#address-cells = <1>;
#size-cells= <0>;
ti,pindir-d0-out-d1-in = <1>;

flash@0{
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
spi-max-frequency = <48000000>;
#address-cells = <1>;
#size-cells= <1>;
};
};

&main_spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&myspi2_pins_default>;
#address-cells = <1>;
#size-cells= <0>;
ti,pindir-d0-out-d1-in = <1>;

spidev@0 {
status = "okay";
//compatible = "fairchild,74hc595";
compatible = "linux,spidev";
gpio-controller;
#gpio-cells = <2>;
reg = <0>;
registers-number = <2>;
registers-default = /bits/ 8 <0xb7>;
spi-max-frequency = <100000>;
};
};

&sdhci0 {
pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>;
bus-width = <8>;
non-removable;
ti,driver-strength-ohm = <50>;
disable-wp;
};

&sdhci1 {
vmmc-supply = <&vdd_mmc1_sd>;
pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>;
no-1-8-v;
ti,driver-strength-ohm = <50>;
disable-wp;
};

&dwc3_1 {
status = "okay";
};

&usb1_phy {
status = "okay";
};

&usb1 {
pinctrl-names = "default";
//Eric- pinctrl-0 = <&usb1_pins_default>;
pinctrl-0 = <&usb20_host_pins_default>;
dr_mode = "host";
};

&dwc3_0 {
status = "okay";
};

&usb0_phy {
status = "okay";
};

//Eric+{

&m_can0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mcan0_pins_default>;
//stb-gpios = <&main_gpio1 47 GPIO_ACTIVE_HIGH>;
can-transceiver {
max-bitrate = <5000000>;
};
};

&usb0 {
pinctrl-names = "default";
//pinctrl-0 = <&usb0_pins_default>;
dr_mode = "peripheral";
};
//Eric+}

&tscadc0 {
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
};

&tscadc1 {
adc {
ti,adc-channels = <0 1 2 3 4 5 6 7>;
};
};

&serdes0 {
status = "disabled";
};

&serdes1 {
status = "disabled";
};

&pcie0_rc {
status = "disabled";
};

&pcie0_ep {
status = "disabled";
};

&pcie1_rc {
status = "disabled";
};

&pcie1_ep {
status = "disabled";
};

&mailbox0_cluster0 {
interrupts = <436>;

mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
ti,mbox-tx = <1 0 0>;
ti,mbox-rx = <0 0 0>;
};
};

&mailbox0_cluster1 {
interrupts = <432>;

mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
ti,mbox-tx = <1 0 0>;
ti,mbox-rx = <0 0 0>;
};
};

&mailbox0_cluster2 {
status = "disabled";
};

&mailbox0_cluster3 {
status = "disabled";
};

&mailbox0_cluster4 {
status = "disabled";
};

&mailbox0_cluster5 {
status = "disabled";
};

&mailbox0_cluster6 {
status = "disabled";
};

&mailbox0_cluster7 {
status = "disabled";
};

&mailbox0_cluster8 {
status = "disabled";
};

&mailbox0_cluster9 {
status = "disabled";
};

&mailbox0_cluster10 {
status = "disabled";
};

&mailbox0_cluster11 {
status = "disabled";
};

&mcu_r5fss0_core0 {
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
<&mcu_r5fss0_core0_memory_region>;
mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
};

&mcu_r5fss0_core1 {
memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
<&mcu_r5fss0_core1_memory_region>;
mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
};

&mcu_cpsw {
pinctrl-names = "default";
//Eric- pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
pinctrl-0 = <&phy2ax58100_pins_default &phy2ax58100_mdio2_pins_default>;
};

&davinci_mdio {
reset = <&main_gpio0 25 GPIO_ACTIVE_LOW>;
reset-delay-us = <2>; /* PHY datasheet states 1us min */

phy0: ethernet-phy@0 {
reg = <3>;
};
};

&cpsw_port1 {
phy-mode = "rmii";
phy-handle = <&phy0>;
};

//Eric+{
&icssg1_mdio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&icssg1_mdio_pins_default>;

reset = <&main_gpio0 66 GPIO_ACTIVE_LOW>; /*83867*/
reset = <&main_gpio0 73 GPIO_ACTIVE_LOW>; /*83822*/
reset-delay-us = <2>;

/*83867*/
pruss1_eth0_phy: ethernet-phy@1 {
reg = <1>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};

/*83822*/
pruss1_eth1_phy: ethernet-phy@7 {
reg = <7>;
};
};
//Eric+}

&icssg2_mdio {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&icssg2_mdio_pins_default>;

reset = <&main_gpio0 16 GPIO_ACTIVE_LOW>;
reset-delay-us = <2>;

/*83867*/
pruss2_eth0_phy: ethernet-phy@2 {
reg = <2>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};
};

Thanks.

Eric

  • Hi Eric,

    file: arch/arm64/boot/dts/ti/k3-am654-base-board.dts

    serial0 is wkup_uart0 & it is reserved for System firmware. So you will not see
    that enabled in Linux.

    So you see the instances starting from ttys1(mcu_uart0) ttys2(main_uart0) and so on.

    Click on verify answer if no further questions.

    Best Regards,
    Keerthy

  • Hi ,

    I tried to use ls -l /dev/ttyS* to see the ttyS devices, and the result as below.

    root@AX-564EB0MB1T:~# ls -l /dev/ttyS*
    crw--w---- 1 root tty 4, 64 Aug 4 09:04 /dev/ttyS0
    crw-rw---- 1 root dialout 4, 65 Aug 4 09:04 /dev/ttyS1
    crw------- 1 root tty 4, 66 Aug 4 09:06 /dev/ttyS2
    crw-rw---- 1 root dialout 4, 67 Aug 4 09:04 /dev/ttyS3
    crw-rw---- 1 root dialout 4, 68 Aug 4 09:05 /dev/ttyS4
    crw-rw---- 1 root dialout 4, 69 Aug 4 09:04 /dev/ttyS5
    crw-rw---- 1 root dialout 4, 70 Aug 4 09:04 /dev/ttyS6
    crw-rw---- 1 root dialout 4, 71 Aug 4 09:04 /dev/ttyS7
    crw-rw---- 1 root dialout 4, 72 Aug 4 09:04 /dev/ttyS8
    crw-rw---- 1 root dialout 4, 73 Aug 4 09:04 /dev/ttyS9

    There are totally 10 devices here.

    Is there any setting related to this number?

    Thanks.

    Eric

  • Hi Eric,

    The 10 instances are created by the file system. Even though the DT entries that are enabled are fewer.
    This is file system setting mostly.

    - Keerthy

  • Hi

    Got it.

    And thanks for your response.

    Eric