Other Parts Discussed in Thread: TDA4VM
Hi,
We are seeing an abnormal Reset behavior with our custom TDA4VM board where in the the board successfully doesn't boot until we manually press the warm or cold reset switches. whenever we power on the board the log comes and stays below until we press the cold MCU RESET switch button
also we cross verified the MCU_PORZ and PORZ signals during power up sequence which will be held low till all power supplies and main clock is stable as per data manual and PDN document. The reset inputs are asserted high in our custom board after all power supplies stable and clock is presented.
any thoughts or feedback is much appreciated.
''U-Boot SPL 2021.01-g687404c9b-dirty (Jan 20 2022 - 12:26:22 +0530)
Model: Texas Instruments K3 J721E SoC
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed 1
Board: J721EX-PM1-SOM rev E2
SYSFW ABI: 3.1 (firmware rev 0x0015 '21.5.0--v2021.05 (Terrific Llam')
EEPROM not available at 0x50, trying to read at 0x51
Reading on-board EEPROM at 0x51 failed 1
Trying to boot from SPI''
Regards,
Chaitanya