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AM3505 Power Sequencing



I'm working on meeting the noise requirements of the VDDS_SRAM_MPU and VDDS_SRAM_CORE_BG (50mV p-p)  on a 1.8V I/O design.   The data sheet states that VDDSSHV can be combined with rail 1 and all be brought up simultaneously when they are the same voltage.  Is it possible to instead split them up into the following two groups?  And if so which set if either is required to come up first?

 

 

   VDDS_SRAM_CORE_BG, VDDS_SRAM_MPU, VDDSOSC  =  1.8V - low current low switching noise

      VDDS, VDDSHV = 1.8V - high current high switching noise